[deliverable/linux.git] / arch / arm / boot / dts / socfpga_arria10.dtsi

/*
 * Copyright Altera Corporation (C) 2014. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		ethernet0 = &gmac0;
		ethernet1 = &gmac1;
		ethernet2 = &gmac2;
		serial0 = &uart0;
		serial1 = &uart1;
		timer0 = &timer0;
		timer1 = &timer1;
		timer2 = &timer2;
		timer3 = &timer3;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,cortex-a9";
			device_type = "cpu";
			reg = <0>;
			next-level-cache = <&L2>;
		};
		cpu@1 {
			compatible = "arm,cortex-a9";
			device_type = "cpu";
			reg = <1>;
			next-level-cache = <&L2>;
		};
	};

	intc: intc@ffffd000 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0xffffd000 0x1000>,
		      <0xffffc100 0x100>;
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		device_type = "soc";
		interrupt-parent = <&intc>;
		ranges;

		amba {
			compatible = "arm,amba-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			pdma: pdma@ffda1000 {
				compatible = "arm,pl330", "arm,primecell";
				reg = <0xffda1000 0x1000>;
				interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>,
					     <0 84 IRQ_TYPE_LEVEL_HIGH>,
					     <0 85 IRQ_TYPE_LEVEL_HIGH>,
					     <0 86 IRQ_TYPE_LEVEL_HIGH>,
					     <0 87 IRQ_TYPE_LEVEL_HIGH>,
					     <0 88 IRQ_TYPE_LEVEL_HIGH>,
					     <0 89 IRQ_TYPE_LEVEL_HIGH>,
					     <0 90 IRQ_TYPE_LEVEL_HIGH>;
				#dma-cells = <1>;
				#dma-channels = <8>;
				#dma-requests = <32>;
			};
		};

		clkmgr@ffd04000 {
				compatible = "altr,clk-mgr";
				reg = <0xffd04000 0x1000>;

				clocks {
					#address-cells = <1>;
					#size-cells = <0>;

					osc1: osc1 {
						#clock-cells = <0>;
						compatible = "fixed-clock";
					};

					main_pll: main_pll {
						#address-cells = <1>;
						#size-cells = <0>;
						#clock-cells = <0>;
						compatible = "altr,socfpga-pll-clock";
						clocks = <&osc1>;
					};

					periph_pll: periph_pll {
						#address-cells = <1>;
						#size-cells = <0>;
						#clock-cells = <0>;
						compatible = "altr,socfpga-pll-clock";
						clocks = <&osc1>;
					};
				};
		};

		gmac0: ethernet@ff800000 {
			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
			reg = <0xff800000 0x2000>;
			interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "macirq";
			/* Filled in by bootloader */
			mac-address = [00 00 00 00 00 00];
			status = "disabled";
		};

		gmac1: ethernet@ff802000 {
			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
		        reg = <0xff802000 0x2000>;
			interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "macirq";
			/* Filled in by bootloader */
			mac-address = [00 00 00 00 00 00];
			status = "disabled";
		};

		gmac2: ethernet@ff804000 {
			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
			reg = <0xff804000 0x2000>;
			interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "macirq";
			/* Filled in by bootloader */
			mac-address = [00 00 00 00 00 00];
			status = "disabled";
		};

		gpio0: gpio@ffc02900 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "snps,dw-apb-gpio";
			reg = <0xffc02900 0x100>;
			status = "disabled";

			porta: gpio-controller@0 {
				compatible = "snps,dw-apb-gpio-port";
				gpio-controller;
				#gpio-cells = <2>;
				snps,nr-gpios = <29>;
				reg = <0>;
				interrupt-controller;
				#interrupt-cells = <2>;
				interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>;
			};
		};

		gpio1: gpio@ffc02a00 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "snps,dw-apb-gpio";
			reg = <0xffc02a00 0x100>;
			status = "disabled";

			portb: gpio-controller@0 {
				compatible = "snps,dw-apb-gpio-port";
				gpio-controller;
				#gpio-cells = <2>;
				snps,nr-gpios = <29>;
				reg = <0>;
				interrupt-controller;
				#interrupt-cells = <2>;
				interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>;
			};
		};

		gpio2: gpio@ffc02b00 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "snps,dw-apb-gpio";
			reg = <0xffc02b00 0x100>;
			status = "disabled";

			portc: gpio-controller@0 {
				compatible = "snps,dw-apb-gpio-port";
				gpio-controller;
				#gpio-cells = <2>;
				snps,nr-gpios = <27>;
				reg = <0>;
				interrupt-controller;
				#interrupt-cells = <2>;
				interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
			};
		};

		i2c0: i2c@ffc02200 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "snps,designware-i2c";
			reg = <0xffc02200 0x100>;
			interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		i2c1: i2c@ffc02300 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "snps,designware-i2c";
			reg = <0xffc02300 0x100>;
			interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		i2c2: i2c@ffc02400 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "snps,designware-i2c";
			reg = <0xffc02400 0x100>;
			interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		i2c3: i2c@ffc02500 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "snps,designware-i2c";
			reg = <0xffc02500 0x100>;
			interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		i2c4: i2c@ffc02600 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "snps,designware-i2c";
			reg = <0xffc02600 0x100>;
			interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		L2: l2-cache@fffff000 {
			compatible = "arm,pl310-cache";
			reg = <0xfffff000 0x1000>;
			interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
			cache-unified;
			cache-level = <2>;
		};

		mmc: dwmmc0@ff808000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "altr,socfpga-dw-mshc";
			reg = <0xff808000 0x1000>;
			interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
			fifo-depth = <0x400>;
		};

		ocram: sram@ffe00000 {
			compatible = "mmio-sram";
			reg = <0xffe00000 0x40000>;
		};

		rst: rstmgr@ffd05000 {
			#reset-cells = <1>;
			compatible = "altr,rst-mgr";
			reg = <0xffd05000 0x100>;
		};

		sysmgr: sysmgr@ffd06000 {
			compatible = "altr,sys-mgr", "syscon";
			reg = <0xffd06000 0x300>;
		};

		/* Local timer */
		timer@ffffc600 {
			compatible = "arm,cortex-a9-twd-timer";
			reg = <0xffffc600 0x100>;
			interrupts = <1 13 0xf04>;
		};

		timer0: timer0@ffc02700 {
			compatible = "snps,dw-apb-timer";
			interrupts = <0 115 IRQ_TYPE_LEVEL_HIGH>;
			reg = <0xffc02700 0x100>;
		};

		timer1: timer1@ffc02800 {
			compatible = "snps,dw-apb-timer";
			interrupts = <0 116 IRQ_TYPE_LEVEL_HIGH>;
			reg = <0xffc02800 0x100>;
		};

		timer2: timer2@ffd00000 {
			compatible = "snps,dw-apb-timer";
			interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH>;
			reg = <0xffd00000 0x100>;
		};

		timer3: timer3@ffd00100 {
			compatible = "snps,dw-apb-timer";
			interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>;
			reg = <0xffd01000 0x100>;
		};

		uart0: serial0@ffc02000 {
			compatible = "snps,dw-apb-uart";
			reg = <0xffc02000 0x100>;
			interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
		};

		uart1: serial1@ffc02100 {
			compatible = "snps,dw-apb-uart";
			reg = <0xffc02100 0x100>;
			interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
		};

		usbphy0: usbphy@0 {
			#phy-cells = <0>;
			compatible = "usb-nop-xceiv";
			status = "okay";
		};

		usb0: usb@ffb00000 {
			compatible = "snps,dwc2";
			reg = <0xffb00000 0xffff>;
			interrupts = <0 95 IRQ_TYPE_LEVEL_HIGH>;
			phys = <&usbphy0>;
			phy-names = "usb2-phy";
			status = "disabled";
		};

		usb1: usb@ffb40000 {
			compatible = "snps,dwc2";
			reg = <0xffb40000 0xffff>;
			interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>;
			phys = <&usbphy0>;
			phy-names = "usb2-phy";
			status = "disabled";
		};

		watchdog0: watchdog@ffd00200 {
			compatible = "snps,dw-wdt";
			reg = <0xffd00200 0x100>;
			interrupts = <0 119 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		watchdog1: watchdog@ffd00300 {
			compatible = "snps,dw-wdt";
			reg = <0xffd00300 0x100>;
			interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};
	};
};
Commit	Line	Data
475dc86d DN	1	/*
	2	* Copyright Altera Corporation (C) 2014. All rights reserved.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms and conditions of the GNU General Public License,
	6	* version 2, as published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope it will be useful, but WITHOUT
	9	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	10	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	11	* more details.
	12	*
	13	* You should have received a copy of the GNU General Public License along with
	14	* this program. If not, see <http://www.gnu.org/licenses/>.
	15	*/
	16
	17	#include "skeleton.dtsi"
	18	#include <dt-bindings/interrupt-controller/arm-gic.h>
	19
	20	/ {
	21	#address-cells = <1>;
	22	#size-cells = <1>;
	23
	24	aliases {
	25	ethernet0 = &gmac0;
	26	ethernet1 = &gmac1;
	27	ethernet2 = &gmac2;
	28	serial0 = &uart0;
	29	serial1 = &uart1;
	30	timer0 = &timer0;
	31	timer1 = &timer1;
	32	timer2 = &timer2;
	33	timer3 = &timer3;
	34	};
	35
	36	cpus {
	37	#address-cells = <1>;
	38	#size-cells = <0>;
	39
	40	cpu@0 {
	41	compatible = "arm,cortex-a9";
	42	device_type = "cpu";
	43	reg = <0>;
	44	next-level-cache = <&L2>;
	45	};
	46	cpu@1 {
	47	compatible = "arm,cortex-a9";
	48	device_type = "cpu";
	49	reg = <1>;
	50	next-level-cache = <&L2>;
	51	};
	52	};
	53
	54	intc: intc@ffffd000 {
	55	compatible = "arm,cortex-a9-gic";
	56	#interrupt-cells = <3>;
	57	interrupt-controller;
	58	reg = <0xffffd000 0x1000>,
	59	<0xffffc100 0x100>;
	60	};
	61
	62	soc {
	63	#address-cells = <1>;
	64	#size-cells = <1>;
65	compatible = "simple-bus";
66	device_type = "soc";
67	interrupt-parent = <&intc>;
68	ranges;
69
70	amba {
71	compatible = "arm,amba-bus";
72	#address-cells = <1>;
73	#size-cells = <1>;
74	ranges;
75
76	pdma: pdma@ffda1000 {
77	compatible = "arm,pl330", "arm,primecell";
78	reg = <0xffda1000 0x1000>;
79	interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>,
80	<0 84 IRQ_TYPE_LEVEL_HIGH>,
81	<0 85 IRQ_TYPE_LEVEL_HIGH>,
82	<0 86 IRQ_TYPE_LEVEL_HIGH>,
83	<0 87 IRQ_TYPE_LEVEL_HIGH>,
84	<0 88 IRQ_TYPE_LEVEL_HIGH>,
85	<0 89 IRQ_TYPE_LEVEL_HIGH>,
86	<0 90 IRQ_TYPE_LEVEL_HIGH>;
87	#dma-cells = <1>;
88	#dma-channels = <8>;
89	#dma-requests = <32>;
90	};
91	};
92
93	clkmgr@ffd04000 {
94	compatible = "altr,clk-mgr";
95	reg = <0xffd04000 0x1000>;
96
97	clocks {
98	#address-cells = <1>;
99	#size-cells = <0>;
100
101	osc1: osc1 {
102	#clock-cells = <0>;
103	compatible = "fixed-clock";
104	};
105
106	main_pll: main_pll {
107	#address-cells = <1>;
108	#size-cells = <0>;
109	#clock-cells = <0>;
110	compatible = "altr,socfpga-pll-clock";
111	clocks = <&osc1>;
112	};
113
114	periph_pll: periph_pll {
115	#address-cells = <1>;
116	#size-cells = <0>;
117	#clock-cells = <0>;
118	compatible = "altr,socfpga-pll-clock";
119	clocks = <&osc1>;
120	};
121	};
122	};
123
124	gmac0: ethernet@ff800000 {
125	compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
126	reg = <0xff800000 0x2000>;
127	interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
128	interrupt-names = "macirq";
129	/* Filled in by bootloader */
130	mac-address = [00 00 00 00 00 00];
131	status = "disabled";
132	};
133
134	gmac1: ethernet@ff802000 {
135	compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
136	reg = <0xff802000 0x2000>;
137	interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>;
138	interrupt-names = "macirq";
139	/* Filled in by bootloader */
140	mac-address = [00 00 00 00 00 00];
141	status = "disabled";
142	};
143
144	gmac2: ethernet@ff804000 {
145	compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
146	reg = <0xff804000 0x2000>;
147	interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
148	interrupt-names = "macirq";
149	/* Filled in by bootloader */
150	mac-address = [00 00 00 00 00 00];
151	status = "disabled";
152	};
153
154	gpio0: gpio@ffc02900 {
155	#address-cells = <1>;
156	#size-cells = <0>;
157	compatible = "snps,dw-apb-gpio";
158	reg = <0xffc02900 0x100>;
159	status = "disabled";
160
161	porta: gpio-controller@0 {
162	compatible = "snps,dw-apb-gpio-port";
163	gpio-controller;
164	#gpio-cells = <2>;
165	snps,nr-gpios = <29>;
166	reg = <0>;
167	interrupt-controller;
168	#interrupt-cells = <2>;
169	interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>;
170	};
171	};
172
173	gpio1: gpio@ffc02a00 {
174	#address-cells = <1>;
175	#size-cells = <0>;
176	compatible = "snps,dw-apb-gpio";
177	reg = <0xffc02a00 0x100>;
178	status = "disabled";
179
180	portb: gpio-controller@0 {
181	compatible = "snps,dw-apb-gpio-port";
182	gpio-controller;
183	#gpio-cells = <2>;
184	snps,nr-gpios = <29>;
185	reg = <0>;
186	interrupt-controller;
187	#interrupt-cells = <2>;
188	interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>;
189	};
190	};
191
192	gpio2: gpio@ffc02b00 {
193	#address-cells = <1>;
194	#size-cells = <0>;
195	compatible = "snps,dw-apb-gpio";
196	reg = <0xffc02b00 0x100>;
197	status = "disabled";
198
199	portc: gpio-controller@0 {
200	compatible = "snps,dw-apb-gpio-port";
201	gpio-controller;
202	#gpio-cells = <2>;
203	snps,nr-gpios = <27>;
204	reg = <0>;
205	interrupt-controller;
206	#interrupt-cells = <2>;
207	interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
208	};
209	};
210
211	i2c0: i2c@ffc02200 {
212	#address-cells = <1>;
213	#size-cells = <0>;
214	compatible = "snps,designware-i2c";
215	reg = <0xffc02200 0x100>;
216	interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
217	status = "disabled";
218	};
219
220	i2c1: i2c@ffc02300 {
221	#address-cells = <1>;
222	#size-cells = <0>;
223	compatible = "snps,designware-i2c";
224	reg = <0xffc02300 0x100>;
225	interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
226	status = "disabled";
227	};
228
229	i2c2: i2c@ffc02400 {
230	#address-cells = <1>;
231	#size-cells = <0>;
232	compatible = "snps,designware-i2c";
233	reg = <0xffc02400 0x100>;
234	interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
235	status = "disabled";
236	};
237
238	i2c3: i2c@ffc02500 {
239	#address-cells = <1>;
240	#size-cells = <0>;
241	compatible = "snps,designware-i2c";
242	reg = <0xffc02500 0x100>;
243	interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
244	status = "disabled";
245	};
246
247	i2c4: i2c@ffc02600 {
248	#address-cells = <1>;
249	#size-cells = <0>;
250	compatible = "snps,designware-i2c";
251	reg = <0xffc02600 0x100>;
252	interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
253	status = "disabled";
254	};
255
256	L2: l2-cache@fffff000 {
257	compatible = "arm,pl310-cache";
258	reg = <0xfffff000 0x1000>;
259	interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
260	cache-unified;
261	cache-level = <2>;
262	};
263
264	mmc: dwmmc0@ff808000 {
265	#address-cells = <1>;
266	#size-cells = <0>;
267	compatible = "altr,socfpga-dw-mshc";
268	reg = <0xff808000 0x1000>;
269	interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
270	fifo-depth = <0x400>;
271	};
272
273	ocram: sram@ffe00000 {
274	compatible = "mmio-sram";
275	reg = <0xffe00000 0x40000>;
276	};
277
278	rst: rstmgr@ffd05000 {
279	#reset-cells = <1>;
280	compatible = "altr,rst-mgr";
281	reg = <0xffd05000 0x100>;
282	};
283
284	sysmgr: sysmgr@ffd06000 {
285	compatible = "altr,sys-mgr", "syscon";
286	reg = <0xffd06000 0x300>;
287	};
288
289	/* Local timer */
290	timer@ffffc600 {
291	compatible = "arm,cortex-a9-twd-timer";
292	reg = <0xffffc600 0x100>;
293	interrupts = <1 13 0xf04>;
294	};
295
296	timer0: timer0@ffc02700 {
297	compatible = "snps,dw-apb-timer";
298	interrupts = <0 115 IRQ_TYPE_LEVEL_HIGH>;
299	reg = <0xffc02700 0x100>;
300	};
301
302	timer1: timer1@ffc02800 {
303	compatible = "snps,dw-apb-timer";
304	interrupts = <0 116 IRQ_TYPE_LEVEL_HIGH>;
305	reg = <0xffc02800 0x100>;
306	};
307
308	timer2: timer2@ffd00000 {
309	compatible = "snps,dw-apb-timer";
310	interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH>;
311	reg = <0xffd00000 0x100>;
312	};
313
314	timer3: timer3@ffd00100 {
315	compatible = "snps,dw-apb-timer";
316	interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>;
317	reg = <0xffd01000 0x100>;
318	};
319
320	uart0: serial0@ffc02000 {
321	compatible = "snps,dw-apb-uart";
322	reg = <0xffc02000 0x100>;
323	interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
324	reg-shift = <2>;
325	reg-io-width = <4>;
326	};
327
328	uart1: serial1@ffc02100 {
329	compatible = "snps,dw-apb-uart";
330	reg = <0xffc02100 0x100>;
331	interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
332	reg-shift = <2>;
333	reg-io-width = <4>;
334	};
335
336	usbphy0: usbphy@0 {
337	#phy-cells = <0>;
338	compatible = "usb-nop-xceiv";
339	status = "okay";
340	};
341
342	usb0: usb@ffb00000 {
343	compatible = "snps,dwc2";
344	reg = <0xffb00000 0xffff>;
345	interrupts = <0 95 IRQ_TYPE_LEVEL_HIGH>;
346	phys = <&usbphy0>;
347	phy-names = "usb2-phy";
348	status = "disabled";
349	};
350
351	usb1: usb@ffb40000 {
352	compatible = "snps,dwc2";
353	reg = <0xffb40000 0xffff>;
354	interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>;
355	phys = <&usbphy0>;
356	phy-names = "usb2-phy";
357	status = "disabled";
358	};
359
360	watchdog0: watchdog@ffd00200 {
361	compatible = "snps,dw-wdt";
362	reg = <0xffd00200 0x100>;
363	interrupts = <0 119 IRQ_TYPE_LEVEL_HIGH>;
364	status = "disabled";
365	};
366
367	watchdog1: watchdog@ffd00300 {
368	compatible = "snps,dw-wdt";
369	reg = <0xffd00300 0x100>;
370	interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>;
371	status = "disabled";
372	};
373	};
374	};