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07658d9a VK |
1 | /* |
2 | * DTS file for all SPEAr1310 SoCs | |
3 | * | |
10d8935f | 4 | * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com> |
07658d9a VK |
5 | * |
6 | * The code contained herein is licensed under the GNU General Public | |
7 | * License. You may obtain a copy of the GNU General Public License | |
8 | * Version 2 or later at the following locations: | |
9 | * | |
10 | * http://www.opensource.org/licenses/gpl-license.html | |
11 | * http://www.gnu.org/copyleft/gpl.html | |
12 | */ | |
13 | ||
14 | /include/ "spear13xx.dtsi" | |
15 | ||
16 | / { | |
17 | compatible = "st,spear1310"; | |
18 | ||
19 | ahb { | |
20 | ahci@b1000000 { | |
21 | compatible = "snps,spear-ahci"; | |
22 | reg = <0xb1000000 0x10000>; | |
23 | interrupts = <0 68 0x4>; | |
24 | status = "disabled"; | |
25 | }; | |
26 | ||
27 | ahci@b1800000 { | |
28 | compatible = "snps,spear-ahci"; | |
29 | reg = <0xb1800000 0x10000>; | |
30 | interrupts = <0 69 0x4>; | |
31 | status = "disabled"; | |
32 | }; | |
33 | ||
34 | ahci@b4000000 { | |
35 | compatible = "snps,spear-ahci"; | |
36 | reg = <0xb4000000 0x10000>; | |
37 | interrupts = <0 70 0x4>; | |
38 | status = "disabled"; | |
39 | }; | |
40 | ||
41 | gmac1: eth@5c400000 { | |
42 | compatible = "st,spear600-gmac"; | |
43 | reg = <0x5c400000 0x8000>; | |
44 | interrupts = <0 95 0x4>; | |
45 | interrupt-names = "macirq"; | |
46 | status = "disabled"; | |
47 | }; | |
48 | ||
49 | gmac2: eth@5c500000 { | |
50 | compatible = "st,spear600-gmac"; | |
51 | reg = <0x5c500000 0x8000>; | |
52 | interrupts = <0 96 0x4>; | |
53 | interrupt-names = "macirq"; | |
54 | status = "disabled"; | |
55 | }; | |
56 | ||
57 | gmac3: eth@5c600000 { | |
58 | compatible = "st,spear600-gmac"; | |
59 | reg = <0x5c600000 0x8000>; | |
60 | interrupts = <0 97 0x4>; | |
61 | interrupt-names = "macirq"; | |
62 | status = "disabled"; | |
63 | }; | |
64 | ||
65 | gmac4: eth@5c700000 { | |
66 | compatible = "st,spear600-gmac"; | |
67 | reg = <0x5c700000 0x8000>; | |
68 | interrupts = <0 98 0x4>; | |
69 | interrupt-names = "macirq"; | |
70 | status = "disabled"; | |
71 | }; | |
72 | ||
73 | spi1: spi@5d400000 { | |
74 | compatible = "arm,pl022", "arm,primecell"; | |
75 | reg = <0x5d400000 0x1000>; | |
76 | interrupts = <0 99 0x4>; | |
77 | status = "disabled"; | |
78 | }; | |
79 | ||
80 | apb { | |
81 | i2c1: i2c@5cd00000 { | |
82 | #address-cells = <1>; | |
83 | #size-cells = <0>; | |
84 | compatible = "snps,designware-i2c"; | |
85 | reg = <0x5cd00000 0x1000>; | |
86 | interrupts = <0 87 0x4>; | |
87 | status = "disabled"; | |
88 | }; | |
89 | ||
90 | i2c2: i2c@5ce00000 { | |
91 | #address-cells = <1>; | |
92 | #size-cells = <0>; | |
93 | compatible = "snps,designware-i2c"; | |
94 | reg = <0x5ce00000 0x1000>; | |
95 | interrupts = <0 88 0x4>; | |
96 | status = "disabled"; | |
97 | }; | |
98 | ||
99 | i2c3: i2c@5cf00000 { | |
100 | #address-cells = <1>; | |
101 | #size-cells = <0>; | |
102 | compatible = "snps,designware-i2c"; | |
103 | reg = <0x5cf00000 0x1000>; | |
104 | interrupts = <0 89 0x4>; | |
105 | status = "disabled"; | |
106 | }; | |
107 | ||
108 | i2c4: i2c@5d000000 { | |
109 | #address-cells = <1>; | |
110 | #size-cells = <0>; | |
111 | compatible = "snps,designware-i2c"; | |
112 | reg = <0x5d000000 0x1000>; | |
113 | interrupts = <0 90 0x4>; | |
114 | status = "disabled"; | |
115 | }; | |
116 | ||
117 | i2c5: i2c@5d100000 { | |
118 | #address-cells = <1>; | |
119 | #size-cells = <0>; | |
120 | compatible = "snps,designware-i2c"; | |
121 | reg = <0x5d100000 0x1000>; | |
122 | interrupts = <0 91 0x4>; | |
123 | status = "disabled"; | |
124 | }; | |
125 | ||
126 | i2c6: i2c@5d200000 { | |
127 | #address-cells = <1>; | |
128 | #size-cells = <0>; | |
129 | compatible = "snps,designware-i2c"; | |
130 | reg = <0x5d200000 0x1000>; | |
131 | interrupts = <0 92 0x4>; | |
132 | status = "disabled"; | |
133 | }; | |
134 | ||
135 | i2c7: i2c@5d300000 { | |
136 | #address-cells = <1>; | |
137 | #size-cells = <0>; | |
138 | compatible = "snps,designware-i2c"; | |
139 | reg = <0x5d300000 0x1000>; | |
140 | interrupts = <0 93 0x4>; | |
141 | status = "disabled"; | |
142 | }; | |
143 | ||
144 | serial@5c800000 { | |
145 | compatible = "arm,pl011", "arm,primecell"; | |
146 | reg = <0x5c800000 0x1000>; | |
147 | interrupts = <0 82 0x4>; | |
148 | status = "disabled"; | |
149 | }; | |
150 | ||
151 | serial@5c900000 { | |
152 | compatible = "arm,pl011", "arm,primecell"; | |
153 | reg = <0x5c900000 0x1000>; | |
154 | interrupts = <0 83 0x4>; | |
155 | status = "disabled"; | |
156 | }; | |
157 | ||
158 | serial@5ca00000 { | |
159 | compatible = "arm,pl011", "arm,primecell"; | |
160 | reg = <0x5ca00000 0x1000>; | |
161 | interrupts = <0 84 0x4>; | |
162 | status = "disabled"; | |
163 | }; | |
164 | ||
165 | serial@5cb00000 { | |
166 | compatible = "arm,pl011", "arm,primecell"; | |
167 | reg = <0x5cb00000 0x1000>; | |
168 | interrupts = <0 85 0x4>; | |
169 | status = "disabled"; | |
170 | }; | |
171 | ||
172 | serial@5cc00000 { | |
173 | compatible = "arm,pl011", "arm,primecell"; | |
174 | reg = <0x5cc00000 0x1000>; | |
175 | interrupts = <0 86 0x4>; | |
176 | status = "disabled"; | |
177 | }; | |
178 | ||
179 | thermal@e07008c4 { | |
180 | st,thermal-flags = <0x7000>; | |
181 | }; | |
182 | }; | |
183 | }; | |
184 | }; |