ARM: SPEAr: DT: add uart state to fix warning
[deliverable/linux.git] / arch / arm / boot / dts / spear13xx.dtsi
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1/*
2 * DTS file for all SPEAr13xx SoCs
3 *
10d8935f 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
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5 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/include/ "skeleton.dtsi"
15
16/ {
17 interrupt-parent = <&gic>;
18
19 cpus {
20 #address-cells = <1>;
21 #size-cells = <0>;
22
23 cpu@0 {
24 compatible = "arm,cortex-a9";
25 reg = <0>;
26 next-level-cache = <&L2>;
27 };
28
29 cpu@1 {
30 compatible = "arm,cortex-a9";
31 reg = <1>;
32 next-level-cache = <&L2>;
33 };
34 };
35
36 gic: interrupt-controller@ec801000 {
37 compatible = "arm,cortex-a9-gic";
38 interrupt-controller;
39 #interrupt-cells = <3>;
40 reg = < 0xec801000 0x1000 >,
41 < 0xec800100 0x0100 >;
42 };
43
44 pmu {
45 compatible = "arm,cortex-a9-pmu";
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46 interrupts = <0 6 0x04
47 0 7 0x04>;
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48 };
49
50 L2: l2-cache {
51 compatible = "arm,pl310-cache";
52 reg = <0xed000000 0x1000>;
53 cache-unified;
54 cache-level = <2>;
55 };
56
57 memory {
58 name = "memory";
59 device_type = "memory";
60 reg = <0 0x40000000>;
61 };
62
63 chosen {
64 bootargs = "console=ttyAMA0,115200";
65 };
66
67 ahb {
68 #address-cells = <1>;
69 #size-cells = <1>;
70 compatible = "simple-bus";
71 ranges = <0x50000000 0x50000000 0x10000000
72 0xb0000000 0xb0000000 0x10000000
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73 0xd0000000 0xd0000000 0x02000000
74 0xd8000000 0xd8000000 0x01000000
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75 0xe0000000 0xe0000000 0x10000000>;
76
77 sdhci@b3000000 {
78 compatible = "st,sdhci-spear";
79 reg = <0xb3000000 0x100>;
80 interrupts = <0 28 0x4>;
81 status = "disabled";
82 };
83
84 cf@b2800000 {
85 compatible = "arasan,cf-spear1340";
f631b984 86 reg = <0xb2800000 0x1000>;
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87 interrupts = <0 29 0x4>;
88 status = "disabled";
89 };
90
91 dma@ea800000 {
92 compatible = "snps,dma-spear1340";
93 reg = <0xea800000 0x1000>;
94 interrupts = <0 19 0x4>;
95 status = "disabled";
96 };
97
98 dma@eb000000 {
99 compatible = "snps,dma-spear1340";
100 reg = <0xeb000000 0x1000>;
101 interrupts = <0 59 0x4>;
102 status = "disabled";
103 };
104
105 fsmc: flash@b0000000 {
106 compatible = "st,spear600-fsmc-nand";
107 #address-cells = <1>;
108 #size-cells = <1>;
109 reg = <0xb0000000 0x1000 /* FSMC Register */
110 0xb0800000 0x0010>; /* NAND Base */
111 reg-names = "fsmc_regs", "nand_data";
112 interrupts = <0 20 0x4
113 0 21 0x4
114 0 22 0x4
115 0 23 0x4>;
116 st,ale-off = <0x20000>;
117 st,cle-off = <0x10000>;
f631b984 118 st,mode = <2>;
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119 status = "disabled";
120 };
121
122 gmac0: eth@e2000000 {
123 compatible = "st,spear600-gmac";
124 reg = <0xe2000000 0x8000>;
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125 interrupts = <0 33 0x4
126 0 34 0x4>;
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127 interrupt-names = "macirq", "eth_wake_irq";
128 status = "disabled";
129 };
130
131 smi: flash@ea000000 {
132 compatible = "st,spear600-smi";
133 #address-cells = <1>;
134 #size-cells = <1>;
135 reg = <0xea000000 0x1000>;
136 interrupts = <0 30 0x4>;
137 status = "disabled";
138 };
139
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140 ehci@e4800000 {
141 compatible = "st,spear600-ehci", "usb-ehci";
142 reg = <0xe4800000 0x1000>;
143 interrupts = <0 64 0x4>;
f631b984 144 usbh0_id = <0>;
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145 status = "disabled";
146 };
147
148 ehci@e5800000 {
149 compatible = "st,spear600-ehci", "usb-ehci";
150 reg = <0xe5800000 0x1000>;
151 interrupts = <0 66 0x4>;
f631b984 152 usbh1_id = <1>;
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153 status = "disabled";
154 };
155
156 ohci@e4000000 {
157 compatible = "st,spear600-ohci", "usb-ohci";
158 reg = <0xe4000000 0x1000>;
159 interrupts = <0 65 0x4>;
f631b984 160 usbh0_id = <0>;
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161 status = "disabled";
162 };
163
164 ohci@e5000000 {
165 compatible = "st,spear600-ohci", "usb-ohci";
166 reg = <0xe5000000 0x1000>;
167 interrupts = <0 67 0x4>;
f631b984 168 usbh1_id = <1>;
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169 status = "disabled";
170 };
171
172 apb {
173 #address-cells = <1>;
174 #size-cells = <1>;
175 compatible = "simple-bus";
176 ranges = <0x50000000 0x50000000 0x10000000
177 0xb0000000 0xb0000000 0x10000000
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178 0xd0000000 0xd0000000 0x02000000
179 0xd8000000 0xd8000000 0x01000000
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180 0xe0000000 0xe0000000 0x10000000>;
181
182 gpio0: gpio@e0600000 {
183 compatible = "arm,pl061", "arm,primecell";
184 reg = <0xe0600000 0x1000>;
185 interrupts = <0 24 0x4>;
186 gpio-controller;
187 #gpio-cells = <2>;
188 interrupt-controller;
189 #interrupt-cells = <2>;
190 status = "disabled";
191 };
192
193 gpio1: gpio@e0680000 {
194 compatible = "arm,pl061", "arm,primecell";
195 reg = <0xe0680000 0x1000>;
196 interrupts = <0 25 0x4>;
197 gpio-controller;
198 #gpio-cells = <2>;
199 interrupt-controller;
200 #interrupt-cells = <2>;
201 status = "disabled";
202 };
203
204 kbd@e0300000 {
205 compatible = "st,spear300-kbd";
206 reg = <0xe0300000 0x1000>;
465e4f2b 207 interrupts = <0 52 0x4>;
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208 status = "disabled";
209 };
210
211 i2c0: i2c@e0280000 {
212 #address-cells = <1>;
213 #size-cells = <0>;
214 compatible = "snps,designware-i2c";
215 reg = <0xe0280000 0x1000>;
216 interrupts = <0 41 0x4>;
217 status = "disabled";
218 };
219
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220 spi0: spi@e0100000 {
221 compatible = "arm,pl022", "arm,primecell";
222 reg = <0xe0100000 0x1000>;
223 interrupts = <0 31 0x4>;
224 status = "disabled";
225 };
226
07658d9a 227 rtc@e0580000 {
f631b984 228 compatible = "st,spear600-rtc";
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229 reg = <0xe0580000 0x1000>;
230 interrupts = <0 36 0x4>;
231 status = "disabled";
232 };
233
234 serial@e0000000 {
235 compatible = "arm,pl011", "arm,primecell";
236 reg = <0xe0000000 0x1000>;
465e4f2b 237 interrupts = <0 35 0x4>;
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238 status = "disabled";
239 };
240
241 adc@e0080000 {
242 compatible = "st,spear600-adc";
243 reg = <0xe0080000 0x1000>;
f631b984 244 interrupts = <0 12 0x4>;
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245 status = "disabled";
246 };
247
248 timer@e0380000 {
249 compatible = "st,spear-timer";
250 reg = <0xe0380000 0x400>;
251 interrupts = <0 37 0x4>;
252 };
253
254 timer@ec800600 {
255 compatible = "arm,cortex-a9-twd-timer";
256 reg = <0xec800600 0x20>;
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257 interrupts = <1 13 0x4>;
258 status = "disabled";
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259 };
260
261 wdt@ec800620 {
262 compatible = "arm,cortex-a9-twd-wdt";
263 reg = <0xec800620 0x20>;
264 status = "disabled";
265 };
266
267 thermal@e07008c4 {
268 compatible = "st,thermal-spear1340";
269 reg = <0xe07008c4 0x4>;
f631b984 270 thermal_flags = <0x7000>;
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271 };
272 };
273 };
274};
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