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c5fa4fdc VK |
1 | /* |
2 | * DTS file for all SPEAr3xx SoCs | |
3 | * | |
10d8935f | 4 | * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com> |
c5fa4fdc VK |
5 | * |
6 | * The code contained herein is licensed under the GNU General Public | |
7 | * License. You may obtain a copy of the GNU General Public License | |
8 | * Version 2 or later at the following locations: | |
9 | * | |
10 | * http://www.opensource.org/licenses/gpl-license.html | |
11 | * http://www.gnu.org/copyleft/gpl.html | |
12 | */ | |
13 | ||
14 | /include/ "skeleton.dtsi" | |
15 | ||
16 | / { | |
17 | interrupt-parent = <&vic>; | |
18 | ||
19 | cpus { | |
20 | cpu@0 { | |
21 | compatible = "arm,arm926ejs"; | |
22 | }; | |
23 | }; | |
24 | ||
25 | memory { | |
26 | device_type = "memory"; | |
27 | reg = <0 0x40000000>; | |
28 | }; | |
29 | ||
30 | ahb { | |
31 | #address-cells = <1>; | |
32 | #size-cells = <1>; | |
33 | compatible = "simple-bus"; | |
34 | ranges = <0xd0000000 0xd0000000 0x30000000>; | |
35 | ||
36 | vic: interrupt-controller@f1100000 { | |
37 | compatible = "arm,pl190-vic"; | |
38 | interrupt-controller; | |
39 | reg = <0xf1100000 0x1000>; | |
40 | #interrupt-cells = <1>; | |
41 | }; | |
42 | ||
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43 | dma@fc400000 { |
44 | compatible = "arm,pl080", "arm,primecell"; | |
45 | reg = <0xfc400000 0x1000>; | |
46 | interrupt-parent = <&vic>; | |
47 | interrupts = <8>; | |
48 | status = "disabled"; | |
49 | }; | |
50 | ||
c5fa4fdc VK |
51 | gmac: eth@e0800000 { |
52 | compatible = "st,spear600-gmac"; | |
53 | reg = <0xe0800000 0x8000>; | |
54 | interrupts = <23 22>; | |
55 | interrupt-names = "macirq", "eth_wake_irq"; | |
56 | status = "disabled"; | |
57 | }; | |
58 | ||
59 | smi: flash@fc000000 { | |
60 | compatible = "st,spear600-smi"; | |
61 | #address-cells = <1>; | |
62 | #size-cells = <1>; | |
63 | reg = <0xfc000000 0x1000>; | |
64 | interrupts = <9>; | |
65 | status = "disabled"; | |
66 | }; | |
67 | ||
68 | spi0: spi@d0100000 { | |
69 | compatible = "arm,pl022", "arm,primecell"; | |
70 | reg = <0xd0100000 0x1000>; | |
71 | interrupts = <20>; | |
72 | status = "disabled"; | |
73 | }; | |
74 | ||
75 | ehci@e1800000 { | |
76 | compatible = "st,spear600-ehci", "usb-ehci"; | |
77 | reg = <0xe1800000 0x1000>; | |
78 | interrupts = <26>; | |
79 | status = "disabled"; | |
80 | }; | |
81 | ||
82 | ohci@e1900000 { | |
83 | compatible = "st,spear600-ohci", "usb-ohci"; | |
84 | reg = <0xe1900000 0x1000>; | |
85 | interrupts = <25>; | |
86 | status = "disabled"; | |
87 | }; | |
88 | ||
89 | ohci@e2100000 { | |
90 | compatible = "st,spear600-ohci", "usb-ohci"; | |
91 | reg = <0xe2100000 0x1000>; | |
92 | interrupts = <27>; | |
93 | status = "disabled"; | |
94 | }; | |
95 | ||
96 | apb { | |
97 | #address-cells = <1>; | |
98 | #size-cells = <1>; | |
99 | compatible = "simple-bus"; | |
100 | ranges = <0xd0000000 0xd0000000 0x30000000>; | |
101 | ||
102 | gpio0: gpio@fc980000 { | |
103 | compatible = "arm,pl061", "arm,primecell"; | |
104 | reg = <0xfc980000 0x1000>; | |
105 | interrupts = <11>; | |
106 | gpio-controller; | |
107 | #gpio-cells = <2>; | |
108 | interrupt-controller; | |
109 | #interrupt-cells = <2>; | |
110 | status = "disabled"; | |
111 | }; | |
112 | ||
113 | i2c0: i2c@d0180000 { | |
114 | #address-cells = <1>; | |
115 | #size-cells = <0>; | |
116 | compatible = "snps,designware-i2c"; | |
117 | reg = <0xd0180000 0x1000>; | |
118 | interrupts = <21>; | |
119 | status = "disabled"; | |
120 | }; | |
121 | ||
122 | rtc@fc900000 { | |
123 | compatible = "st,spear-rtc"; | |
124 | reg = <0xfc900000 0x1000>; | |
125 | interrupts = <10>; | |
126 | status = "disabled"; | |
127 | }; | |
128 | ||
129 | serial@d0000000 { | |
130 | compatible = "arm,pl011", "arm,primecell"; | |
131 | reg = <0xd0000000 0x1000>; | |
132 | interrupts = <19>; | |
133 | status = "disabled"; | |
134 | }; | |
135 | ||
136 | wdt@fc880000 { | |
137 | compatible = "arm,sp805", "arm,primecell"; | |
138 | reg = <0xfc880000 0x1000>; | |
139 | interrupts = <12>; | |
140 | status = "disabled"; | |
141 | }; | |
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142 | |
143 | timer@f0000000 { | |
144 | compatible = "st,spear-timer"; | |
145 | reg = <0xf0000000 0x400>; | |
146 | interrupts = <2>; | |
147 | }; | |
c5fa4fdc VK |
148 | }; |
149 | }; | |
150 | }; |