ARM: dts: STi: STih407: Switch LPC mode from RTC to Clocksource
[deliverable/linux.git] / arch / arm / boot / dts / ste-href-ab8500.dtsi
CommitLineData
83200629
LW
1/*
2 * Copyright 2014 Linaro Ltd.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/ {
13 soc {
14 prcmu@80157000 {
15 ab8500 {
16 ab8500-gpio {
17 /* Hog a few default settings */
18 pinctrl-names = "default";
19 pinctrl-0 = <&gpio2_default_mode>,
20 <&gpio4_default_mode>,
21 <&gpio10_default_mode>,
22 <&gpio11_default_mode>,
23 <&gpio12_default_mode>,
24 <&gpio13_default_mode>,
25 <&gpio16_default_mode>,
26 <&gpio24_default_mode>,
27 <&gpio25_default_mode>,
28 <&gpio36_default_mode>,
29 <&gpio37_default_mode>,
30 <&gpio38_default_mode>,
31 <&gpio39_default_mode>,
32 <&gpio42_default_mode>,
33 <&gpio26_default_mode>,
fd385b33 34 <&gpio35_default_mode>,
e2377c81 35 <&ycbcr_default_mode>,
b2985cf7 36 <&pwm_default_mode>,
c7bb47aa 37 <&adi1_default_mode>,
1f04159e 38 <&usbuicc_default_mode>,
81d78492 39 <&dmic_default_mode>,
d88ae11e
LW
40 <&extcpena_default_mode>,
41 <&modsclsda_default_mode>;
83200629
LW
42
43 /*
44 * Pins 2, 4, 10, 11, 12, 13, 16, 24, 25, 36, 37, 38, 39 and 42
45 * are muxed in as GPIO, and configured as INPUT PULL DOWN
46 */
47 gpio2 {
48 gpio2_default_mode: gpio2_default {
49 default_mux {
51d39936
LW
50 function = "gpio";
51 groups = "gpio2_a_1";
83200629
LW
52 };
53 default_cfg {
0564f7d9 54 pins = "GPIO2_T9";
83200629
LW
55 input-enable;
56 bias-pull-down;
57 };
58 };
59 };
60 gpio4 {
61 gpio4_default_mode: gpio4_default {
62 default_mux {
51d39936
LW
63 function = "gpio";
64 groups = "gpio4_a_1";
83200629
LW
65 };
66 default_cfg {
0564f7d9 67 pins = "GPIO4_W2";
83200629
LW
68 input-enable;
69 bias-pull-down;
70 };
71 };
72 };
73 gpio10 {
74 gpio10_default_mode: gpio10_default {
75 default_mux {
51d39936
LW
76 function = "gpio";
77 groups = "gpio10_d_1";
83200629
LW
78 };
79 default_cfg {
0564f7d9 80 pins = "GPIO10_U17";
83200629
LW
81 input-enable;
82 bias-pull-down;
83 };
84 };
85 };
86 gpio11 {
87 gpio11_default_mode: gpio11_default {
88 default_mux {
51d39936
LW
89 function = "gpio";
90 groups = "gpio11_d_1";
83200629
LW
91 };
92 default_cfg {
0564f7d9 93 pins = "GPIO11_AA18";
83200629
LW
94 input-enable;
95 bias-pull-down;
96 };
97 };
98 };
99 gpio12 {
100 gpio12_default_mode: gpio12_default {
101 default_mux {
51d39936
LW
102 function = "gpio";
103 groups = "gpio12_d_1";
83200629
LW
104 };
105 default_cfg {
0564f7d9 106 pins = "GPIO12_U16";
83200629
LW
107 input-enable;
108 bias-pull-down;
109 };
110 };
111 };
112 gpio13 {
113 gpio13_default_mode: gpio13_default {
114 default_mux {
51d39936
LW
115 function = "gpio";
116 groups = "gpio13_d_1";
83200629
LW
117 };
118 default_cfg {
0564f7d9 119 pins = "GPIO13_W17";
83200629
LW
120 input-enable;
121 bias-pull-down;
122 };
123 };
124 };
125 gpio16 {
126 gpio16_default_mode: gpio16_default {
127 default_mux {
51d39936
LW
128 function = "gpio";
129 groups = "gpio16_a_1";
83200629
LW
130 };
131 default_cfg {
0564f7d9 132 pins = "GPIO16_F15";
83200629
LW
133 input-enable;
134 bias-pull-down;
135 };
136 };
137 };
138 gpio24 {
139 gpio24_default_mode: gpio24_default {
140 default_mux {
51d39936
LW
141 function = "gpio";
142 groups = "gpio24_a_1";
83200629
LW
143 };
144 default_cfg {
0564f7d9 145 pins = "GPIO24_T14";
83200629
LW
146 input-enable;
147 bias-pull-down;
148 };
149 };
150 };
151 gpio25 {
152 gpio25_default_mode: gpio25_default {
153 default_mux {
51d39936
LW
154 function = "gpio";
155 groups = "gpio25_a_1";
83200629
LW
156 };
157 default_cfg {
0564f7d9 158 pins = "GPIO25_R16";
83200629
LW
159 input-enable;
160 bias-pull-down;
161 };
162 };
163 };
164 gpio36 {
165 gpio36_default_mode: gpio36_default {
166 default_mux {
51d39936
LW
167 function = "gpio";
168 groups = "gpio36_a_1";
83200629
LW
169 };
170 default_cfg {
0564f7d9 171 pins = "GPIO36_A17";
83200629
LW
172 input-enable;
173 bias-pull-down;
174 };
175 };
176 };
177 gpio37 {
178 gpio37_default_mode: gpio37_default {
179 default_mux {
51d39936
LW
180 function = "gpio";
181 groups = "gpio37_a_1";
83200629
LW
182 };
183 default_cfg {
0564f7d9 184 pins = "GPIO37_E15";
83200629
LW
185 input-enable;
186 bias-pull-down;
187 };
188 };
189 };
190 gpio38 {
191 gpio38_default_mode: gpio38_default {
192 default_mux {
51d39936
LW
193 function = "gpio";
194 groups = "gpio38_a_1";
83200629
LW
195 };
196 default_cfg {
0564f7d9 197 pins = "GPIO38_C17";
83200629
LW
198 input-enable;
199 bias-pull-down;
200 };
201 };
202 };
203 gpio39 {
204 gpio39_default_mode: gpio39_default {
205 default_mux {
51d39936
LW
206 function = "gpio";
207 groups = "gpio39_a_1";
83200629
LW
208 };
209 default_cfg {
0564f7d9 210 pins = "GPIO39_E16";
83200629
LW
211 input-enable;
212 bias-pull-down;
213 };
214 };
215 };
216 gpio42 {
217 gpio42_default_mode: gpio42_default {
218 default_mux {
51d39936
LW
219 function = "gpio";
220 groups = "gpio42_a_1";
83200629
LW
221 };
222 default_cfg {
0564f7d9 223 pins = "GPIO42_U2";
83200629
LW
224 input-enable;
225 bias-pull-down;
226 };
227 };
228 };
229 /*
230 * Pins 26 and 35 muxed in as GPIO, and configured as OUTPUT LOW
231 */
232 gpio26 {
233 gpio26_default_mode: gpio26_default {
234 default_mux {
51d39936
LW
235 function = "gpio";
236 groups = "gpio26_d_1";
83200629
LW
237 };
238 default_cfg {
0564f7d9 239 pins = "GPIO26_M16";
83200629
LW
240 output-low;
241 };
242 };
243 };
244 gpio35 {
245 gpio35_default_mode: gpio35_default {
246 default_mux {
51d39936
LW
247 function = "gpio";
248 groups = "gpio35_d_1";
83200629
LW
249 };
250 default_cfg {
0564f7d9 251 pins = "GPIO35_W15";
83200629
LW
252 output-low;
253 };
254 };
255 };
fd385b33
LW
256 /*
257 * This sets up the YCBCR connector pins, i.e. analog video out.
258 * Set as input with no bias.
259 */
260 ycbcr {
261 ycbcr_default_mode: ycbcr_default {
262 default_mux {
51d39936
LW
263 function = "ycbcr";
264 groups = "ycbcr0123_d_1";
fd385b33
LW
265 };
266 default_cfg {
0564f7d9 267 pins = "GPIO6_Y18",
fd385b33
LW
268 "GPIO7_AA20",
269 "GPIO8_W18",
270 "GPIO9_AA19";
271 input-enable;
272 bias-disable;
273 };
274 };
275 };
e2377c81
LW
276 /* This sets up the PWM pins 14 and 15 */
277 pwm {
278 pwm_default_mode: pwm_default {
279 default_mux {
51d39936
LW
280 function = "pwmout";
281 groups = "pwmout1_d_1", "pwmout2_d_1";
e2377c81
LW
282 };
283 default_cfg {
0564f7d9 284 pins = "GPIO14_F14",
e2377c81
LW
285 "GPIO15_B17";
286 input-enable;
287 bias-pull-down;
288 };
289 };
290 };
b2985cf7
LW
291 /* This sets up audio interface 1 */
292 adi1 {
293 adi1_default_mode: adi1_default {
294 default_mux {
51d39936
LW
295 function = "adi1";
296 groups = "adi1_d_1";
b2985cf7
LW
297 };
298 default_cfg {
0564f7d9 299 pins = "GPIO17_P5",
b2985cf7
LW
300 "GPIO18_R5",
301 "GPIO19_U5",
302 "GPIO20_T5";
303 input-enable;
304 bias-pull-down;
305 };
306 };
307 };
c7bb47aa
LW
308 /* This sets up the USB UICC pins */
309 usbuicc {
310 usbuicc_default_mode: usbuicc_default {
311 default_mux {
51d39936
LW
312 function = "usbuicc";
313 groups = "usbuicc_d_1";
c7bb47aa
LW
314 };
315 default_cfg {
0564f7d9 316 pins = "GPIO21_H19",
c7bb47aa
LW
317 "GPIO22_G20",
318 "GPIO23_G19";
319 input-enable;
320 bias-pull-down;
321 };
322 };
323 };
1f04159e
LW
324 /* This sets up the microphone pins */
325 dmic {
326 dmic_default_mode: dmic_default {
327 default_mux {
51d39936
LW
328 function = "dmic";
329 groups = "dmic12_d_1",
1f04159e
LW
330 "dmic34_d_1",
331 "dmic56_d_1";
332 };
333 default_cfg {
0564f7d9 334 pins = "GPIO27_J6",
1f04159e
LW
335 "GPIO28_K6",
336 "GPIO29_G6",
337 "GPIO30_H6",
338 "GPIO31_F5",
339 "GPIO32_G5";
340 input-enable;
341 bias-pull-down;
342 };
343 };
344 };
81d78492
LW
345 extcpena {
346 extcpena_default_mode: extcpena_default {
347 default_mux {
51d39936
LW
348 function = "extcpena";
349 groups = "extcpena_d_1";
81d78492
LW
350 };
351 default_cfg {
0564f7d9 352 pins = "GPIO34_R17";
81d78492
LW
353 input-enable;
354 bias-pull-down;
355 };
356 };
357 };
d88ae11e
LW
358 /* Modem I2C setup (SCL and SDA pins) */
359 modsclsda {
360 modsclsda_default_mode: modsclsda_default {
361 default_mux {
51d39936
LW
362 function = "modsclsda";
363 groups = "modsclsda_d_1";
d88ae11e
LW
364 };
365 default_cfg {
0564f7d9 366 pins = "GPIO40_T19",
d88ae11e
LW
367 "GPIO41_U19";
368 input-enable;
369 bias-pull-down;
370 };
371 };
372 };
7acacfbc
LW
373 /*
374 * Clock output pins associated with regulators.
375 */
376 sysclkreq2 {
377 sysclkreq2_default_mode: sysclkreq2_default {
378 default_mux {
51d39936
LW
379 function = "sysclkreq";
380 groups = "sysclkreq2_d_1";
7acacfbc
LW
381 };
382 default_cfg {
0564f7d9 383 pins = "GPIO1_T10";
7acacfbc
LW
384 input-enable;
385 bias-disable;
386 };
387 };
388 sysclkreq2_sleep_mode: sysclkreq2_sleep {
389 default_mux {
51d39936
LW
390 function = "gpio";
391 groups = "gpio1_a_1";
7acacfbc
LW
392 };
393 default_cfg {
0564f7d9 394 pins = "GPIO1_T10";
7acacfbc
LW
395 input-enable;
396 bias-pull-down;
397 };
398 };
399 };
400 sysclkreq4 {
401 sysclkreq4_default_mode: sysclkreq4_default {
402 default_mux {
51d39936
LW
403 function = "sysclkreq";
404 groups = "sysclkreq4_d_1";
7acacfbc
LW
405 };
406 default_cfg {
0564f7d9 407 pins = "GPIO3_U9";
7acacfbc
LW
408 input-enable;
409 bias-disable;
410 };
411 };
412 sysclkreq4_sleep_mode: sysclkreq4_sleep {
413 default_mux {
51d39936
LW
414 function = "gpio";
415 groups = "gpio3_a_1";
7acacfbc
LW
416 };
417 default_cfg {
0564f7d9 418 pins = "GPIO3_U9";
7acacfbc
LW
419 input-enable;
420 bias-pull-down;
421 };
422 };
423 };
83200629
LW
424 };
425 };
426 };
427 };
428};
This page took 0.169196 seconds and 5 git commands to generate.