projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 63f3171d MC |
1 | /* |
| 2 | * Copyright (C) 2014 STMicroelectronics Limited. | |
| 3 | * Author: Peter Griffin <peter.griffin@linaro.org> | |
| 4 | * | |
| 5 | * This program is free software; you can redistribute it and/or modify | |
| 6 | * it under the terms of the GNU General Public License version 2 as | |
| 7 | * publishhed by the Free Software Foundation. | |
| 8 | */ | |
| 9 | #include "stih418-clock.dtsi" | |
| 10 | #include "stih407-family.dtsi" | |
| 11 | #include "stih410-pinctrl.dtsi" | |
| 12 | / { | |
| 13 | cpus { | |
| 14 | #address-cells = <1>; | |
| 15 | #size-cells = <0>; | |
| 16 | cpu@2 { | |
| 17 | device_type = "cpu"; | |
| 18 | compatible = "arm,cortex-a9"; | |
| 19 | reg = <2>; | |
| 20 | }; | |
| 21 | cpu@3 { | |
| 22 | device_type = "cpu"; | |
| 23 | compatible = "arm,cortex-a9"; | |
| 24 | reg = <3>; | |
| 25 | }; | |
| 26 | }; | |
| 27 | ||
| 28 | soc { | |
| 29 | usb2_picophy1: phy2 { | |
| 30 | compatible = "st,stih407-usb2-phy"; | |
| 31 | #phy-cells = <0>; | |
| 32 | st,syscfg = <&syscfg_core 0xf8 0xf4>; | |
| 33 | resets = <&softreset STIH407_PICOPHY_SOFTRESET>, | |
| 34 | <&picophyreset STIH407_PICOPHY0_RESET>; | |
| 35 | reset-names = "global", "port"; | |
| 36 | }; | |
| 37 | ||
| 38 | usb2_picophy2: phy3 { | |
| 39 | compatible = "st,stih407-usb2-phy"; | |
| 40 | #phy-cells = <0>; | |
| 41 | st,syscfg = <&syscfg_core 0xfc 0xf4>; | |
| 42 | resets = <&softreset STIH407_PICOPHY_SOFTRESET>, | |
| 43 | <&picophyreset STIH407_PICOPHY1_RESET>; | |
| 44 | reset-names = "global", "port"; | |
| 45 | }; | |
| 46 | ||
| 47 | ohci0: usb@9a03c00 { | |
| 48 | compatible = "st,st-ohci-300x"; | |
| 49 | reg = <0x9a03c00 0x100>; | |
| 50 | interrupts = <GIC_SPI 180 IRQ_TYPE_NONE>; | |
| 51 | clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>; | |
| 52 | resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>, | |
| 53 | <&softreset STIH407_USB2_PORT0_SOFTRESET>; | |
| 54 | reset-names = "power", "softreset"; | |
| 55 | phys = <&usb2_picophy1>; | |
| 56 | phy-names = "usb"; | |
| 57 | }; | |
| 58 | ||
| 59 | ehci0: usb@9a03e00 { | |
| 60 | compatible = "st,st-ehci-300x"; | |
| 61 | reg = <0x9a03e00 0x100>; | |
| 62 | interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>; | |
| 63 | pinctrl-names = "default"; | |
| 64 | pinctrl-0 = <&pinctrl_usb0>; | |
| 65 | clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>; | |
| 66 | resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>, | |
| 67 | <&softreset STIH407_USB2_PORT0_SOFTRESET>; | |
| 68 | reset-names = "power", "softreset"; | |
| 69 | phys = <&usb2_picophy1>; | |
| 70 | phy-names = "usb"; | |
| 71 | }; | |
| 72 | ||
| 73 | ohci1: usb@9a83c00 { | |
| 74 | compatible = "st,st-ohci-300x"; | |
| 75 | reg = <0x9a83c00 0x100>; | |
| 76 | interrupts = <GIC_SPI 181 IRQ_TYPE_NONE>; | |
| 77 | clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>; | |
| 78 | resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>, | |
| 79 | <&softreset STIH407_USB2_PORT1_SOFTRESET>; | |
| 80 | reset-names = "power", "softreset"; | |
| 81 | phys = <&usb2_picophy2>; | |
| 82 | phy-names = "usb"; | |
| 83 | }; | |
| 84 | ||
| 85 | ehci1: usb@9a83e00 { | |
| 86 | compatible = "st,st-ehci-300x"; | |
| 87 | reg = <0x9a83e00 0x100>; | |
| 88 | interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>; | |
| 89 | pinctrl-names = "default"; | |
| 90 | pinctrl-0 = <&pinctrl_usb1>; | |
| 91 | clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>; | |
| 92 | resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>, | |
| 93 | <&softreset STIH407_USB2_PORT1_SOFTRESET>; | |
| 94 | reset-names = "power", "softreset"; | |
| 95 | phys = <&usb2_picophy2>; | |
| 96 | phy-names = "usb"; | |
| 97 | }; | |
| 98 | }; | |
| 99 | }; |