[deliverable/linux.git] / arch / arm / boot / dts / stih41x.dtsi

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			compatible = "arm,cortex-a9";
			reg = <0>;
		};
		cpu@1 {
			compatible = "arm,cortex-a9";
			reg = <1>;
		};
	};

	intc: interrupt-controller@fffe1000 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0xfffe1000 0x1000>,
		      <0xfffe0100 0x100>;
	};

	scu@fffe0000 {
		compatible = "arm,cortex-a9-scu";
		reg = <0xfffe0000 0x1000>;
	};

	timer@fffe0200 {
		interrupt-parent = <&intc>;
		compatible = "arm,cortex-a9-global-timer";
		reg = <0xfffe0200 0x100>;
		interrupts = <1 11 0x04>;
		clocks = <&arm_periph_clk>;
	};
};
Commit	Line	Data
65ebcc11 SK	1	/ {
	2	#address-cells = <1>;
	3	#size-cells = <1>;
	4
	5	cpus {
	6	#address-cells = <1>;
	7	#size-cells = <0>;
	8	cpu@0 {
	9	compatible = "arm,cortex-a9";
	10	reg = <0>;
	11	};
	12	cpu@1 {
	13	compatible = "arm,cortex-a9";
	14	reg = <1>;
	15	};
	16	};
	17
	18	intc: interrupt-controller@fffe1000 {
	19	compatible = "arm,cortex-a9-gic";
	20	#interrupt-cells = <3>;
	21	interrupt-controller;
	22	reg = <0xfffe1000 0x1000>,
	23	<0xfffe0100 0x100>;
	24	};
	25
	26	scu@fffe0000 {
	27	compatible = "arm,cortex-a9-scu";
	28	reg = <0xfffe0000 0x1000>;
	29	};
	30
	31	timer@fffe0200 {
	32	interrupt-parent = <&intc>;
	33	compatible = "arm,cortex-a9-global-timer";
	34	reg = <0xfffe0200 0x100>;
	35	interrupts = <1 11 0x04>;
	36	clocks = <&arm_periph_clk>;
	37	};
	38	};