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338a6aaa MC |
1 | /* |
2 | * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> | |
3 | * | |
4 | * This file is dual-licensed: you can use it either under the terms | |
5 | * of the GPL or the X11 license, at your option. Note that this dual | |
6 | * licensing only applies to this file, and not this project as a | |
7 | * whole. | |
8 | * | |
9 | * a) This file is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License as | |
11 | * published by the Free Software Foundation; either version 2 of the | |
12 | * License, or (at your option) any later version. | |
13 | * | |
14 | * This file is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public | |
20 | * License along with this file; if not, write to the Free | |
21 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, | |
22 | * MA 02110-1301 USA | |
23 | * | |
24 | * Or, alternatively, | |
25 | * | |
26 | * b) Permission is hereby granted, free of charge, to any person | |
27 | * obtaining a copy of this software and associated documentation | |
28 | * files (the "Software"), to deal in the Software without | |
29 | * restriction, including without limitation the rights to use, | |
30 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
31 | * sell copies of the Software, and to permit persons to whom the | |
32 | * Software is furnished to do so, subject to the following | |
33 | * conditions: | |
34 | * | |
35 | * The above copyright notice and this permission notice shall be | |
36 | * included in all copies or substantial portions of the Software. | |
37 | * | |
38 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
39 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
40 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
41 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
42 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
43 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
44 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
45 | * OTHER DEALINGS IN THE SOFTWARE. | |
46 | */ | |
47 | ||
48 | #include "armv7-m.dtsi" | |
49 | ||
50 | / { | |
51 | clocks { | |
9dc24a2d | 52 | clk_hse: clk-hse { |
338a6aaa MC |
53 | #clock-cells = <0>; |
54 | compatible = "fixed-clock"; | |
9dc24a2d | 55 | clock-frequency = <0>; |
338a6aaa MC |
56 | }; |
57 | }; | |
58 | ||
59 | soc { | |
60 | timer2: timer@40000000 { | |
61 | compatible = "st,stm32-timer"; | |
62 | reg = <0x40000000 0x400>; | |
63 | interrupts = <28>; | |
9dc24a2d | 64 | clocks = <&rcc 0 128>; |
338a6aaa MC |
65 | status = "disabled"; |
66 | }; | |
67 | ||
68 | timer3: timer@40000400 { | |
69 | compatible = "st,stm32-timer"; | |
70 | reg = <0x40000400 0x400>; | |
71 | interrupts = <29>; | |
9dc24a2d | 72 | clocks = <&rcc 0 129>; |
338a6aaa MC |
73 | status = "disabled"; |
74 | }; | |
75 | ||
76 | timer4: timer@40000800 { | |
77 | compatible = "st,stm32-timer"; | |
78 | reg = <0x40000800 0x400>; | |
79 | interrupts = <30>; | |
9dc24a2d | 80 | clocks = <&rcc 0 130>; |
338a6aaa MC |
81 | status = "disabled"; |
82 | }; | |
83 | ||
84 | timer5: timer@40000c00 { | |
85 | compatible = "st,stm32-timer"; | |
86 | reg = <0x40000c00 0x400>; | |
87 | interrupts = <50>; | |
9dc24a2d | 88 | clocks = <&rcc 0 131>; |
338a6aaa MC |
89 | }; |
90 | ||
91 | timer6: timer@40001000 { | |
92 | compatible = "st,stm32-timer"; | |
93 | reg = <0x40001000 0x400>; | |
94 | interrupts = <54>; | |
9dc24a2d | 95 | clocks = <&rcc 0 132>; |
338a6aaa MC |
96 | status = "disabled"; |
97 | }; | |
98 | ||
99 | timer7: timer@40001400 { | |
100 | compatible = "st,stm32-timer"; | |
101 | reg = <0x40001400 0x400>; | |
102 | interrupts = <55>; | |
9dc24a2d | 103 | clocks = <&rcc 0 133>; |
338a6aaa MC |
104 | status = "disabled"; |
105 | }; | |
106 | ||
107 | usart2: serial@40004400 { | |
108 | compatible = "st,stm32-usart", "st,stm32-uart"; | |
109 | reg = <0x40004400 0x400>; | |
110 | interrupts = <38>; | |
9dc24a2d | 111 | clocks = <&rcc 0 145>; |
338a6aaa MC |
112 | status = "disabled"; |
113 | }; | |
114 | ||
115 | usart3: serial@40004800 { | |
116 | compatible = "st,stm32-usart", "st,stm32-uart"; | |
117 | reg = <0x40004800 0x400>; | |
118 | interrupts = <39>; | |
9dc24a2d | 119 | clocks = <&rcc 0 146>; |
338a6aaa MC |
120 | status = "disabled"; |
121 | }; | |
122 | ||
123 | usart4: serial@40004c00 { | |
124 | compatible = "st,stm32-uart"; | |
125 | reg = <0x40004c00 0x400>; | |
126 | interrupts = <52>; | |
9dc24a2d | 127 | clocks = <&rcc 0 147>; |
338a6aaa MC |
128 | status = "disabled"; |
129 | }; | |
130 | ||
131 | usart5: serial@40005000 { | |
132 | compatible = "st,stm32-uart"; | |
133 | reg = <0x40005000 0x400>; | |
134 | interrupts = <53>; | |
9dc24a2d | 135 | clocks = <&rcc 0 148>; |
338a6aaa MC |
136 | status = "disabled"; |
137 | }; | |
138 | ||
139 | usart7: serial@40007800 { | |
140 | compatible = "st,stm32-usart", "st,stm32-uart"; | |
141 | reg = <0x40007800 0x400>; | |
142 | interrupts = <82>; | |
9dc24a2d | 143 | clocks = <&rcc 0 158>; |
338a6aaa MC |
144 | status = "disabled"; |
145 | }; | |
146 | ||
147 | usart8: serial@40007c00 { | |
148 | compatible = "st,stm32-usart", "st,stm32-uart"; | |
149 | reg = <0x40007c00 0x400>; | |
150 | interrupts = <83>; | |
9dc24a2d | 151 | clocks = <&rcc 0 159>; |
338a6aaa MC |
152 | status = "disabled"; |
153 | }; | |
154 | ||
155 | usart1: serial@40011000 { | |
156 | compatible = "st,stm32-usart", "st,stm32-uart"; | |
157 | reg = <0x40011000 0x400>; | |
158 | interrupts = <37>; | |
9dc24a2d | 159 | clocks = <&rcc 0 164>; |
338a6aaa MC |
160 | status = "disabled"; |
161 | }; | |
162 | ||
163 | usart6: serial@40011400 { | |
164 | compatible = "st,stm32-usart", "st,stm32-uart"; | |
165 | reg = <0x40011400 0x400>; | |
166 | interrupts = <71>; | |
9dc24a2d | 167 | clocks = <&rcc 0 165>; |
338a6aaa MC |
168 | status = "disabled"; |
169 | }; | |
9dc24a2d DT |
170 | |
171 | rcc: rcc@40023810 { | |
172 | #clock-cells = <2>; | |
173 | compatible = "st,stm32f42xx-rcc", "st,stm32-rcc"; | |
174 | reg = <0x40023800 0x400>; | |
175 | clocks = <&clk_hse>; | |
176 | }; | |
b47c9fab DT |
177 | |
178 | rng: rng@50060800 { | |
179 | compatible = "st,stm32-rng"; | |
180 | reg = <0x50060800 0x400>; | |
181 | interrupts = <80>; | |
182 | clocks = <&rcc 0 38>; | |
183 | }; | |
338a6aaa MC |
184 | }; |
185 | }; | |
186 | ||
187 | &systick { | |
9dc24a2d | 188 | clocks = <&rcc 1 0>; |
338a6aaa MC |
189 | status = "okay"; |
190 | }; |