[deliverable/linux.git] / arch / arm / boot / dts / tegra20-colibri-512.dtsi

#include "tegra20.dtsi"

/ {
	model = "Toradex Colibri T20 512MB";
	compatible = "toradex,colibri_t20-512", "nvidia,tegra20";

	aliases {
		rtc0 = "/i2c@7000d000/tps6586x@34";
		rtc1 = "/rtc@7000e000";
	};

	memory {
		reg = <0x00000000 0x20000000>;
	};

	host1x@50000000 {
		hdmi@54280000 {
			vdd-supply = <&hdmi_vdd_reg>;
			pll-supply = <&hdmi_pll_reg>;

			nvidia,ddc-i2c-bus = <&i2c_ddc>;
			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
				GPIO_ACTIVE_HIGH>;
		};
	};

	pinmux@70000014 {
		pinctrl-names = "default";
		pinctrl-0 = <&state_default>;

		state_default: pinmux {
			audio_refclk {
				nvidia,pins = "cdev1";
				nvidia,function = "plla_out";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			crt {
				nvidia,pins = "crtp";
				nvidia,function = "crt";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			dap3 {
				nvidia,pins = "dap3";
				nvidia,function = "dap3";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			displaya {
				nvidia,pins = "ld0", "ld1", "ld2", "ld3",
					"ld4", "ld5", "ld6", "ld7", "ld8",
					"ld9", "ld10", "ld11", "ld12", "ld13",
					"ld14", "ld15", "ld16", "ld17",
					"lhs", "lpw0", "lpw2", "lsc0",
					"lsc1", "lsck", "lsda", "lspi", "lvs";
				nvidia,function = "displaya";
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			gpio_dte {
				nvidia,pins = "dte";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			gpio_gmi {
				nvidia,pins = "ata", "atc", "atd", "ate",
					"dap1", "dap2", "dap4", "gpu", "irrx",
					"irtx", "spia", "spib", "spic";
				nvidia,function = "gmi";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			gpio_pta {
				nvidia,pins = "pta";
				nvidia,function = "rsvd4";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			gpio_uac {
				nvidia,pins = "uac";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			hdint {
				nvidia,pins = "hdint";
				nvidia,function = "hdmi";
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			i2c1 {
				nvidia,pins = "rm";
				nvidia,function = "i2c1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			i2c3 {
				nvidia,pins = "dtf";
				nvidia,function = "i2c3";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			i2cddc {
				nvidia,pins = "ddc";
				nvidia,function = "i2c2";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			i2cp {
				nvidia,pins = "i2cp";
				nvidia,function = "i2cp";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			irda {
				nvidia,pins = "uad";
				nvidia,function = "irda";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			nand {
				nvidia,pins = "kbca", "kbcc", "kbcd",
					"kbce", "kbcf";
				nvidia,function = "nand";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			owc {
				nvidia,pins = "owc";
				nvidia,function = "owr";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			pmc {
				nvidia,pins = "pmc";
				nvidia,function = "pwr_on";
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			pwm {
				nvidia,pins = "sdb", "sdc", "sdd";
				nvidia,function = "pwm";
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			sdio4 {
				nvidia,pins = "atb", "gma", "gme";
				nvidia,function = "sdio4";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			spi1 {
				nvidia,pins = "spid", "spie", "spif";
				nvidia,function = "spi1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			spi4 {
				nvidia,pins = "slxa", "slxc", "slxd", "slxk";
				nvidia,function = "spi4";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			uarta {
				nvidia,pins = "sdio1";
				nvidia,function = "uarta";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			uartd {
				nvidia,pins = "gmc";
				nvidia,function = "uartd";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			ulpi {
				nvidia,pins = "uaa", "uab", "uda";
				nvidia,function = "ulpi";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			ulpi_refclk {
				nvidia,pins = "cdev2";
				nvidia,function = "pllp_out4";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			usb_gpio {
				nvidia,pins = "spig", "spih";
				nvidia,function = "spi2_alt";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			vi {
				nvidia,pins = "dta", "dtb", "dtc", "dtd";
				nvidia,function = "vi";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			vi_sc {
				nvidia,pins = "csus";
				nvidia,function = "vi_sensor_clk";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
		};
	};

	ac97: ac97@70002000 {
		status = "okay";
		nvidia,codec-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
			GPIO_ACTIVE_HIGH>;
		nvidia,codec-sync-gpio = <&gpio TEGRA_GPIO(P, 0)
			GPIO_ACTIVE_HIGH>;
	};

	i2c@7000c000 {
		clock-frequency = <400000>;
	};

	i2c_ddc: i2c@7000c400 {
		clock-frequency = <100000>;
	};

	i2c@7000c500 {
		clock-frequency = <400000>;
	};

	i2c@7000d000 {
		status = "okay";
		clock-frequency = <400000>;

		pmic: tps6586x@34 {
			compatible = "ti,tps6586x";
			reg = <0x34>;
			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;

			ti,system-power-controller;

			#gpio-cells = <2>;
			gpio-controller;

			sys-supply = <&vdd_3v3_reg>;
			vin-sm0-supply = <&sys_reg>;
			vin-sm1-supply = <&sys_reg>;
			vin-sm2-supply = <&sys_reg>;
			vinldo01-supply = <&sm2_reg>;
			vinldo23-supply = <&vdd_3v3_reg>;
			vinldo4-supply = <&vdd_3v3_reg>;
			vinldo678-supply = <&vdd_3v3_reg>;
			vinldo9-supply = <&vdd_3v3_reg>;

			regulators {
				#address-cells = <1>;
				#size-cells = <0>;

				sys_reg: regulator@0 {
					reg = <0>;
					regulator-compatible = "sys";
					regulator-name = "vdd_sys";
					regulator-always-on;
				};

				regulator@1 {
					reg = <1>;
					regulator-compatible = "sm0";
					regulator-name = "vdd_sm0,vdd_core";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
					regulator-always-on;
				};

				regulator@2 {
					reg = <2>;
					regulator-compatible = "sm1";
					regulator-name = "vdd_sm1,vdd_cpu";
					regulator-min-microvolt = <1000000>;
					regulator-max-microvolt = <1000000>;
					regulator-always-on;
				};

				sm2_reg: regulator@3 {
					reg = <3>;
					regulator-compatible = "sm2";
					regulator-name = "vdd_sm2,vin_ldo*";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
				};

				/* LDO0 is not connected to anything */

				regulator@5 {
					reg = <5>;
					regulator-compatible = "ldo1";
					regulator-name = "vdd_ldo1,avdd_pll*";
					regulator-min-microvolt = <1100000>;
					regulator-max-microvolt = <1100000>;
					regulator-always-on;
				};

				regulator@6 {
					reg = <6>;
					regulator-compatible = "ldo2";
					regulator-name = "vdd_ldo2,vdd_rtc";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
				};

				/* LDO3 is not connected to anything */

				regulator@8 {
					reg = <8>;
					regulator-compatible = "ldo4";
					regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
				};

				ldo5_reg: regulator@9 {
					reg = <9>;
					regulator-compatible = "ldo5";
					regulator-name = "vdd_ldo5,vdd_fuse";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					regulator-always-on;
				};

				regulator@10 {
					reg = <10>;
					regulator-compatible = "ldo6";
					regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
					regulator-min-microvolt = <2850000>;
					regulator-max-microvolt = <2850000>;
				};

				hdmi_vdd_reg: regulator@11 {
					reg = <11>;
					regulator-compatible = "ldo7";
					regulator-name = "vdd_ldo7,avdd_hdmi";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
				};

				hdmi_pll_reg: regulator@12 {
					reg = <12>;
					regulator-compatible = "ldo8";
					regulator-name = "vdd_ldo8,avdd_hdmi_pll";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};

				regulator@13 {
					reg = <13>;
					regulator-compatible = "ldo9";
					regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
					regulator-min-microvolt = <2850000>;
					regulator-max-microvolt = <2850000>;
					regulator-always-on;
				};

				regulator@14 {
					reg = <14>;
					regulator-compatible = "ldo_rtc";
					regulator-name = "vdd_rtc_out,vdd_cell";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					regulator-always-on;
				};
			};
		};

		temperature-sensor@4c {
			compatible = "national,lm95245";
			reg = <0x4c>;
		};
	};

	pmc@7000e400 {
		nvidia,suspend-mode = <1>;
		nvidia,cpu-pwr-good-time = <5000>;
		nvidia,cpu-pwr-off-time = <5000>;
		nvidia,core-pwr-good-time = <3845 3845>;
		nvidia,core-pwr-off-time = <3875>;
		nvidia,sys-clock-req-active-high;
	};

	memory-controller@7000f400 {
		emc-table@83250 {
			reg = <83250>;
			compatible = "nvidia,tegra20-emc-table";
			clock-frequency = <83250>;
			nvidia,emc-registers =   <0x00000005 0x00000011
				0x00000004 0x00000002 0x00000004 0x00000004
				0x00000001 0x0000000a 0x00000002 0x00000002
				0x00000001 0x00000001 0x00000003 0x00000004
				0x00000003 0x00000009 0x0000000c 0x0000025f
				0x00000000 0x00000003 0x00000003 0x00000002
				0x00000002 0x00000001 0x00000008 0x000000c8
				0x00000003 0x00000005 0x00000003 0x0000000c
				0x00000002 0x00000000 0x00000000 0x00000002
				0x00000000 0x00000000 0x00000083 0x00520006
				0x00000010 0x00000008 0x00000000 0x00000000
				0x00000000 0x00000000 0x00000000 0x00000000>;
		};
		emc-table@133200 {
			reg = <133200>;
			compatible = "nvidia,tegra20-emc-table";
			clock-frequency = <133200>;
			nvidia,emc-registers =   <0x00000008 0x00000019
				0x00000006 0x00000002 0x00000004 0x00000004
				0x00000001 0x0000000a 0x00000002 0x00000002
				0x00000002 0x00000001 0x00000003 0x00000004
				0x00000003 0x00000009 0x0000000c 0x0000039f
				0x00000000 0x00000003 0x00000003 0x00000002
				0x00000002 0x00000001 0x00000008 0x000000c8
				0x00000003 0x00000007 0x00000003 0x0000000c
				0x00000002 0x00000000 0x00000000 0x00000002
				0x00000000 0x00000000 0x00000083 0x00510006
				0x00000010 0x00000008 0x00000000 0x00000000
				0x00000000 0x00000000 0x00000000 0x00000000>;
		};
		emc-table@166500 {
			reg = <166500>;
			compatible = "nvidia,tegra20-emc-table";
			clock-frequency = <166500>;
			nvidia,emc-registers =   <0x0000000a 0x00000021
				0x00000008 0x00000003 0x00000004 0x00000004
				0x00000002 0x0000000a 0x00000003 0x00000003
				0x00000002 0x00000001 0x00000003 0x00000004
				0x00000003 0x00000009 0x0000000c 0x000004df
				0x00000000 0x00000003 0x00000003 0x00000003
				0x00000003 0x00000001 0x00000009 0x000000c8
				0x00000003 0x00000009 0x00000004 0x0000000c
				0x00000002 0x00000000 0x00000000 0x00000002
				0x00000000 0x00000000 0x00000083 0x004f0006
				0x00000010 0x00000008 0x00000000 0x00000000
				0x00000000 0x00000000 0x00000000 0x00000000>;
		};
		emc-table@333000 {
			reg = <333000>;
			compatible = "nvidia,tegra20-emc-table";
			clock-frequency = <333000>;
			nvidia,emc-registers =   <0x00000014 0x00000041
				0x0000000f 0x00000005 0x00000004 0x00000005
				0x00000003 0x0000000a 0x00000005 0x00000005
				0x00000004 0x00000001 0x00000003 0x00000004
				0x00000003 0x00000009 0x0000000c 0x000009ff
				0x00000000 0x00000003 0x00000003 0x00000005
				0x00000005 0x00000001 0x0000000e 0x000000c8
				0x00000003 0x00000011 0x00000006 0x0000000c
				0x00000002 0x00000000 0x00000000 0x00000002
				0x00000000 0x00000000 0x00000083 0x00380006
				0x00000010 0x00000008 0x00000000 0x00000000
				0x00000000 0x00000000 0x00000000 0x00000000>;
		};
	};

	usb@c5004000 {
		status = "okay";
		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
			GPIO_ACTIVE_LOW>;
	};

	usb-phy@c5004000 {
		status = "okay";
		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
			GPIO_ACTIVE_LOW>;
	};

	sdhci@c8000600 {
		cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>;
	};

	clocks {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		clk32k_in: clock@0 {
			compatible = "fixed-clock";
			reg=<0>;
			#clock-cells = <0>;
			clock-frequency = <32768>;
		};
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		vdd_3v3_reg: regulator@100 {
			compatible = "regulator-fixed";
			reg = <100>;
			regulator-name = "vdd_3v3";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		regulator@101 {
			compatible = "regulator-fixed";
			reg = <101>;
			regulator-name = "internal_usb";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-boot-on;
			regulator-always-on;
			gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>;
		};
	};

	sound {
		compatible = "nvidia,tegra-audio-wm9712-colibri_t20",
			         "nvidia,tegra-audio-wm9712";
		nvidia,model = "Colibri T20 AC97 Audio";

		nvidia,audio-routing =
			"Headphone", "HPOUTL",
			"Headphone", "HPOUTR",
			"LineIn", "LINEINL",
			"LineIn", "LINEINR",
			"Mic", "MIC1";

		nvidia,ac97-controller = <&ac97>;

		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
			 <&tegra_car TEGRA20_CLK_CDEV1>;
		clock-names = "pll_a", "pll_a_out0", "mclk";
	};
};
Commit	Line	Data
1bd0bd49	1	#include "tegra20.dtsi"
fc9c713a LS	2
	3	/ {
	4	model = "Toradex Colibri T20 512MB";
	5	compatible = "toradex,colibri_t20-512", "nvidia,tegra20";
	6
553c0a20 SW	7	aliases {
	8	rtc0 = "/i2c@7000d000/tps6586x@34";
	9	rtc1 = "/rtc@7000e000";
	10	};
	11
fc9c713a LS	12	memory {
	13	reg = <0x00000000 0x20000000>;
	14	};
	15
58ecb23f SW	16	host1x@50000000 {
58ecb23f SW	17	hdmi@54280000 {
fc9c713a LS	18	vdd-supply = <&hdmi_vdd_reg>;
	19	pll-supply = <&hdmi_pll_reg>;
	20
	21	nvidia,ddc-i2c-bus = <&i2c_ddc>;
3325f1bc SW	22	nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
3325f1bc SW	23	GPIO_ACTIVE_HIGH>;
fc9c713a LS	24	};
	25	};
	26
58ecb23f	27	pinmux@70000014 {
fc9c713a LS	28	pinctrl-names = "default";
	29	pinctrl-0 = <&state_default>;
	30
	31	state_default: pinmux {
	32	audio_refclk {
	33	nvidia,pins = "cdev1";
	34	nvidia,function = "plla_out";
ba4104e7 LD	35	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	36	nvidia,tristate = <TEGRA_PIN_DISABLE>;
fc9c713a LS	37	};
	38	crt {
	39	nvidia,pins = "crtp";
	40	nvidia,function = "crt";
ba4104e7 LD	41	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	42	nvidia,tristate = <TEGRA_PIN_ENABLE>;
fc9c713a LS	43	};
	44	dap3 {
	45	nvidia,pins = "dap3";
	46	nvidia,function = "dap3";
ba4104e7 LD	47	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	48	nvidia,tristate = <TEGRA_PIN_DISABLE>;
fc9c713a LS	49	};
	50	displaya {
	51	nvidia,pins = "ld0", "ld1", "ld2", "ld3",
	52	"ld4", "ld5", "ld6", "ld7", "ld8",
	53	"ld9", "ld10", "ld11", "ld12", "ld13",
	54	"ld14", "ld15", "ld16", "ld17",
	55	"lhs", "lpw0", "lpw2", "lsc0",
	56	"lsc1", "lsck", "lsda", "lspi", "lvs";
	57	nvidia,function = "displaya";
ba4104e7	58	nvidia,tristate = <TEGRA_PIN_ENABLE>;
fc9c713a LS	59	};
	60	gpio_dte {
	61	nvidia,pins = "dte";
	62	nvidia,function = "rsvd1";
ba4104e7 LD	63	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	64	nvidia,tristate = <TEGRA_PIN_DISABLE>;
fc9c713a LS	65	};
	66	gpio_gmi {
	67	nvidia,pins = "ata", "atc", "atd", "ate",
	68	"dap1", "dap2", "dap4", "gpu", "irrx",
	69	"irtx", "spia", "spib", "spic";
	70	nvidia,function = "gmi";
ba4104e7 LD	71	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	72	nvidia,tristate = <TEGRA_PIN_DISABLE>;
fc9c713a LS	73	};
	74	gpio_pta {
	75	nvidia,pins = "pta";
	76	nvidia,function = "rsvd4";
ba4104e7 LD	77	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	78	nvidia,tristate = <TEGRA_PIN_DISABLE>;
fc9c713a LS	79	};
	80	gpio_uac {
	81	nvidia,pins = "uac";
	82	nvidia,function = "rsvd2";
ba4104e7 LD	83	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	84	nvidia,tristate = <TEGRA_PIN_DISABLE>;
fc9c713a LS	85	};
	86	hdint {
	87	nvidia,pins = "hdint";
	88	nvidia,function = "hdmi";
ba4104e7	89	nvidia,tristate = <TEGRA_PIN_ENABLE>;
fc9c713a LS	90	};
	91	i2c1 {
	92	nvidia,pins = "rm";
	93	nvidia,function = "i2c1";
ba4104e7 LD	94	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	95	nvidia,tristate = <TEGRA_PIN_ENABLE>;
fc9c713a LS	96	};
	97	i2c3 {
	98	nvidia,pins = "dtf";
	99	nvidia,function = "i2c3";
ba4104e7 LD	100	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	101	nvidia,tristate = <TEGRA_PIN_ENABLE>;
fc9c713a LS	102	};
	103	i2cddc {
	104	nvidia,pins = "ddc";
	105	nvidia,function = "i2c2";
ba4104e7 LD	106	nvidia,pull = <TEGRA_PIN_PULL_UP>;
ba4104e7 LD	107	nvidia,tristate = <TEGRA_PIN_ENABLE>;
fc9c713a LS	108	};
	109	i2cp {
	110	nvidia,pins = "i2cp";
	111	nvidia,function = "i2cp";
ba4104e7 LD	112	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	113	nvidia,tristate = <TEGRA_PIN_DISABLE>;
fc9c713a LS	114	};
	115	irda {
	116	nvidia,pins = "uad";
	117	nvidia,function = "irda";
ba4104e7 LD	118	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	119	nvidia,tristate = <TEGRA_PIN_ENABLE>;
fc9c713a LS	120	};
	121	nand {
	122	nvidia,pins = "kbca", "kbcc", "kbcd",
	123	"kbce", "kbcf";
	124	nvidia,function = "nand";
ba4104e7 LD	125	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	126	nvidia,tristate = <TEGRA_PIN_DISABLE>;
fc9c713a LS	127	};
	128	owc {
	129	nvidia,pins = "owc";
	130	nvidia,function = "owr";
ba4104e7 LD	131	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	132	nvidia,tristate = <TEGRA_PIN_ENABLE>;
fc9c713a LS	133	};
	134	pmc {
	135	nvidia,pins = "pmc";
	136	nvidia,function = "pwr_on";
ba4104e7	137	nvidia,tristate = <TEGRA_PIN_DISABLE>;
fc9c713a LS	138	};
	139	pwm {
	140	nvidia,pins = "sdb", "sdc", "sdd";
	141	nvidia,function = "pwm";
ba4104e7	142	nvidia,tristate = <TEGRA_PIN_ENABLE>;
fc9c713a LS	143	};
	144	sdio4 {
	145	nvidia,pins = "atb", "gma", "gme";
	146	nvidia,function = "sdio4";
ba4104e7 LD	147	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	148	nvidia,tristate = <TEGRA_PIN_ENABLE>;
fc9c713a LS	149	};
	150	spi1 {
	151	nvidia,pins = "spid", "spie", "spif";
	152	nvidia,function = "spi1";
ba4104e7 LD	153	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	154	nvidia,tristate = <TEGRA_PIN_ENABLE>;
fc9c713a LS	155	};
	156	spi4 {
	157	nvidia,pins = "slxa", "slxc", "slxd", "slxk";
	158	nvidia,function = "spi4";
ba4104e7 LD	159	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	160	nvidia,tristate = <TEGRA_PIN_ENABLE>;
fc9c713a LS	161	};
	162	uarta {
	163	nvidia,pins = "sdio1";
	164	nvidia,function = "uarta";
ba4104e7 LD	165	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	166	nvidia,tristate = <TEGRA_PIN_ENABLE>;
fc9c713a LS	167	};
	168	uartd {
	169	nvidia,pins = "gmc";
	170	nvidia,function = "uartd";
ba4104e7 LD	171	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	172	nvidia,tristate = <TEGRA_PIN_ENABLE>;
fc9c713a LS	173	};
	174	ulpi {
	175	nvidia,pins = "uaa", "uab", "uda";
	176	nvidia,function = "ulpi";
ba4104e7 LD	177	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	178	nvidia,tristate = <TEGRA_PIN_DISABLE>;
fc9c713a LS	179	};
	180	ulpi_refclk {
	181	nvidia,pins = "cdev2";
	182	nvidia,function = "pllp_out4";
ba4104e7 LD	183	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	184	nvidia,tristate = <TEGRA_PIN_DISABLE>;
fc9c713a LS	185	};
	186	usb_gpio {
	187	nvidia,pins = "spig", "spih";
	188	nvidia,function = "spi2_alt";
ba4104e7 LD	189	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	190	nvidia,tristate = <TEGRA_PIN_DISABLE>;
fc9c713a LS	191	};
	192	vi {
	193	nvidia,pins = "dta", "dtb", "dtc", "dtd";
	194	nvidia,function = "vi";
ba4104e7 LD	195	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	196	nvidia,tristate = <TEGRA_PIN_ENABLE>;
fc9c713a LS	197	};
	198	vi_sc {
	199	nvidia,pins = "csus";
	200	nvidia,function = "vi_sensor_clk";
ba4104e7 LD	201	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	202	nvidia,tristate = <TEGRA_PIN_ENABLE>;
fc9c713a LS	203	};
	204	};
	205	};
	206
57899053 SW	207	ac97: ac97@70002000 {
	208	status = "okay";
	209	nvidia,codec-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
	210	GPIO_ACTIVE_HIGH>;
	211	nvidia,codec-sync-gpio = <&gpio TEGRA_GPIO(P, 0)
	212	GPIO_ACTIVE_HIGH>;
	213	};
	214
fc9c713a LS	215	i2c@7000c000 {
	216	clock-frequency = <400000>;
	217	};
	218
	219	i2c_ddc: i2c@7000c400 {
	220	clock-frequency = <100000>;
	221	};
	222
	223	i2c@7000c500 {
	224	clock-frequency = <400000>;
	225	};
	226
	227	i2c@7000d000 {
	228	status = "okay";
	229	clock-frequency = <400000>;
	230
	231	pmic: tps6586x@34 {
	232	compatible = "ti,tps6586x";
	233	reg = <0x34>;
6cecf916	234	interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
fc9c713a LS	235
	236	ti,system-power-controller;
	237
	238	#gpio-cells = <2>;
	239	gpio-controller;
	240
c7ac2b7b	241	sys-supply = <&vdd_3v3_reg>;
fc9c713a LS	242	vin-sm0-supply = <&sys_reg>;
	243	vin-sm1-supply = <&sys_reg>;
	244	vin-sm2-supply = <&sys_reg>;
	245	vinldo01-supply = <&sm2_reg>;
c7ac2b7b SA	246	vinldo23-supply = <&vdd_3v3_reg>;
	247	vinldo4-supply = <&vdd_3v3_reg>;
	248	vinldo678-supply = <&vdd_3v3_reg>;
	249	vinldo9-supply = <&vdd_3v3_reg>;
fc9c713a LS	250
	251	regulators {
	252	#address-cells = <1>;
	253	#size-cells = <0>;
	254
	255	sys_reg: regulator@0 {
	256	reg = <0>;
	257	regulator-compatible = "sys";
	258	regulator-name = "vdd_sys";
	259	regulator-always-on;
	260	};
	261
	262	regulator@1 {
	263	reg = <1>;
	264	regulator-compatible = "sm0";
	265	regulator-name = "vdd_sm0,vdd_core";
c7ac2b7b SA	266	regulator-min-microvolt = <1200000>;
c7ac2b7b SA	267	regulator-max-microvolt = <1200000>;
fc9c713a LS	268	regulator-always-on;
	269	};
	270
	271	regulator@2 {
	272	reg = <2>;
	273	regulator-compatible = "sm1";
	274	regulator-name = "vdd_sm1,vdd_cpu";
c7ac2b7b SA	275	regulator-min-microvolt = <1000000>;
c7ac2b7b SA	276	regulator-max-microvolt = <1000000>;
fc9c713a LS	277	regulator-always-on;
	278	};
	279
	280	sm2_reg: regulator@3 {
	281	reg = <3>;
	282	regulator-compatible = "sm2";
	283	regulator-name = "vdd_sm2,vin_ldo*";
844a4f0d SA	284	regulator-min-microvolt = <1800000>;
844a4f0d SA	285	regulator-max-microvolt = <1800000>;
fc9c713a LS	286	regulator-always-on;
	287	};
	288
	289	/* LDO0 is not connected to anything */
	290
	291	regulator@5 {
	292	reg = <5>;
	293	regulator-compatible = "ldo1";
	294	regulator-name = "vdd_ldo1,avdd_pll*";
	295	regulator-min-microvolt = <1100000>;
	296	regulator-max-microvolt = <1100000>;
	297	regulator-always-on;
	298	};
	299
	300	regulator@6 {
	301	reg = <6>;
	302	regulator-compatible = "ldo2";
	303	regulator-name = "vdd_ldo2,vdd_rtc";
	304	regulator-min-microvolt = <1200000>;
	305	regulator-max-microvolt = <1200000>;
	306	};
	307
	308	/* LDO3 is not connected to anything */
	309
	310	regulator@8 {
	311	reg = <8>;
	312	regulator-compatible = "ldo4";
	313	regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
	314	regulator-min-microvolt = <1800000>;
	315	regulator-max-microvolt = <1800000>;
	316	regulator-always-on;
	317	};
	318
	319	ldo5_reg: regulator@9 {
	320	reg = <9>;
	321	regulator-compatible = "ldo5";
	322	regulator-name = "vdd_ldo5,vdd_fuse";
	323	regulator-min-microvolt = <3300000>;
	324	regulator-max-microvolt = <3300000>;
	325	regulator-always-on;
	326	};
	327
	328	regulator@10 {
	329	reg = <10>;
	330	regulator-compatible = "ldo6";
	331	regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
c7ac2b7b SA	332	regulator-min-microvolt = <2850000>;
c7ac2b7b SA	333	regulator-max-microvolt = <2850000>;
fc9c713a LS	334	};
	335
	336	hdmi_vdd_reg: regulator@11 {
	337	reg = <11>;
	338	regulator-compatible = "ldo7";
	339	regulator-name = "vdd_ldo7,avdd_hdmi";
	340	regulator-min-microvolt = <3300000>;
	341	regulator-max-microvolt = <3300000>;
	342	};
	343
	344	hdmi_pll_reg: regulator@12 {
	345	reg = <12>;
	346	regulator-compatible = "ldo8";
	347	regulator-name = "vdd_ldo8,avdd_hdmi_pll";
	348	regulator-min-microvolt = <1800000>;
	349	regulator-max-microvolt = <1800000>;
	350	};
	351
	352	regulator@13 {
	353	reg = <13>;
	354	regulator-compatible = "ldo9";
	355	regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
	356	regulator-min-microvolt = <2850000>;
	357	regulator-max-microvolt = <2850000>;
	358	regulator-always-on;
	359	};
	360
	361	regulator@14 {
	362	reg = <14>;
	363	regulator-compatible = "ldo_rtc";
	364	regulator-name = "vdd_rtc_out,vdd_cell";
	365	regulator-min-microvolt = <3300000>;
	366	regulator-max-microvolt = <3300000>;
	367	regulator-always-on;
	368	};
	369	};
	370	};
	371
	372	temperature-sensor@4c {
	373	compatible = "national,lm95245";
	374	reg = <0x4c>;
	375	};
	376	};
	377
58ecb23f	378	pmc@7000e400 {
47d2d63b	379	nvidia,suspend-mode = <1>;
a44a019d JL	380	nvidia,cpu-pwr-good-time = <5000>;
	381	nvidia,cpu-pwr-off-time = <5000>;
	382	nvidia,core-pwr-good-time = <3845 3845>;
	383	nvidia,core-pwr-off-time = <3875>;
	384	nvidia,sys-clock-req-active-high;
	385	};
	386
fc9c713a LS	387	memory-controller@7000f400 {
	388	emc-table@83250 {
	389	reg = <83250>;
	390	compatible = "nvidia,tegra20-emc-table";
	391	clock-frequency = <83250>;
	392	nvidia,emc-registers = <0x00000005 0x00000011
	393	0x00000004 0x00000002 0x00000004 0x00000004
	394	0x00000001 0x0000000a 0x00000002 0x00000002
	395	0x00000001 0x00000001 0x00000003 0x00000004
	396	0x00000003 0x00000009 0x0000000c 0x0000025f
	397	0x00000000 0x00000003 0x00000003 0x00000002
	398	0x00000002 0x00000001 0x00000008 0x000000c8
	399	0x00000003 0x00000005 0x00000003 0x0000000c
	400	0x00000002 0x00000000 0x00000000 0x00000002
	401	0x00000000 0x00000000 0x00000083 0x00520006
	402	0x00000010 0x00000008 0x00000000 0x00000000
	403	0x00000000 0x00000000 0x00000000 0x00000000>;
	404	};
	405	emc-table@133200 {
	406	reg = <133200>;
	407	compatible = "nvidia,tegra20-emc-table";
	408	clock-frequency = <133200>;
	409	nvidia,emc-registers = <0x00000008 0x00000019
	410	0x00000006 0x00000002 0x00000004 0x00000004
	411	0x00000001 0x0000000a 0x00000002 0x00000002
	412	0x00000002 0x00000001 0x00000003 0x00000004
	413	0x00000003 0x00000009 0x0000000c 0x0000039f
	414	0x00000000 0x00000003 0x00000003 0x00000002
	415	0x00000002 0x00000001 0x00000008 0x000000c8
	416	0x00000003 0x00000007 0x00000003 0x0000000c
	417	0x00000002 0x00000000 0x00000000 0x00000002
	418	0x00000000 0x00000000 0x00000083 0x00510006
	419	0x00000010 0x00000008 0x00000000 0x00000000
	420	0x00000000 0x00000000 0x00000000 0x00000000>;
	421	};
	422	emc-table@166500 {
	423	reg = <166500>;
	424	compatible = "nvidia,tegra20-emc-table";
	425	clock-frequency = <166500>;
	426	nvidia,emc-registers = <0x0000000a 0x00000021
	427	0x00000008 0x00000003 0x00000004 0x00000004
	428	0x00000002 0x0000000a 0x00000003 0x00000003
	429	0x00000002 0x00000001 0x00000003 0x00000004
	430	0x00000003 0x00000009 0x0000000c 0x000004df
	431	0x00000000 0x00000003 0x00000003 0x00000003
	432	0x00000003 0x00000001 0x00000009 0x000000c8
	433	0x00000003 0x00000009 0x00000004 0x0000000c
	434	0x00000002 0x00000000 0x00000000 0x00000002
	435	0x00000000 0x00000000 0x00000083 0x004f0006
	436	0x00000010 0x00000008 0x00000000 0x00000000
	437	0x00000000 0x00000000 0x00000000 0x00000000>;
	438	};
	439	emc-table@333000 {
	440	reg = <333000>;
	441	compatible = "nvidia,tegra20-emc-table";
	442	clock-frequency = <333000>;
	443	nvidia,emc-registers = <0x00000014 0x00000041
	444	0x0000000f 0x00000005 0x00000004 0x00000005
	445	0x00000003 0x0000000a 0x00000005 0x00000005
	446	0x00000004 0x00000001 0x00000003 0x00000004
	447	0x00000003 0x00000009 0x0000000c 0x000009ff
	448	0x00000000 0x00000003 0x00000003 0x00000005
	449	0x00000005 0x00000001 0x0000000e 0x000000c8
	450	0x00000003 0x00000011 0x00000006 0x0000000c
451	0x00000002 0x00000000 0x00000000 0x00000002
452	0x00000000 0x00000000 0x00000083 0x00380006
453	0x00000010 0x00000008 0x00000000 0x00000000
454	0x00000000 0x00000000 0x00000000 0x00000000>;
455	};
456	};
457
fc9c713a LS	458	usb@c5004000 {
fc9c713a LS	459	status = "okay";
3325f1bc SW	460	nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
3325f1bc SW	461	GPIO_ACTIVE_LOW>;
9dffe3be VB	462	};
	463
	464	usb-phy@c5004000 {
a1632ad3	465	status = "okay";
3325f1bc SW	466	nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
3325f1bc SW	467	GPIO_ACTIVE_LOW>;
fc9c713a LS	468	};
	469
	470	sdhci@c8000600 {
3325f1bc	471	cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>;
fc9c713a LS	472	};
fc9c713a LS	473
7021d122 JL	474	clocks {
	475	compatible = "simple-bus";
	476	#address-cells = <1>;
	477	#size-cells = <0>;
	478
58ecb23f	479	clk32k_in: clock@0 {
7021d122 JL	480	compatible = "fixed-clock";
	481	reg=<0>;
	482	#clock-cells = <0>;
	483	clock-frequency = <32768>;
	484	};
	485	};
	486
fc9c713a LS	487	regulators {
	488	compatible = "simple-bus";
	489	#address-cells = <1>;
	490	#size-cells = <0>;
	491
c7ac2b7b	492	vdd_3v3_reg: regulator@100 {
fc9c713a LS	493	compatible = "regulator-fixed";
fc9c713a LS	494	reg = <100>;
c7ac2b7b SA	495	regulator-name = "vdd_3v3";
	496	regulator-min-microvolt = <3300000>;
	497	regulator-max-microvolt = <3300000>;
fc9c713a LS	498	regulator-always-on;
	499	};
	500
	501	regulator@101 {
	502	compatible = "regulator-fixed";
	503	reg = <101>;
	504	regulator-name = "internal_usb";
	505	regulator-min-microvolt = <5000000>;
	506	regulator-max-microvolt = <5000000>;
	507	enable-active-high;
	508	regulator-boot-on;
	509	regulator-always-on;
3325f1bc	510	gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>;
fc9c713a LS	511	};
fc9c713a LS	512	};
57899053 SW	513
	514	sound {
	515	compatible = "nvidia,tegra-audio-wm9712-colibri_t20",
	516	"nvidia,tegra-audio-wm9712";
	517	nvidia,model = "Colibri T20 AC97 Audio";
	518
	519	nvidia,audio-routing =
	520	"Headphone", "HPOUTL",
	521	"Headphone", "HPOUTR",
	522	"LineIn", "LINEINL",
	523	"LineIn", "LINEINR",
	524	"Mic", "MIC1";
	525
	526	nvidia,ac97-controller = <&ac97>;
	527
	528	clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
	529	<&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
	530	<&tegra_car TEGRA20_CLK_CDEV1>;
	531	clock-names = "pll_a", "pll_a_out0", "mclk";
	532	};
fc9c713a	533	};