ARM: tegra: move serial clock-frequency attr into the Tegra20 dtsi
[deliverable/linux.git] / arch / arm / boot / dts / tegra20-harmony.dts
CommitLineData
8e267f3d
GL
1/dts-v1/;
2
8e267f3d
GL
3/include/ "tegra20.dtsi"
4
5/ {
8fef5dff 6 model = "NVIDIA Tegra20 Harmony evaluation board";
8e267f3d
GL
7 compatible = "nvidia,harmony", "nvidia,tegra20";
8
f9eb26a4 9 memory {
95decf84 10 reg = <0x00000000 0x40000000>;
8e267f3d
GL
11 };
12
20ffbd7d
SW
13 host1x {
14 hdmi {
15 status = "okay";
16
17 vdd-supply = <&hdmi_vdd_reg>;
18 pll-supply = <&hdmi_pll_reg>;
19
20 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
21 nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
22 };
23 };
24
f9eb26a4 25 pinmux {
ecc295bb
SW
26 pinctrl-names = "default";
27 pinctrl-0 = <&state_default>;
28
29 state_default: pinmux {
30 ata {
31 nvidia,pins = "ata";
32 nvidia,function = "ide";
33 };
34 atb {
35 nvidia,pins = "atb", "gma", "gme";
36 nvidia,function = "sdio4";
37 };
38 atc {
39 nvidia,pins = "atc";
40 nvidia,function = "nand";
41 };
42 atd {
43 nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
44 "spia", "spib", "spic";
45 nvidia,function = "gmi";
46 };
47 cdev1 {
48 nvidia,pins = "cdev1";
49 nvidia,function = "plla_out";
50 };
51 cdev2 {
52 nvidia,pins = "cdev2";
53 nvidia,function = "pllp_out4";
54 };
55 crtp {
56 nvidia,pins = "crtp";
57 nvidia,function = "crt";
58 };
59 csus {
60 nvidia,pins = "csus";
61 nvidia,function = "vi_sensor_clk";
62 };
63 dap1 {
64 nvidia,pins = "dap1";
65 nvidia,function = "dap1";
66 };
67 dap2 {
68 nvidia,pins = "dap2";
69 nvidia,function = "dap2";
70 };
71 dap3 {
72 nvidia,pins = "dap3";
73 nvidia,function = "dap3";
74 };
75 dap4 {
76 nvidia,pins = "dap4";
77 nvidia,function = "dap4";
78 };
79 ddc {
80 nvidia,pins = "ddc";
81 nvidia,function = "i2c2";
82 };
83 dta {
84 nvidia,pins = "dta", "dtd";
85 nvidia,function = "sdio2";
86 };
87 dtb {
88 nvidia,pins = "dtb", "dtc", "dte";
89 nvidia,function = "rsvd1";
90 };
91 dtf {
92 nvidia,pins = "dtf";
93 nvidia,function = "i2c3";
94 };
95 gmc {
96 nvidia,pins = "gmc";
97 nvidia,function = "uartd";
98 };
99 gpu7 {
100 nvidia,pins = "gpu7";
101 nvidia,function = "rtck";
102 };
103 gpv {
104 nvidia,pins = "gpv", "slxa", "slxk";
105 nvidia,function = "pcie";
106 };
107 hdint {
108 nvidia,pins = "hdint", "pta";
109 nvidia,function = "hdmi";
110 };
111 i2cp {
112 nvidia,pins = "i2cp";
113 nvidia,function = "i2cp";
114 };
115 irrx {
116 nvidia,pins = "irrx", "irtx";
117 nvidia,function = "uarta";
118 };
119 kbca {
120 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
121 "kbce", "kbcf";
122 nvidia,function = "kbc";
123 };
124 lcsn {
125 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
126 "ld3", "ld4", "ld5", "ld6", "ld7",
127 "ld8", "ld9", "ld10", "ld11", "ld12",
128 "ld13", "ld14", "ld15", "ld16", "ld17",
129 "ldc", "ldi", "lhp0", "lhp1", "lhp2",
130 "lhs", "lm0", "lm1", "lpp", "lpw0",
131 "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
132 "lsda", "lsdi", "lspi", "lvp0", "lvp1",
133 "lvs";
134 nvidia,function = "displaya";
135 };
136 owc {
137 nvidia,pins = "owc", "spdi", "spdo", "uac";
138 nvidia,function = "rsvd2";
139 };
140 pmc {
141 nvidia,pins = "pmc";
142 nvidia,function = "pwr_on";
143 };
144 rm {
145 nvidia,pins = "rm";
146 nvidia,function = "i2c1";
147 };
148 sdb {
149 nvidia,pins = "sdb", "sdc", "sdd";
150 nvidia,function = "pwm";
151 };
152 sdio1 {
153 nvidia,pins = "sdio1";
154 nvidia,function = "sdio1";
155 };
156 slxc {
157 nvidia,pins = "slxc", "slxd";
158 nvidia,function = "spdif";
159 };
160 spid {
161 nvidia,pins = "spid", "spie", "spif";
162 nvidia,function = "spi1";
163 };
164 spig {
165 nvidia,pins = "spig", "spih";
166 nvidia,function = "spi2_alt";
167 };
168 uaa {
169 nvidia,pins = "uaa", "uab", "uda";
170 nvidia,function = "ulpi";
171 };
172 uad {
173 nvidia,pins = "uad";
174 nvidia,function = "irda";
175 };
176 uca {
177 nvidia,pins = "uca", "ucb";
178 nvidia,function = "uartc";
179 };
180 conf_ata {
181 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
563da21b
SW
182 "cdev1", "cdev2", "dap1", "dtb", "gma",
183 "gmb", "gmc", "gmd", "gme", "gpu7",
184 "gpv", "i2cp", "pta", "rm", "slxa",
185 "slxk", "spia", "spib", "uac";
ecc295bb
SW
186 nvidia,pull = <0>;
187 nvidia,tristate = <0>;
188 };
ecc295bb
SW
189 conf_ck32 {
190 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
191 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
192 nvidia,pull = <0>;
193 };
563da21b
SW
194 conf_csus {
195 nvidia,pins = "csus", "spid", "spif";
196 nvidia,pull = <1>;
197 nvidia,tristate = <1>;
198 };
ecc295bb
SW
199 conf_crtp {
200 nvidia,pins = "crtp", "dap2", "dap3", "dap4",
201 "dtc", "dte", "dtf", "gpu", "sdio1",
202 "slxc", "slxd", "spdi", "spdo", "spig",
563da21b 203 "uda";
ecc295bb
SW
204 nvidia,pull = <0>;
205 nvidia,tristate = <1>;
206 };
207 conf_ddc {
208 nvidia,pins = "ddc", "dta", "dtd", "kbca",
209 "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
210 "sdc";
211 nvidia,pull = <2>;
212 nvidia,tristate = <0>;
213 };
214 conf_hdint {
215 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
216 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
217 "lvp0", "owc", "sdb";
218 nvidia,tristate = <1>;
219 };
220 conf_irrx {
221 nvidia,pins = "irrx", "irtx", "sdd", "spic",
222 "spie", "spih", "uaa", "uab", "uad",
223 "uca", "ucb";
224 nvidia,pull = <2>;
225 nvidia,tristate = <1>;
226 };
227 conf_lc {
228 nvidia,pins = "lc", "ls";
229 nvidia,pull = <2>;
230 };
231 conf_ld0 {
232 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
233 "ld5", "ld6", "ld7", "ld8", "ld9",
234 "ld10", "ld11", "ld12", "ld13", "ld14",
235 "ld15", "ld16", "ld17", "ldi", "lhp0",
236 "lhp1", "lhp2", "lhs", "lm0", "lpp",
237 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
238 "lvs", "pmc";
239 nvidia,tristate = <0>;
240 };
241 conf_ld17_0 {
242 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
243 "ld23_22";
244 nvidia,pull = <1>;
245 };
246 };
247 };
248
2a5fdc9a
SW
249 i2s@70002800 {
250 status = "okay";
c04abb3a
SW
251 };
252
253 serial@70006300 {
2a5fdc9a 254 status = "okay";
c04abb3a
SW
255 };
256
8e267f3d 257 i2c@7000c000 {
2a5fdc9a 258 status = "okay";
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GL
259 clock-frequency = <400000>;
260
797acf70 261 wm8903: wm8903@1a {
8e267f3d
GL
262 compatible = "wlf,wm8903";
263 reg = <0x1a>;
797acf70 264 interrupt-parent = <&gpio>;
95decf84 265 interrupts = <187 0x04>;
8e267f3d
GL
266
267 gpio-controller;
268 #gpio-cells = <2>;
269
797acf70
SW
270 micdet-cfg = <0>;
271 micdet-delay = <100>;
95decf84 272 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
8e267f3d
GL
273 };
274 };
275
20ffbd7d 276 hdmi_ddc: i2c@7000c400 {
2a5fdc9a 277 status = "okay";
20ffbd7d 278 clock-frequency = <100000>;
8e267f3d
GL
279 };
280
281 i2c@7000c500 {
2a5fdc9a 282 status = "okay";
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GL
283 clock-frequency = <400000>;
284 };
285
286 i2c@7000d000 {
2a5fdc9a 287 status = "okay";
8e267f3d 288 clock-frequency = <400000>;
3cc404de
LD
289
290 pmic: tps6586x@34 {
291 compatible = "ti,tps6586x";
292 reg = <0x34>;
293 interrupts = <0 86 0x4>;
294
be972c32
SW
295 ti,system-power-controller;
296
3cc404de
LD
297 #gpio-cells = <2>;
298 gpio-controller;
299
300 sys-supply = <&vdd_5v0_reg>;
301 vin-sm0-supply = <&sys_reg>;
302 vin-sm1-supply = <&sys_reg>;
303 vin-sm2-supply = <&sys_reg>;
304 vinldo01-supply = <&sm2_reg>;
305 vinldo23-supply = <&sm2_reg>;
306 vinldo4-supply = <&sm2_reg>;
307 vinldo678-supply = <&sm2_reg>;
308 vinldo9-supply = <&sm2_reg>;
309
310 regulators {
b9c665d7 311 sys_reg: sys {
3cc404de
LD
312 regulator-name = "vdd_sys";
313 regulator-always-on;
314 };
315
b9c665d7 316 sm0 {
3cc404de
LD
317 regulator-name = "vdd_sm0,vdd_core";
318 regulator-min-microvolt = <1200000>;
319 regulator-max-microvolt = <1200000>;
320 regulator-always-on;
321 };
322
b9c665d7 323 sm1 {
3cc404de
LD
324 regulator-name = "vdd_sm1,vdd_cpu";
325 regulator-min-microvolt = <1000000>;
326 regulator-max-microvolt = <1000000>;
327 regulator-always-on;
328 };
329
b9c665d7 330 sm2_reg: sm2 {
3cc404de
LD
331 regulator-name = "vdd_sm2,vin_ldo*";
332 regulator-min-microvolt = <3700000>;
333 regulator-max-microvolt = <3700000>;
334 regulator-always-on;
335 };
336
b9c665d7 337 ldo0 {
3cc404de
LD
338 regulator-name = "vdd_ldo0,vddio_pex_clk";
339 regulator-min-microvolt = <3300000>;
340 regulator-max-microvolt = <3300000>;
341 };
342
b9c665d7 343 ldo1 {
3cc404de
LD
344 regulator-name = "vdd_ldo1,avdd_pll*";
345 regulator-min-microvolt = <1100000>;
346 regulator-max-microvolt = <1100000>;
347 regulator-always-on;
348 };
349
b9c665d7 350 ldo2 {
3cc404de
LD
351 regulator-name = "vdd_ldo2,vdd_rtc";
352 regulator-min-microvolt = <1200000>;
353 regulator-max-microvolt = <1200000>;
354 };
355
b9c665d7 356 ldo3 {
3cc404de
LD
357 regulator-name = "vdd_ldo3,avdd_usb*";
358 regulator-min-microvolt = <3300000>;
359 regulator-max-microvolt = <3300000>;
360 regulator-always-on;
361 };
362
b9c665d7 363 ldo4 {
3cc404de
LD
364 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
365 regulator-min-microvolt = <1800000>;
366 regulator-max-microvolt = <1800000>;
367 regulator-always-on;
368 };
369
b9c665d7 370 ldo5 {
3cc404de
LD
371 regulator-name = "vdd_ldo5,vcore_mmc";
372 regulator-min-microvolt = <2850000>;
373 regulator-max-microvolt = <2850000>;
374 regulator-always-on;
375 };
376
b9c665d7 377 ldo6 {
3cc404de
LD
378 regulator-name = "vdd_ldo6,avdd_vdac";
379 regulator-min-microvolt = <1800000>;
380 regulator-max-microvolt = <1800000>;
381 };
382
20ffbd7d 383 hdmi_vdd_reg: ldo7 {
740418ef 384 regulator-name = "vdd_ldo7,avdd_hdmi";
3cc404de
LD
385 regulator-min-microvolt = <3300000>;
386 regulator-max-microvolt = <3300000>;
387 };
388
20ffbd7d 389 hdmi_pll_reg: ldo8 {
3cc404de
LD
390 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
391 regulator-min-microvolt = <1800000>;
392 regulator-max-microvolt = <1800000>;
393 };
394
b9c665d7 395 ldo9 {
3cc404de
LD
396 regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
397 regulator-min-microvolt = <2850000>;
398 regulator-max-microvolt = <2850000>;
399 regulator-always-on;
400 };
401
b9c665d7 402 ldo_rtc {
3cc404de
LD
403 regulator-name = "vdd_rtc_out,vdd_cell";
404 regulator-min-microvolt = <3300000>;
405 regulator-max-microvolt = <3300000>;
406 regulator-always-on;
407 };
408 };
409 };
42d2534a
TR
410
411 temperature-sensor@4c {
412 compatible = "adi,adt7461";
413 reg = <0x4c>;
414 };
8e267f3d
GL
415 };
416
c04abb3a
SW
417 pmc {
418 nvidia,invert-interrupt;
8e267f3d
GL
419 };
420
2a5fdc9a
SW
421 usb@c5000000 {
422 status = "okay";
423 };
424
c04abb3a 425 usb@c5004000 {
2a5fdc9a 426 status = "okay";
c04abb3a 427 nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
31c1ec92
SW
428 };
429
2a5fdc9a
SW
430 usb@c5008000 {
431 status = "okay";
1292c129
SW
432 };
433
8e267f3d 434 sdhci@c8000200 {
2a5fdc9a 435 status = "okay";
a0638eb6
SW
436 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
437 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
438 power-gpios = <&gpio 155 0>; /* gpio PT3 */
deb88cc3 439 bus-width = <4>;
8e267f3d
GL
440 };
441
442 sdhci@c8000600 {
2a5fdc9a 443 status = "okay";
a0638eb6
SW
444 cd-gpios = <&gpio 58 0>; /* gpio PH2 */
445 wp-gpios = <&gpio 59 0>; /* gpio PH3 */
446 power-gpios = <&gpio 70 0>; /* gpio PI6 */
deb88cc3 447 bus-width = <8>;
8e267f3d 448 };
aa607ebf 449
c0967ce0
LD
450 kbc {
451 status = "okay";
452 nvidia,debounce-delay-ms = <2>;
453 nvidia,repeat-delay-ms = <160>;
454 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
455 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
456 linux,keymap = <0x00020011 /* KEY_W */
457 0x0003001F /* KEY_S */
458 0x0004001E /* KEY_A */
459 0x0005002C /* KEY_Z */
460 0x000701D0 /* KEY_FN */
461 0x0107008B /* KEY_MENU */
462 0x02060038 /* KEY_LEFTALT */
463 0x02070064 /* KEY_RIGHTALT */
464 0x03000006 /* KEY_5 */
465 0x03010005 /* KEY_4 */
466 0x03020013 /* KEY_R */
467 0x03030012 /* KEY_E */
468 0x03040021 /* KEY_F */
469 0x03050020 /* KEY_D */
470 0x0306002D /* KEY_X */
471 0x04000008 /* KEY_7 */
472 0x04010007 /* KEY_6 */
473 0x04020014 /* KEY_T */
474 0x04030023 /* KEY_H */
475 0x04040022 /* KEY_G */
476 0x0405002F /* KEY_V */
477 0x0406002E /* KEY_C */
478 0x04070039 /* KEY_SPACE */
479 0x0500000A /* KEY_9 */
480 0x05010009 /* KEY_8 */
481 0x05020016 /* KEY_U */
482 0x05030015 /* KEY_Y */
483 0x05040024 /* KEY_J */
484 0x05050031 /* KEY_N */
485 0x05060030 /* KEY_B */
486 0x0507002B /* KEY_BACKSLASH */
487 0x0600000C /* KEY_MINUS */
488 0x0601000B /* KEY_0 */
489 0x06020018 /* KEY_O */
490 0x06030017 /* KEY_I */
491 0x06040026 /* KEY_L */
492 0x06050025 /* KEY_K */
493 0x06060033 /* KEY_COMMA */
494 0x06070032 /* KEY_M */
495 0x0701000D /* KEY_EQUAL */
496 0x0702001B /* KEY_RIGHTBRACE */
497 0x0703001C /* KEY_ENTER */
498 0x0707008B /* KEY_MENU */
499 0x0804002A /* KEY_LEFTSHIFT */
500 0x08050036 /* KEY_RIGHTSHIFT */
501 0x0905001D /* KEY_LEFTCTRL */
502 0x09070061 /* KEY_RIGHTCTRL */
503 0x0B00001A /* KEY_LEFTBRACE */
504 0x0B010019 /* KEY_P */
505 0x0B020028 /* KEY_APOSTROPHE */
506 0x0B030027 /* KEY_SEMICOLON */
507 0x0B040035 /* KEY_SLASH */
508 0x0B050034 /* KEY_DOT */
509 0x0C000044 /* KEY_F10 */
510 0x0C010043 /* KEY_F9 */
511 0x0C02000E /* KEY_BACKSPACE */
512 0x0C030004 /* KEY_3 */
513 0x0C040003 /* KEY_2 */
514 0x0C050067 /* KEY_UP */
515 0x0C0600D2 /* KEY_PRINT */
516 0x0C070077 /* KEY_PAUSE */
517 0x0D00006E /* KEY_INSERT */
518 0x0D01006F /* KEY_DELETE */
519 0x0D030068 /* KEY_PAGEUP */
520 0x0D04006D /* KEY_PAGEDOWN */
521 0x0D05006A /* KEY_RIGHT */
522 0x0D06006C /* KEY_DOWN */
523 0x0D070069 /* KEY_LEFT */
524 0x0E000057 /* KEY_F11 */
525 0x0E010058 /* KEY_F12 */
526 0x0E020042 /* KEY_F8 */
527 0x0E030010 /* KEY_Q */
528 0x0E04003E /* KEY_F4 */
529 0x0E05003D /* KEY_F3 */
530 0x0E060002 /* KEY_1 */
531 0x0E070041 /* KEY_F7 */
532 0x0F000001 /* KEY_ESC */
533 0x0F010029 /* KEY_GRAVE */
534 0x0F02003F /* KEY_F5 */
535 0x0F03000F /* KEY_TAB */
536 0x0F04003B /* KEY_F1 */
537 0x0F05003C /* KEY_F2 */
538 0x0F06003A /* KEY_CAPSLOCK */
539 0x0F070040 /* KEY_F6 */
540 0x14000047 /* KEY_KP7 */
541 0x15000049 /* KEY_KP9 */
542 0x15010048 /* KEY_KP8 */
543 0x1502004B /* KEY_KP4 */
544 0x1504004F /* KEY_KP1 */
545 0x1601004E /* KEY_KPSLASH */
546 0x1602004D /* KEY_KP6 */
547 0x1603004C /* KEY_KP5 */
548 0x16040051 /* KEY_KP3 */
549 0x16050050 /* KEY_KP2 */
550 0x16070052 /* KEY_KP0 */
551 0x1B010037 /* KEY_KPASTERISK */
552 0x1B03004A /* KEY_KPMINUS */
553 0x1B04004E /* KEY_KPPLUS */
554 0x1B050053 /* KEY_KPDOT */
555 0x1C050073 /* KEY_VOLUMEUP */
556 0x1D030066 /* KEY_HOME */
557 0x1D04006B /* KEY_END */
558 0x1D0500E1 /* KEY_BRIGHTNESSUP */
559 0x1D060072 /* KEY_VOLUMEDOWN */
560 0x1D0700E0 /* KEY_BRIGHTNESSDOWN */
561 0x1E000045 /* KEY_NUMLOCK */
562 0x1E010046 /* KEY_SCROLLLOCK */
563 0x1E020071 /* KEY_MUTE */
564 0x1F0400D6>; /* KEY_QUESTION */
565 };
566
3cc404de
LD
567 regulators {
568 compatible = "simple-bus";
569 #address-cells = <1>;
570 #size-cells = <0>;
571
572 vdd_5v0_reg: regulator@0 {
573 compatible = "regulator-fixed";
574 reg = <0>;
575 regulator-name = "vdd_5v0";
576 regulator-min-microvolt = <5000000>;
577 regulator-max-microvolt = <5000000>;
578 regulator-always-on;
579 };
580
581 regulator@1 {
582 compatible = "regulator-fixed";
583 reg = <1>;
584 regulator-name = "vdd_1v5";
585 regulator-min-microvolt = <1500000>;
586 regulator-max-microvolt = <1500000>;
587 gpio = <&pmic 0 0>;
588 };
589
590 regulator@2 {
591 compatible = "regulator-fixed";
592 reg = <2>;
593 regulator-name = "vdd_1v2";
594 regulator-min-microvolt = <1200000>;
595 regulator-max-microvolt = <1200000>;
596 gpio = <&pmic 1 0>;
597 enable-active-high;
598 };
599
600 regulator@3 {
601 compatible = "regulator-fixed";
602 reg = <3>;
603 regulator-name = "vdd_1v05";
604 regulator-min-microvolt = <1050000>;
605 regulator-max-microvolt = <1050000>;
606 gpio = <&pmic 2 0>;
607 enable-active-high;
608 /* Hack until board-harmony-pcie.c is removed */
609 status = "disabled";
610 };
611
612 regulator@4 {
613 compatible = "regulator-fixed";
614 reg = <4>;
615 regulator-name = "vdd_pnl";
616 regulator-min-microvolt = <2800000>;
617 regulator-max-microvolt = <2800000>;
618 gpio = <&gpio 22 0>; /* gpio PC6 */
619 enable-active-high;
620 };
621
622 regulator@5 {
623 compatible = "regulator-fixed";
624 reg = <5>;
625 regulator-name = "vdd_bl";
626 regulator-min-microvolt = <2800000>;
627 regulator-max-microvolt = <2800000>;
628 gpio = <&gpio 176 0>; /* gpio PW0 */
629 enable-active-high;
630 };
631 };
632
c04abb3a
SW
633 sound {
634 compatible = "nvidia,tegra-audio-wm8903-harmony",
635 "nvidia,tegra-audio-wm8903";
636 nvidia,model = "NVIDIA Tegra Harmony";
637
638 nvidia,audio-routing =
639 "Headphone Jack", "HPOUTR",
640 "Headphone Jack", "HPOUTL",
641 "Int Spk", "ROP",
642 "Int Spk", "RON",
643 "Int Spk", "LOP",
644 "Int Spk", "LON",
645 "Mic Jack", "MICBIAS",
646 "IN1L", "Mic Jack";
647
648 nvidia,i2s-controller = <&tegra_i2s1>;
649 nvidia,audio-codec = <&wm8903>;
650
651 nvidia,spkr-en-gpios = <&wm8903 2 0>;
652 nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
653 nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
654 nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
aa607ebf 655 };
8e267f3d 656};
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