ARM: tegra: Add charger subnode to tps65090 node
[deliverable/linux.git] / arch / arm / boot / dts / tegra20-paz00.dts
CommitLineData
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1/dts-v1/;
2
1bd0bd49 3#include "tegra20.dtsi"
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4
5/ {
6 model = "Toshiba AC100 / Dynabook AZ";
7 compatible = "compal,paz00", "nvidia,tegra20";
8
f9eb26a4 9 memory {
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10 reg = <0x00000000 0x20000000>;
11 };
12
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SW
13 host1x {
14 hdmi {
15 status = "okay";
16
17 vdd-supply = <&hdmi_vdd_reg>;
18 pll-supply = <&hdmi_pll_reg>;
19
20 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
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SW
21 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
22 GPIO_ACTIVE_HIGH>;
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SW
23 };
24 };
25
f9eb26a4 26 pinmux {
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27 pinctrl-names = "default";
28 pinctrl-0 = <&state_default>;
29
30 state_default: pinmux {
31 ata {
32 nvidia,pins = "ata", "atc", "atd", "ate",
33 "dap2", "gmb", "gmc", "gmd", "spia",
34 "spib", "spic", "spid", "spie";
35 nvidia,function = "gmi";
36 };
37 atb {
38 nvidia,pins = "atb", "gma", "gme";
39 nvidia,function = "sdio4";
40 };
41 cdev1 {
42 nvidia,pins = "cdev1";
43 nvidia,function = "plla_out";
44 };
45 cdev2 {
46 nvidia,pins = "cdev2";
47 nvidia,function = "pllp_out4";
48 };
49 crtp {
50 nvidia,pins = "crtp";
51 nvidia,function = "crt";
52 };
53 csus {
54 nvidia,pins = "csus";
55 nvidia,function = "pllc_out1";
56 };
57 dap1 {
58 nvidia,pins = "dap1";
59 nvidia,function = "dap1";
60 };
61 dap3 {
62 nvidia,pins = "dap3";
63 nvidia,function = "dap3";
64 };
65 dap4 {
66 nvidia,pins = "dap4";
67 nvidia,function = "dap4";
68 };
69 ddc {
70 nvidia,pins = "ddc";
71 nvidia,function = "i2c2";
72 };
73 dta {
74 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
75 nvidia,function = "rsvd1";
76 };
77 dtf {
78 nvidia,pins = "dtf";
79 nvidia,function = "i2c3";
80 };
81 gpu {
82 nvidia,pins = "gpu", "sdb", "sdd";
83 nvidia,function = "pwm";
84 };
85 gpu7 {
86 nvidia,pins = "gpu7";
87 nvidia,function = "rtck";
88 };
89 gpv {
90 nvidia,pins = "gpv", "slxa", "slxk";
91 nvidia,function = "pcie";
92 };
93 hdint {
94 nvidia,pins = "hdint", "pta";
95 nvidia,function = "hdmi";
96 };
97 i2cp {
98 nvidia,pins = "i2cp";
99 nvidia,function = "i2cp";
100 };
101 irrx {
102 nvidia,pins = "irrx", "irtx";
103 nvidia,function = "uarta";
104 };
105 kbca {
106 nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
107 nvidia,function = "kbc";
108 };
109 kbcb {
110 nvidia,pins = "kbcb", "kbcd";
111 nvidia,function = "sdio2";
112 };
113 lcsn {
114 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
115 "ld3", "ld4", "ld5", "ld6", "ld7",
116 "ld8", "ld9", "ld10", "ld11", "ld12",
117 "ld13", "ld14", "ld15", "ld16", "ld17",
118 "ldc", "ldi", "lhp0", "lhp1", "lhp2",
119 "lhs", "lm0", "lm1", "lpp", "lpw0",
120 "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
121 "lsda", "lsdi", "lspi", "lvp0", "lvp1",
122 "lvs";
123 nvidia,function = "displaya";
124 };
125 owc {
126 nvidia,pins = "owc";
127 nvidia,function = "owr";
128 };
129 pmc {
130 nvidia,pins = "pmc";
131 nvidia,function = "pwr_on";
132 };
133 rm {
134 nvidia,pins = "rm";
135 nvidia,function = "i2c1";
136 };
137 sdc {
138 nvidia,pins = "sdc";
139 nvidia,function = "twc";
140 };
141 sdio1 {
142 nvidia,pins = "sdio1";
143 nvidia,function = "sdio1";
144 };
145 slxc {
146 nvidia,pins = "slxc", "slxd";
147 nvidia,function = "spi4";
148 };
149 spdi {
150 nvidia,pins = "spdi", "spdo";
151 nvidia,function = "rsvd2";
152 };
153 spif {
154 nvidia,pins = "spif", "uac";
155 nvidia,function = "rsvd4";
156 };
157 spig {
158 nvidia,pins = "spig", "spih";
159 nvidia,function = "spi2_alt";
160 };
161 uaa {
162 nvidia,pins = "uaa", "uab", "uda";
163 nvidia,function = "ulpi";
164 };
165 uad {
166 nvidia,pins = "uad";
167 nvidia,function = "spdif";
168 };
169 uca {
170 nvidia,pins = "uca", "ucb";
171 nvidia,function = "uartc";
172 };
173 conf_ata {
174 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
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175 "cdev1", "cdev2", "dap1", "dap2", "dtf",
176 "gma", "gmb", "gmc", "gmd", "gme",
177 "gpu", "gpu7", "gpv", "i2cp", "pta",
178 "rm", "sdio1", "slxk", "spdo", "uac",
179 "uda";
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180 nvidia,pull = <0>;
181 nvidia,tristate = <0>;
182 };
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183 conf_ck32 {
184 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
185 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
186 nvidia,pull = <0>;
187 };
188 conf_crtp {
189 nvidia,pins = "crtp", "dap3", "dap4", "dtb",
190 "dtc", "dte", "slxa", "slxc", "slxd",
191 "spdi";
192 nvidia,pull = <0>;
193 nvidia,tristate = <1>;
194 };
195 conf_csus {
196 nvidia,pins = "csus", "spia", "spib", "spid",
197 "spif";
198 nvidia,pull = <1>;
199 nvidia,tristate = <1>;
200 };
201 conf_ddc {
202 nvidia,pins = "ddc", "irrx", "irtx", "kbca",
203 "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
204 "spic", "spig", "uaa", "uab";
205 nvidia,pull = <2>;
206 nvidia,tristate = <0>;
207 };
208 conf_dta {
209 nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd",
210 "spie", "spih", "uad", "uca", "ucb";
211 nvidia,pull = <2>;
212 nvidia,tristate = <1>;
213 };
214 conf_hdint {
215 nvidia,pins = "hdint", "ld0", "ld1", "ld2",
216 "ld3", "ld4", "ld5", "ld6", "ld7",
217 "ld8", "ld9", "ld10", "ld11", "ld12",
218 "ld13", "ld14", "ld15", "ld16", "ld17",
219 "ldc", "ldi", "lhs", "lsc0", "lspi",
220 "lvs", "pmc";
221 nvidia,tristate = <0>;
222 };
223 conf_lc {
224 nvidia,pins = "lc", "ls";
225 nvidia,pull = <2>;
226 };
227 conf_lcsn {
228 nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2",
229 "lm0", "lm1", "lpp", "lpw0", "lpw1",
230 "lpw2", "lsc1", "lsck", "lsda", "lsdi",
231 "lvp0", "lvp1", "sdb";
232 nvidia,tristate = <1>;
233 };
234 conf_ld17_0 {
235 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
236 "ld23_22";
237 nvidia,pull = <1>;
238 };
239 };
240 };
241
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242 i2s@70002800 {
243 status = "okay";
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244 };
245
246 serial@70006000 {
2a5fdc9a 247 status = "okay";
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248 };
249
c04abb3a 250 serial@70006200 {
2a5fdc9a 251 status = "okay";
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252 };
253
cc2afa43 254 i2c@7000c000 {
2a5fdc9a 255 status = "okay";
cc2afa43 256 clock-frequency = <400000>;
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257
258 alc5632: alc5632@1e {
259 compatible = "realtek,alc5632";
260 reg = <0x1e>;
261 gpio-controller;
262 #gpio-cells = <2>;
263 };
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264 };
265
11a3c868 266 hdmi_ddc: i2c@7000c400 {
2a5fdc9a 267 status = "okay";
11a3c868 268 clock-frequency = <100000>;
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269 };
270
f9eb26a4 271 nvec {
cc2afa43 272 compatible = "nvidia,nvec";
ba04c289 273 reg = <0x7000c500 0x100>;
6cecf916 274 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
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275 #address-cells = <1>;
276 #size-cells = <0>;
cc2afa43 277 clock-frequency = <80000>;
3325f1bc 278 request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
cc2afa43 279 slave-addr = <138>;
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280 clocks = <&tegra_car 67>, <&tegra_car 124>;
281 clock-names = "div-clk", "fast-clk";
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282 };
283
284 i2c@7000d000 {
2a5fdc9a 285 status = "okay";
cc2afa43 286 clock-frequency = <400000>;
1266f897 287
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288 pmic: tps6586x@34 {
289 compatible = "ti,tps6586x";
290 reg = <0x34>;
6cecf916 291 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
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292
293 #gpio-cells = <2>;
294 gpio-controller;
295
296 sys-supply = <&p5valw_reg>;
297 vin-sm0-supply = <&sys_reg>;
298 vin-sm1-supply = <&sys_reg>;
299 vin-sm2-supply = <&sys_reg>;
300 vinldo01-supply = <&sm2_reg>;
301 vinldo23-supply = <&sm2_reg>;
302 vinldo4-supply = <&sm2_reg>;
303 vinldo678-supply = <&sm2_reg>;
304 vinldo9-supply = <&sm2_reg>;
305
306 regulators {
b9c665d7 307 sys_reg: sys {
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308 regulator-name = "vdd_sys";
309 regulator-always-on;
310 };
311
b9c665d7 312 sm0 {
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313 regulator-name = "+1.2vs_sm0,vdd_core";
314 regulator-min-microvolt = <1200000>;
315 regulator-max-microvolt = <1200000>;
316 regulator-always-on;
317 };
318
b9c665d7 319 sm1 {
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320 regulator-name = "+1.0vs_sm1,vdd_cpu";
321 regulator-min-microvolt = <1000000>;
322 regulator-max-microvolt = <1000000>;
323 regulator-always-on;
324 };
325
b9c665d7 326 sm2_reg: sm2 {
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327 regulator-name = "+3.7vs_sm2,vin_ldo*";
328 regulator-min-microvolt = <3700000>;
329 regulator-max-microvolt = <3700000>;
330 regulator-always-on;
331 };
332
333 /* LDO0 is not connected to anything */
334
b9c665d7 335 ldo1 {
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336 regulator-name = "+1.1vs_ldo1,avdd_pll*";
337 regulator-min-microvolt = <1100000>;
338 regulator-max-microvolt = <1100000>;
339 regulator-always-on;
340 };
341
b9c665d7 342 ldo2 {
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343 regulator-name = "+1.2vs_ldo2,vdd_rtc";
344 regulator-min-microvolt = <1200000>;
345 regulator-max-microvolt = <1200000>;
346 };
347
b9c665d7 348 ldo3 {
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349 regulator-name = "+3.3vs_ldo3,avdd_usb*";
350 regulator-min-microvolt = <3300000>;
351 regulator-max-microvolt = <3300000>;
352 regulator-always-on;
353 };
354
b9c665d7 355 ldo4 {
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356 regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
357 regulator-min-microvolt = <1800000>;
358 regulator-max-microvolt = <1800000>;
359 regulator-always-on;
360 };
361
b9c665d7 362 ldo5 {
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363 regulator-name = "+2.85vs_ldo5,vcore_mmc";
364 regulator-min-microvolt = <2850000>;
365 regulator-max-microvolt = <2850000>;
366 regulator-always-on;
367 };
368
b9c665d7 369 ldo6 {
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370 /*
371 * Research indicates this should be
372 * 1.8v; other boards that use this
373 * rail for the same purpose need it
374 * set to 1.8v. The schematic signal
375 * name is incorrect; perhaps copied
376 * from an incorrect NVIDIA reference.
377 */
378 regulator-name = "+2.85vs_ldo6,avdd_vdac";
379 regulator-min-microvolt = <1800000>;
380 regulator-max-microvolt = <1800000>;
381 };
382
11a3c868 383 hdmi_vdd_reg: ldo7 {
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384 regulator-name = "+3.3vs_ldo7,avdd_hdmi";
385 regulator-min-microvolt = <3300000>;
386 regulator-max-microvolt = <3300000>;
387 };
388
11a3c868 389 hdmi_pll_reg: ldo8 {
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390 regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
391 regulator-min-microvolt = <1800000>;
392 regulator-max-microvolt = <1800000>;
393 };
394
b9c665d7 395 ldo9 {
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396 regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
397 regulator-min-microvolt = <2850000>;
398 regulator-max-microvolt = <2850000>;
399 regulator-always-on;
400 };
401
b9c665d7 402 ldo_rtc {
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SW
403 regulator-name = "+3.3vs_rtc";
404 regulator-min-microvolt = <3300000>;
405 regulator-max-microvolt = <3300000>;
406 regulator-always-on;
407 };
408 };
409 };
410
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MD
411 adt7461@4c {
412 compatible = "adi,adt7461";
413 reg = <0x4c>;
414 };
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415 };
416
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417 pmc {
418 nvidia,invert-interrupt;
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JL
419 nvidia,suspend-mode = <2>;
420 nvidia,cpu-pwr-good-time = <2000>;
421 nvidia,cpu-pwr-off-time = <0>;
422 nvidia,core-pwr-good-time = <3845 3845>;
423 nvidia,core-pwr-off-time = <0>;
424 nvidia,sys-clock-req-active-high;
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425 };
426
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427 usb@c5000000 {
428 status = "okay";
429 };
430
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431 usb-phy@c5000000 {
432 status = "okay";
433 };
434
c04abb3a 435 usb@c5004000 {
2a5fdc9a 436 status = "okay";
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SW
437 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
438 GPIO_ACTIVE_LOW>;
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439 };
440
9dffe3be 441 usb-phy@c5004000 {
4c94c8b5 442 status = "okay";
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443 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
444 GPIO_ACTIVE_LOW>;
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445 };
446
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447 usb@c5008000 {
448 status = "okay";
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VB
449 };
450
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451 usb-phy@c5008000 {
452 status = "okay";
453 };
454
cc2afa43 455 sdhci@c8000000 {
2a5fdc9a 456 status = "okay";
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SW
457 cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>;
458 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
459 power-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
7f217794 460 bus-width = <4>;
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461 };
462
cc2afa43 463 sdhci@c8000600 {
2a5fdc9a 464 status = "okay";
7f217794 465 bus-width = <8>;
7a2617a6 466 non-removable;
cc2afa43 467 };
d8d56c84 468
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JL
469 clocks {
470 compatible = "simple-bus";
471 #address-cells = <1>;
472 #size-cells = <0>;
473
474 clk32k_in: clock {
475 compatible = "fixed-clock";
476 reg=<0>;
477 #clock-cells = <0>;
478 clock-frequency = <32768>;
479 };
480 };
481
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MD
482 gpio-keys {
483 compatible = "gpio-keys";
484
485 power {
486 label = "Power";
3325f1bc 487 gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
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488 linux,code = <116>; /* KEY_POWER */
489 gpio-key,wakeup;
490 };
491 };
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MD
492
493 gpio-leds {
494 compatible = "gpio-leds";
495
496 wifi {
497 label = "wifi-led";
3325f1bc 498 gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
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MD
499 linux,default-trigger = "rfkill0";
500 };
501 };
aa607ebf 502
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503 regulators {
504 compatible = "simple-bus";
505 #address-cells = <1>;
506 #size-cells = <0>;
507
508 p5valw_reg: regulator@0 {
509 compatible = "regulator-fixed";
510 reg = <0>;
511 regulator-name = "+5valw";
512 regulator-min-microvolt = <5000000>;
513 regulator-max-microvolt = <5000000>;
514 regulator-always-on;
515 };
516 };
517
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SW
518 sound {
519 compatible = "nvidia,tegra-audio-alc5632-paz00",
520 "nvidia,tegra-audio-alc5632";
521
522 nvidia,model = "Compal PAZ00";
523
524 nvidia,audio-routing =
525 "Int Spk", "SPKOUT",
526 "Int Spk", "SPKOUTN",
527 "Headset Mic", "MICBIAS1",
528 "MIC1", "Headset Mic",
529 "Headset Stereophone", "HPR",
530 "Headset Stereophone", "HPL",
531 "DMICDAT", "Digital Mic";
532
533 nvidia,audio-codec = <&alc5632>;
534 nvidia,i2s-controller = <&tegra_i2s1>;
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SW
535 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
536 GPIO_ACTIVE_HIGH>;
f9cd2b3b 537
1071b2df 538 clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
f9cd2b3b 539 clock-names = "pll_a", "pll_a_out0", "mclk";
aa607ebf 540 };
cc2afa43 541};
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