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Merge tag 'pstore-v4.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/kees...
[deliverable/linux.git] / arch / arm / boot / dts / tegra20-seaboard.dts
CommitLineData
8e267f3d
GL		 1/dts-v1/;
2
6bccbd5e 3#include <dt-bindings/input/input.h>
1bd0bd49 4#include "tegra20.dtsi"
8e267f3d
GL		 5
6/ {
7 model = "NVIDIA Seaboard";
8 compatible = "nvidia,seaboard", "nvidia,tegra20";
9
553c0a20
SW		 10 aliases {
11 rtc0 = "/i2c@7000d000/tps6586x@34";
12 rtc1 = "/rtc@7000e000";
c4574aa0 13 serial0 = &uartd;
553c0a20
SW		 14 };
15
f5bbb327
JH		 16 chosen {
17 stdout-path = "serial0:115200n8";
18 };
19
8e267f3d 20 memory {
95decf84 21 reg = <0x00000000 0x40000000>;
8e267f3d
GL		 22 };
23
58ecb23f 24 host1x@50000000 {
9615d656
SW		 25 dc@54200000 {
26 rgb {
27 status = "okay";
28
29 nvidia,panel = <&panel>;
30 };
31 };
32
58ecb23f 33 hdmi@54280000 {
a75191e6
SW		 34 status = "okay";
35
36 vdd-supply = <&hdmi_vdd_reg>;
37 pll-supply = <&hdmi_pll_reg>;
5264d274 38 hdmi-supply = <&vdd_hdmi>;
a75191e6
SW		 39
40 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
3325f1bc
SW		 41 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
42 GPIO_ACTIVE_HIGH>;
a75191e6
SW		 43 };
44 };
45
58ecb23f 46 pinmux@70000014 {
ecc295bb
SW		 47 pinctrl-names = "default";
48 pinctrl-0 = <&state_default>;
49
50 state_default: pinmux {
51 ata {
52 nvidia,pins = "ata";
53 nvidia,function = "ide";
54 };
55 atb {
56 nvidia,pins = "atb", "gma", "gme";
57 nvidia,function = "sdio4";
58 };
59 atc {
60 nvidia,pins = "atc";
61 nvidia,function = "nand";
62 };
63 atd {
64 nvidia,pins = "atd", "ate", "gmb", "spia",
65 "spib", "spic";
66 nvidia,function = "gmi";
67 };
68 cdev1 {
69 nvidia,pins = "cdev1";
70 nvidia,function = "plla_out";
71 };
72 cdev2 {
73 nvidia,pins = "cdev2";
74 nvidia,function = "pllp_out4";
75 };
76 crtp {
77 nvidia,pins = "crtp", "lm1";
78 nvidia,function = "crt";
79 };
80 csus {
81 nvidia,pins = "csus";
82 nvidia,function = "vi_sensor_clk";
83 };
84 dap1 {
85 nvidia,pins = "dap1";
86 nvidia,function = "dap1";
87 };
88 dap2 {
89 nvidia,pins = "dap2";
90 nvidia,function = "dap2";
91 };
92 dap3 {
93 nvidia,pins = "dap3";
94 nvidia,function = "dap3";
95 };
96 dap4 {
97 nvidia,pins = "dap4";
98 nvidia,function = "dap4";
99 };
ecc295bb
SW		 100 dta {
101 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
102 nvidia,function = "vi";
103 };
104 dtf {
105 nvidia,pins = "dtf";
106 nvidia,function = "i2c3";
107 };
108 gmc {
109 nvidia,pins = "gmc";
110 nvidia,function = "uartd";
111 };
112 gmd {
113 nvidia,pins = "gmd";
114 nvidia,function = "sflash";
115 };
116 gpu {
117 nvidia,pins = "gpu";
118 nvidia,function = "pwm";
119 };
120 gpu7 {
121 nvidia,pins = "gpu7";
122 nvidia,function = "rtck";
123 };
124 gpv {
125 nvidia,pins = "gpv", "slxa", "slxk";
126 nvidia,function = "pcie";
127 };
128 hdint {
129 nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
802a8499 130 "lsck", "lsda";
ecc295bb
SW		 131 nvidia,function = "hdmi";
132 };
133 i2cp {
134 nvidia,pins = "i2cp";
135 nvidia,function = "i2cp";
136 };
137 irrx {
138 nvidia,pins = "irrx", "irtx";
139 nvidia,function = "uartb";
140 };
141 kbca {
142 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
143 "kbce", "kbcf";
144 nvidia,function = "kbc";
145 };
146 lcsn {
147 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
148 "lsdi", "lvp0";
149 nvidia,function = "rsvd4";
150 };
151 ld0 {
152 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
153 "ld5", "ld6", "ld7", "ld8", "ld9",
154 "ld10", "ld11", "ld12", "ld13", "ld14",
155 "ld15", "ld16", "ld17", "ldi", "lhp0",
156 "lhp1", "lhp2", "lhs", "lpp", "lsc0",
157 "lspi", "lvp1", "lvs";
158 nvidia,function = "displaya";
159 };
a18cf6dc
SW		 160 owc {
161 nvidia,pins = "owc", "spdi", "spdo", "uac";
162 nvidia,function = "rsvd2";
163 };
ecc295bb
SW		 164 pmc {
165 nvidia,pins = "pmc";
166 nvidia,function = "pwr_on";
167 };
168 rm {
169 nvidia,pins = "rm";
170 nvidia,function = "i2c1";
171 };
172 sdb {
173 nvidia,pins = "sdb", "sdc", "sdd";
174 nvidia,function = "sdio3";
175 };
176 sdio1 {
177 nvidia,pins = "sdio1";
178 nvidia,function = "sdio1";
179 };
180 slxc {
181 nvidia,pins = "slxc", "slxd";
182 nvidia,function = "spdif";
183 };
184 spid {
185 nvidia,pins = "spid", "spie", "spif";
186 nvidia,function = "spi1";
187 };
188 spig {
189 nvidia,pins = "spig", "spih";
190 nvidia,function = "spi2_alt";
191 };
192 uaa {
193 nvidia,pins = "uaa", "uab", "uda";
194 nvidia,function = "ulpi";
195 };
196 uad {
197 nvidia,pins = "uad";
198 nvidia,function = "irda";
199 };
200 uca {
201 nvidia,pins = "uca", "ucb";
202 nvidia,function = "uartc";
203 };
204 conf_ata {
205 nvidia,pins = "ata", "atb", "atc", "atd",
206 "cdev1", "cdev2", "dap1", "dap2",
a18cf6dc 207 "dap4", "ddc", "dtf", "gma", "gmc", "gmd",
ecc295bb
SW		 208 "gme", "gpu", "gpu7", "i2cp", "irrx",
209 "irtx", "pta", "rm", "sdc", "sdd",
210 "slxd", "slxk", "spdi", "spdo", "uac",
211 "uad", "uca", "ucb", "uda";
ba4104e7
LD		 212 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
213 nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb
SW		 214 };
215 conf_ate {
a18cf6dc 216 nvidia,pins = "ate", "csus", "dap3",
ecc295bb
SW		 217 "gpv", "owc", "slxc", "spib", "spid",
218 "spie";
ba4104e7
LD		 219 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
220 nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb
SW		 221 };
222 conf_ck32 {
223 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
224 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
ba4104e7 225 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ecc295bb
SW		 226 };
227 conf_crtp {
228 nvidia,pins = "crtp", "gmb", "slxa", "spia",
229 "spig", "spih";
ba4104e7
LD		 230 nvidia,pull = <TEGRA_PIN_PULL_UP>;
231 nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb
SW		 232 };
233 conf_dta {
234 nvidia,pins = "dta", "dtb", "dtc", "dtd";
ba4104e7
LD		 235 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
236 nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb
SW		 237 };
238 conf_dte {
239 nvidia,pins = "dte", "spif";
ba4104e7
LD		 240 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
241 nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb
SW		 242 };
243 conf_hdint {
244 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
245 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
246 "lvp0";
ba4104e7 247 nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb
SW		 248 };
249 conf_kbca {
250 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
251 "kbce", "kbcf", "sdio1", "spic", "uaa",
252 "uab";
ba4104e7
LD		 253 nvidia,pull = <TEGRA_PIN_PULL_UP>;
254 nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb
SW		 255 };
256 conf_lc {
257 nvidia,pins = "lc", "ls";
ba4104e7 258 nvidia,pull = <TEGRA_PIN_PULL_UP>;
ecc295bb
SW		 259 };
260 conf_ld0 {
261 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
262 "ld5", "ld6", "ld7", "ld8", "ld9",
263 "ld10", "ld11", "ld12", "ld13", "ld14",
264 "ld15", "ld16", "ld17", "ldi", "lhp0",
265 "lhp1", "lhp2", "lhs", "lm0", "lpp",
266 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
267 "lvs", "pmc", "sdb";
ba4104e7 268 nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb
SW		 269 };
270 conf_ld17_0 {
271 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
272 "ld23_22";
ba4104e7 273 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
ecc295bb
SW		 274 };
275 drive_sdio1 {
276 nvidia,pins = "drive_sdio1";
ba4104e7
LD		 277 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
278 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
279 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
ecc295bb
SW		 280 nvidia,pull-down-strength = <31>;
281 nvidia,pull-up-strength = <31>;
ba4104e7
LD		 282 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
283 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
ecc295bb
SW		 284 };
285 };
a18cf6dc
SW		 286
287 state_i2cmux_ddc: pinmux_i2cmux_ddc {
288 ddc {
289 nvidia,pins = "ddc";
290 nvidia,function = "i2c2";
291 };
292 pta {
293 nvidia,pins = "pta";
294 nvidia,function = "rsvd4";
295 };
296 };
297
298 state_i2cmux_pta: pinmux_i2cmux_pta {
299 ddc {
300 nvidia,pins = "ddc";
301 nvidia,function = "rsvd4";
302 };
303 pta {
304 nvidia,pins = "pta";
305 nvidia,function = "i2c2";
306 };
307 };
308
309 state_i2cmux_idle: pinmux_i2cmux_idle {
310 ddc {
311 nvidia,pins = "ddc";
312 nvidia,function = "rsvd4";
313 };
314 pta {
315 nvidia,pins = "pta";
316 nvidia,function = "rsvd4";
317 };
318 };
ecc295bb
SW		 319 };
320
2a5fdc9a
SW		 321 i2s@70002800 {
322 status = "okay";
c04abb3a
SW		 323 };
324
325 serial@70006300 {
2a5fdc9a 326 status = "okay";
c04abb3a
SW		 327 };
328
9615d656
SW		 329 pwm: pwm@7000a000 {
330 status = "okay";
331 };
332
88950f3b 333 i2c@7000c000 {
2a5fdc9a 334 status = "okay";
88950f3b 335 clock-frequency = <400000>;
797acf70
SW		 336
337 wm8903: wm8903@1a {
338 compatible = "wlf,wm8903";
339 reg = <0x1a>;
340 interrupt-parent = <&gpio>;
6cecf916 341 interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
797acf70
SW		 342
343 gpio-controller;
344 #gpio-cells = <2>;
345
346 micdet-cfg = <0>;
347 micdet-delay = <100>;
95decf84 348 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
797acf70 349 };
b46b0b54
LD		 350
351 /* ALS and proximity sensor */
352 isl29018@44 {
353 compatible = "isil,isl29018";
354 reg = <0x44>;
355 interrupt-parent = <&gpio>;
6cecf916 356 interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
b46b0b54 357 };
45dbe9dd
OJ		 358
359 gyrometer@68 {
360 compatible = "invn,mpu3050";
361 reg = <0x68>;
362 interrupt-parent = <&gpio>;
6cecf916 363 interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_LEVEL_HIGH>;
45dbe9dd 364 };
88950f3b
SW		 365 };
366
367 i2c@7000c400 {
2a5fdc9a 368 status = "okay";
22bd1f7e 369 clock-frequency = <100000>;
88950f3b
SW		 370 };
371
a18cf6dc
SW		 372 i2cmux {
373 compatible = "i2c-mux-pinctrl";
374 #address-cells = <1>;
375 #size-cells = <0>;
376
377 i2c-parent = <&{/i2c@7000c400}>;
378
379 pinctrl-names = "ddc", "pta", "idle";
380 pinctrl-0 = <&state_i2cmux_ddc>;
381 pinctrl-1 = <&state_i2cmux_pta>;
382 pinctrl-2 = <&state_i2cmux_idle>;
383
a75191e6 384 hdmi_ddc: i2c@0 {
a18cf6dc
SW		 385 reg = <0>;
386 #address-cells = <1>;
387 #size-cells = <0>;
388 };
389
9615d656 390 lvds_ddc: i2c@1 {
a18cf6dc
SW		 391 reg = <1>;
392 #address-cells = <1>;
393 #size-cells = <0>;
0879c5f7
SW		 394
395 smart-battery@b {
396 compatible = "ti,bq20z75", "smart-battery-1.1";
397 reg = <0xb>;
398 ti,i2c-retry-count = <2>;
399 ti,poll-retry-count = <10>;
400 };
a18cf6dc
SW		 401 };
402 };
403
88950f3b 404 i2c@7000c500 {
2a5fdc9a 405 status = "okay";
88950f3b
SW		 406 clock-frequency = <400000>;
407 };
408
409 i2c@7000d000 {
2a5fdc9a 410 status = "okay";
88950f3b 411 clock-frequency = <400000>;
401c9a50 412
57899053 413 magnetometer@c {
7c7a9b3d 414 compatible = "asahi-kasei,ak8975";
57899053
SW		 415 reg = <0xc>;
416 interrupt-parent = <&gpio>;
417 interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>;
418 };
419
6529e638
SW		 420 pmic: tps6586x@34 {
421 compatible = "ti,tps6586x";
422 reg = <0x34>;
6cecf916 423 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
6529e638 424
44b12ef7
SW		 425 ti,system-power-controller;
426
6529e638
SW		 427 #gpio-cells = <2>;
428 gpio-controller;
429
430 sys-supply = <&vdd_5v0_reg>;
431 vin-sm0-supply = <&sys_reg>;
432 vin-sm1-supply = <&sys_reg>;
433 vin-sm2-supply = <&sys_reg>;
434 vinldo01-supply = <&sm2_reg>;
435 vinldo23-supply = <&sm2_reg>;
436 vinldo4-supply = <&sm2_reg>;
437 vinldo678-supply = <&sm2_reg>;
438 vinldo9-supply = <&sm2_reg>;
439
440 regulators {
b9c665d7 441 sys_reg: sys {
6529e638
SW		 442 regulator-name = "vdd_sys";
443 regulator-always-on;
444 };
445
b9c665d7 446 sm0 {
6529e638
SW		 447 regulator-name = "vdd_sm0,vdd_core";
448 regulator-min-microvolt = <1300000>;
449 regulator-max-microvolt = <1300000>;
450 regulator-always-on;
451 };
452
b9c665d7 453 sm1 {
6529e638
SW		 454 regulator-name = "vdd_sm1,vdd_cpu";
455 regulator-min-microvolt = <1125000>;
456 regulator-max-microvolt = <1125000>;
457 regulator-always-on;
458 };
459
b9c665d7 460 sm2_reg: sm2 {
6529e638
SW		 461 regulator-name = "vdd_sm2,vin_ldo*";
462 regulator-min-microvolt = <3700000>;
463 regulator-max-microvolt = <3700000>;
464 regulator-always-on;
465 };
466
467 /* LDO0 is not connected to anything */
468
b9c665d7 469 ldo1 {
6529e638
SW		 470 regulator-name = "vdd_ldo1,avdd_pll*";
471 regulator-min-microvolt = <1100000>;
472 regulator-max-microvolt = <1100000>;
473 regulator-always-on;
474 };
475
b9c665d7 476 ldo2 {
6529e638
SW		 477 regulator-name = "vdd_ldo2,vdd_rtc";
478 regulator-min-microvolt = <1200000>;
479 regulator-max-microvolt = <1200000>;
480 };
481
b9c665d7 482 ldo3 {
6529e638
SW		 483 regulator-name = "vdd_ldo3,avdd_usb*";
484 regulator-min-microvolt = <3300000>;
485 regulator-max-microvolt = <3300000>;
486 regulator-always-on;
487 };
488
b9c665d7 489 ldo4 {
6529e638
SW		 490 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
491 regulator-min-microvolt = <1800000>;
492 regulator-max-microvolt = <1800000>;
493 regulator-always-on;
494 };
495
b9c665d7 496 ldo5 {
6529e638
SW		 497 regulator-name = "vdd_ldo5,vcore_mmc";
498 regulator-min-microvolt = <2850000>;
499 regulator-max-microvolt = <2850000>;
500 regulator-always-on;
501 };
502
b9c665d7 503 ldo6 {
6529e638
SW		 504 regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
505 regulator-min-microvolt = <1800000>;
506 regulator-max-microvolt = <1800000>;
507 };
508
a75191e6 509 hdmi_vdd_reg: ldo7 {
6529e638
SW		 510 regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
511 regulator-min-microvolt = <3300000>;
512 regulator-max-microvolt = <3300000>;
513 };
514
a75191e6 515 hdmi_pll_reg: ldo8 {
6529e638
SW		 516 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
517 regulator-min-microvolt = <1800000>;
518 regulator-max-microvolt = <1800000>;
519 };
520
b9c665d7 521 ldo9 {
6529e638
SW		 522 regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
523 regulator-min-microvolt = <2850000>;
524 regulator-max-microvolt = <2850000>;
525 regulator-always-on;
526 };
527
b9c665d7 528 ldo_rtc {
6529e638
SW		 529 regulator-name = "vdd_rtc_out,vdd_cell";
530 regulator-min-microvolt = <3300000>;
531 regulator-max-microvolt = <3300000>;
532 regulator-always-on;
533 };
534 };
535 };
536
45dbe9dd 537 temperature-sensor@4c {
9846210b 538 compatible = "onnn,nct1008";
401c9a50
SW		 539 reg = <0x4c>;
540 };
f0d14306 541 };
d8017a97 542
58ecb23f 543 kbc@7000e200 {
beb0e325
LD		 544 status = "okay";
545 nvidia,debounce-delay-ms = <32>;
546 nvidia,repeat-delay-ms = <160>;
547 nvidia,ghost-filter;
548 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
549 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
6bccbd5e
LD		 550 linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W)
551 MATRIX_KEY(0x00, 0x03, KEY_S)
552 MATRIX_KEY(0x00, 0x04, KEY_A)
553 MATRIX_KEY(0x00, 0x05, KEY_Z)
554 MATRIX_KEY(0x00, 0x07, KEY_FN)
555
556 MATRIX_KEY(0x01, 0x07, KEY_LEFTMETA)
557 MATRIX_KEY(0x02, 0x06, KEY_RIGHTALT)
558 MATRIX_KEY(0x02, 0x07, KEY_LEFTALT)
559
560 MATRIX_KEY(0x03, 0x00, KEY_5)
561 MATRIX_KEY(0x03, 0x01, KEY_4)
562 MATRIX_KEY(0x03, 0x02, KEY_R)
563 MATRIX_KEY(0x03, 0x03, KEY_E)
564 MATRIX_KEY(0x03, 0x04, KEY_F)
565 MATRIX_KEY(0x03, 0x05, KEY_D)
566 MATRIX_KEY(0x03, 0x06, KEY_X)
567
568 MATRIX_KEY(0x04, 0x00, KEY_7)
569 MATRIX_KEY(0x04, 0x01, KEY_6)
570 MATRIX_KEY(0x04, 0x02, KEY_T)
571 MATRIX_KEY(0x04, 0x03, KEY_H)
572 MATRIX_KEY(0x04, 0x04, KEY_G)
573 MATRIX_KEY(0x04, 0x05, KEY_V)
574 MATRIX_KEY(0x04, 0x06, KEY_C)
575 MATRIX_KEY(0x04, 0x07, KEY_SPACE)
576
577 MATRIX_KEY(0x05, 0x00, KEY_9)
578 MATRIX_KEY(0x05, 0x01, KEY_8)
579 MATRIX_KEY(0x05, 0x02, KEY_U)
580 MATRIX_KEY(0x05, 0x03, KEY_Y)
581 MATRIX_KEY(0x05, 0x04, KEY_J)
582 MATRIX_KEY(0x05, 0x05, KEY_N)
583 MATRIX_KEY(0x05, 0x06, KEY_B)
584 MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH)
585
586 MATRIX_KEY(0x06, 0x00, KEY_MINUS)
587 MATRIX_KEY(0x06, 0x01, KEY_0)
588 MATRIX_KEY(0x06, 0x02, KEY_O)
589 MATRIX_KEY(0x06, 0x03, KEY_I)
590 MATRIX_KEY(0x06, 0x04, KEY_L)
591 MATRIX_KEY(0x06, 0x05, KEY_K)
592 MATRIX_KEY(0x06, 0x06, KEY_COMMA)
593 MATRIX_KEY(0x06, 0x07, KEY_M)
594
595 MATRIX_KEY(0x07, 0x01, KEY_EQUAL)
596 MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE)
597 MATRIX_KEY(0x07, 0x03, KEY_ENTER)
598 MATRIX_KEY(0x07, 0x07, KEY_MENU)
599
600 MATRIX_KEY(0x08, 0x04, KEY_RIGHTSHIFT)
601 MATRIX_KEY(0x08, 0x05, KEY_LEFTSHIFT)
602
603 MATRIX_KEY(0x09, 0x05, KEY_RIGHTCTRL)
604 MATRIX_KEY(0x09, 0x07, KEY_LEFTCTRL)
605
606 MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE)
607 MATRIX_KEY(0x0B, 0x01, KEY_P)
608 MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE)
609 MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON)
610 MATRIX_KEY(0x0B, 0x04, KEY_SLASH)
611 MATRIX_KEY(0x0B, 0x05, KEY_DOT)
612
613 MATRIX_KEY(0x0C, 0x00, KEY_F10)
614 MATRIX_KEY(0x0C, 0x01, KEY_F9)
615 MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE)
616 MATRIX_KEY(0x0C, 0x03, KEY_3)
617 MATRIX_KEY(0x0C, 0x04, KEY_2)
618 MATRIX_KEY(0x0C, 0x05, KEY_UP)
619 MATRIX_KEY(0x0C, 0x06, KEY_PRINT)
620 MATRIX_KEY(0x0C, 0x07, KEY_PAUSE)
621
622 MATRIX_KEY(0x0D, 0x00, KEY_INSERT)
623 MATRIX_KEY(0x0D, 0x01, KEY_DELETE)
624 MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP )
625 MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN)
626 MATRIX_KEY(0x0D, 0x05, KEY_RIGHT)
627 MATRIX_KEY(0x0D, 0x06, KEY_DOWN)
628 MATRIX_KEY(0x0D, 0x07, KEY_LEFT)
629
630 MATRIX_KEY(0x0E, 0x00, KEY_F11)
631 MATRIX_KEY(0x0E, 0x01, KEY_F12)
632 MATRIX_KEY(0x0E, 0x02, KEY_F8)
633 MATRIX_KEY(0x0E, 0x03, KEY_Q)
634 MATRIX_KEY(0x0E, 0x04, KEY_F4)
635 MATRIX_KEY(0x0E, 0x05, KEY_F3)
636 MATRIX_KEY(0x0E, 0x06, KEY_1)
637 MATRIX_KEY(0x0E, 0x07, KEY_F7)
638
639 MATRIX_KEY(0x0F, 0x00, KEY_ESC)
640 MATRIX_KEY(0x0F, 0x01, KEY_GRAVE)
641 MATRIX_KEY(0x0F, 0x02, KEY_F5)
642 MATRIX_KEY(0x0F, 0x03, KEY_TAB)
643 MATRIX_KEY(0x0F, 0x04, KEY_F1)
644 MATRIX_KEY(0x0F, 0x05, KEY_F2)
645 MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK)
646 MATRIX_KEY(0x0F, 0x07, KEY_F6)
beb0e325
LD		 647
648 /* Software Handled Function Keys */
6bccbd5e
LD		 649 MATRIX_KEY(0x14, 0x00, KEY_KP7)
650
651 MATRIX_KEY(0x15, 0x00, KEY_KP9)
652 MATRIX_KEY(0x15, 0x01, KEY_KP8)
653 MATRIX_KEY(0x15, 0x02, KEY_KP4)
654 MATRIX_KEY(0x15, 0x04, KEY_KP1)
655
656 MATRIX_KEY(0x16, 0x01, KEY_KPSLASH)
657 MATRIX_KEY(0x16, 0x02, KEY_KP6)
658 MATRIX_KEY(0x16, 0x03, KEY_KP5)
659 MATRIX_KEY(0x16, 0x04, KEY_KP3)
660 MATRIX_KEY(0x16, 0x05, KEY_KP2)
661 MATRIX_KEY(0x16, 0x07, KEY_KP0)
662
663 MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK)
664 MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS)
665 MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS)
666 MATRIX_KEY(0x1B, 0x05, KEY_KPDOT)
667
668 MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP)
669
670 MATRIX_KEY(0x1D, 0x03, KEY_HOME)
671 MATRIX_KEY(0x1D, 0x04, KEY_END)
672 MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSDOWN)
673 MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN)
674 MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSUP)
675
676 MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK)
677 MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK)
678 MATRIX_KEY(0x1E, 0x02, KEY_MUTE)
679
680 MATRIX_KEY(0x1F, 0x04, KEY_HELP)>;
beb0e325 681 };
57899053
SW		 682
683 pmc@7000e400 {
684 nvidia,invert-interrupt;
685 nvidia,suspend-mode = <1>;
686 nvidia,cpu-pwr-good-time = <5000>;
687 nvidia,cpu-pwr-off-time = <5000>;
688 nvidia,core-pwr-good-time = <3845 3845>;
689 nvidia,core-pwr-off-time = <3875>;
690 nvidia,sys-clock-req-active-high;
691 };
692
693 memory-controller@7000f400 {
694 emc-table@190000 {
695 reg = <190000>;
696 compatible = "nvidia,tegra20-emc-table";
697 clock-frequency = <190000>;
698 nvidia,emc-registers = <0x0000000c 0x00000026
699 0x00000009 0x00000003 0x00000004 0x00000004
700 0x00000002 0x0000000c 0x00000003 0x00000003
701 0x00000002 0x00000001 0x00000004 0x00000005
702 0x00000004 0x00000009 0x0000000d 0x0000059f
703 0x00000000 0x00000003 0x00000003 0x00000003
704 0x00000003 0x00000001 0x0000000b 0x000000c8
705 0x00000003 0x00000007 0x00000004 0x0000000f
706 0x00000002 0x00000000 0x00000000 0x00000002
707 0x00000000 0x00000000 0x00000083 0xa06204ae
708 0x007dc010 0x00000000 0x00000000 0x00000000
709 0x00000000 0x00000000 0x00000000 0x00000000>;
710 };
711
712 emc-table@380000 {
713 reg = <380000>;
714 compatible = "nvidia,tegra20-emc-table";
715 clock-frequency = <380000>;
716 nvidia,emc-registers = <0x00000017 0x0000004b
717 0x00000012 0x00000006 0x00000004 0x00000005
718 0x00000003 0x0000000c 0x00000006 0x00000006
719 0x00000003 0x00000001 0x00000004 0x00000005
720 0x00000004 0x00000009 0x0000000d 0x00000b5f
721 0x00000000 0x00000003 0x00000003 0x00000006
722 0x00000006 0x00000001 0x00000011 0x000000c8
723 0x00000003 0x0000000e 0x00000007 0x0000000f
724 0x00000002 0x00000000 0x00000000 0x00000002
725 0x00000000 0x00000000 0x00000083 0xe044048b
726 0x007d8010 0x00000000 0x00000000 0x00000000
727 0x00000000 0x00000000 0x00000000 0x00000000>;
728 };
729 };
730
731 usb@c5000000 {
732 status = "okay";
733 dr_mode = "otg";
734 };
735
736 usb-phy@c5000000 {
737 status = "okay";
738 vbus-supply = <&vbus_reg>;
739 dr_mode = "otg";
740 };
741
742 usb@c5004000 {
743 status = "okay";
744 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
745 GPIO_ACTIVE_LOW>;
746 };
747
748 usb-phy@c5004000 {
749 status = "okay";
750 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
751 GPIO_ACTIVE_LOW>;
752 };
753
754 usb@c5008000 {
755 status = "okay";
756 };
757
758 usb-phy@c5008000 {
759 status = "okay";
760 };
761
762 sdhci@c8000000 {
763 status = "okay";
764 power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
765 bus-width = <4>;
766 keep-power-in-suspend;
767 };
768
769 sdhci@c8000400 {
770 status = "okay";
771 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
772 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
773 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
774 bus-width = <4>;
775 };
776
777 sdhci@c8000600 {
778 status = "okay";
779 bus-width = <8>;
780 non-removable;
781 };
782
9615d656
SW		 783 backlight: backlight {
784 compatible = "pwm-backlight";
785
786 enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
787 power-supply = <&vdd_bl_reg>;
788 pwms = <&pwm 2 5000000>;
789
790 brightness-levels = <0 4 8 16 32 64 128 255>;
791 default-brightness-level = <6>;
792 };
793
57899053
SW		 794 clocks {
795 compatible = "simple-bus";
796 #address-cells = <1>;
797 #size-cells = <0>;
798
799 clk32k_in: clock@0 {
800 compatible = "fixed-clock";
4ec2e601 801 reg = <0>;
57899053
SW		 802 #clock-cells = <0>;
803 clock-frequency = <32768>;
804 };
805 };
806
807 gpio-keys {
808 compatible = "gpio-keys";
809
810 power {
811 label = "Power";
812 gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
6bccbd5e 813 linux,code = <KEY_POWER>;
d1c04d30 814 wakeup-source;
57899053
SW		 815 };
816
817 lid {
818 label = "Lid";
819 gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
820 linux,input-type = <5>; /* EV_SW */
821 linux,code = <0>; /* SW_LID */
822 debounce-interval = <1>;
d1c04d30 823 wakeup-source;
57899053
SW		 824 };
825 };
826
9615d656
SW		 827 panel: panel {
828 compatible = "chunghwa,claa101wa01a", "simple-panel";
829
830 power-supply = <&vdd_pnl_reg>;
831 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
832
833 backlight = <&backlight>;
834 ddc-i2c-bus = <&lvds_ddc>;
835 };
836
6529e638
SW		 837 regulators {
838 compatible = "simple-bus";
839 #address-cells = <1>;
840 #size-cells = <0>;
841
842 vdd_5v0_reg: regulator@0 {
843 compatible = "regulator-fixed";
844 reg = <0>;
845 regulator-name = "vdd_5v0";
846 regulator-min-microvolt = <5000000>;
847 regulator-max-microvolt = <5000000>;
848 regulator-always-on;
849 };
850
851 regulator@1 {
852 compatible = "regulator-fixed";
853 reg = <1>;
854 regulator-name = "vdd_1v5";
855 regulator-min-microvolt = <1500000>;
856 regulator-max-microvolt = <1500000>;
3325f1bc 857 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
6529e638
SW		 858 };
859
860 regulator@2 {
861 compatible = "regulator-fixed";
862 reg = <2>;
863 regulator-name = "vdd_1v2";
864 regulator-min-microvolt = <1200000>;
865 regulator-max-microvolt = <1200000>;
3325f1bc 866 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
6529e638
SW		 867 enable-active-high;
868 };
4c94c8b5
VB		 869
870 vbus_reg: regulator@3 {
871 compatible = "regulator-fixed";
872 reg = <3>;
873 regulator-name = "vdd_vbus_wup1";
874 regulator-min-microvolt = <5000000>;
875 regulator-max-microvolt = <5000000>;
9f310ded 876 enable-active-high;
23f95ef2 877 gpio = <&gpio TEGRA_GPIO(D, 0) 0>;
30ca2226
SW		 878 regulator-always-on;
879 regulator-boot-on;
4c94c8b5 880 };
9615d656
SW		 881
882 vdd_pnl_reg: regulator@4 {
883 compatible = "regulator-fixed";
884 reg = <4>;
885 regulator-name = "vdd_pnl";
886 regulator-min-microvolt = <2800000>;
887 regulator-max-microvolt = <2800000>;
888 gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
889 enable-active-high;
890 };
891
892 vdd_bl_reg: regulator@5 {
893 compatible = "regulator-fixed";
894 reg = <5>;
895 regulator-name = "vdd_bl";
896 regulator-min-microvolt = <2800000>;
897 regulator-max-microvolt = <2800000>;
898 gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
899 enable-active-high;
900 };
5264d274
TR		 901
902 vdd_hdmi: regulator@6 {
903 compatible = "regulator-fixed";
904 reg = <6>;
905 regulator-name = "VDDIO_HDMI";
906 regulator-min-microvolt = <5000000>;
907 regulator-max-microvolt = <5000000>;
908 gpio = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
909 enable-active-high;
910 vin-supply = <&vdd_5v0_reg>;
911 };
6529e638
SW		 912 };
913
c04abb3a
SW		 914 sound {
915 compatible = "nvidia,tegra-audio-wm8903-seaboard",
916 "nvidia,tegra-audio-wm8903";
917 nvidia,model = "NVIDIA Tegra Seaboard";
d8017a97 918
c04abb3a
SW		 919 nvidia,audio-routing =
920 "Headphone Jack", "HPOUTR",
921 "Headphone Jack", "HPOUTL",
922 "Int Spk", "ROP",
923 "Int Spk", "RON",
924 "Int Spk", "LOP",
925 "Int Spk", "LON",
926 "Mic Jack", "MICBIAS",
927 "IN1R", "Mic Jack";
aa607ebf 928
c04abb3a
SW		 929 nvidia,i2s-controller = <&tegra_i2s1>;
930 nvidia,audio-codec = <&wm8903>;
931
3325f1bc
SW		 932 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
933 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
f9cd2b3b 934
885a8cfa
HD		 935 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
936 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
937 <&tegra_car TEGRA20_CLK_CDEV1>;
f9cd2b3b 938 clock-names = "pll_a", "pll_a_out0", "mclk";
aa607ebf 939 };
8e267f3d 940};
Linux kernel - Deliverables
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