ARM: tegra: convert device tree files to use key defines
[deliverable/linux.git] / arch / arm / boot / dts / tegra20-seaboard.dts
CommitLineData
8e267f3d
GL
1/dts-v1/;
2
6bccbd5e 3#include <dt-bindings/input/input.h>
1bd0bd49 4#include "tegra20.dtsi"
8e267f3d
GL
5
6/ {
7 model = "NVIDIA Seaboard";
8 compatible = "nvidia,seaboard", "nvidia,tegra20";
9
8e267f3d 10 memory {
95decf84 11 reg = <0x00000000 0x40000000>;
8e267f3d
GL
12 };
13
58ecb23f
SW
14 host1x@50000000 {
15 hdmi@54280000 {
a75191e6
SW
16 status = "okay";
17
18 vdd-supply = <&hdmi_vdd_reg>;
19 pll-supply = <&hdmi_pll_reg>;
20
21 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
3325f1bc
SW
22 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
23 GPIO_ACTIVE_HIGH>;
a75191e6
SW
24 };
25 };
26
58ecb23f 27 pinmux@70000014 {
ecc295bb
SW
28 pinctrl-names = "default";
29 pinctrl-0 = <&state_default>;
30
31 state_default: pinmux {
32 ata {
33 nvidia,pins = "ata";
34 nvidia,function = "ide";
35 };
36 atb {
37 nvidia,pins = "atb", "gma", "gme";
38 nvidia,function = "sdio4";
39 };
40 atc {
41 nvidia,pins = "atc";
42 nvidia,function = "nand";
43 };
44 atd {
45 nvidia,pins = "atd", "ate", "gmb", "spia",
46 "spib", "spic";
47 nvidia,function = "gmi";
48 };
49 cdev1 {
50 nvidia,pins = "cdev1";
51 nvidia,function = "plla_out";
52 };
53 cdev2 {
54 nvidia,pins = "cdev2";
55 nvidia,function = "pllp_out4";
56 };
57 crtp {
58 nvidia,pins = "crtp", "lm1";
59 nvidia,function = "crt";
60 };
61 csus {
62 nvidia,pins = "csus";
63 nvidia,function = "vi_sensor_clk";
64 };
65 dap1 {
66 nvidia,pins = "dap1";
67 nvidia,function = "dap1";
68 };
69 dap2 {
70 nvidia,pins = "dap2";
71 nvidia,function = "dap2";
72 };
73 dap3 {
74 nvidia,pins = "dap3";
75 nvidia,function = "dap3";
76 };
77 dap4 {
78 nvidia,pins = "dap4";
79 nvidia,function = "dap4";
80 };
ecc295bb
SW
81 dta {
82 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
83 nvidia,function = "vi";
84 };
85 dtf {
86 nvidia,pins = "dtf";
87 nvidia,function = "i2c3";
88 };
89 gmc {
90 nvidia,pins = "gmc";
91 nvidia,function = "uartd";
92 };
93 gmd {
94 nvidia,pins = "gmd";
95 nvidia,function = "sflash";
96 };
97 gpu {
98 nvidia,pins = "gpu";
99 nvidia,function = "pwm";
100 };
101 gpu7 {
102 nvidia,pins = "gpu7";
103 nvidia,function = "rtck";
104 };
105 gpv {
106 nvidia,pins = "gpv", "slxa", "slxk";
107 nvidia,function = "pcie";
108 };
109 hdint {
110 nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
802a8499 111 "lsck", "lsda";
ecc295bb
SW
112 nvidia,function = "hdmi";
113 };
114 i2cp {
115 nvidia,pins = "i2cp";
116 nvidia,function = "i2cp";
117 };
118 irrx {
119 nvidia,pins = "irrx", "irtx";
120 nvidia,function = "uartb";
121 };
122 kbca {
123 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
124 "kbce", "kbcf";
125 nvidia,function = "kbc";
126 };
127 lcsn {
128 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
129 "lsdi", "lvp0";
130 nvidia,function = "rsvd4";
131 };
132 ld0 {
133 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
134 "ld5", "ld6", "ld7", "ld8", "ld9",
135 "ld10", "ld11", "ld12", "ld13", "ld14",
136 "ld15", "ld16", "ld17", "ldi", "lhp0",
137 "lhp1", "lhp2", "lhs", "lpp", "lsc0",
138 "lspi", "lvp1", "lvs";
139 nvidia,function = "displaya";
140 };
a18cf6dc
SW
141 owc {
142 nvidia,pins = "owc", "spdi", "spdo", "uac";
143 nvidia,function = "rsvd2";
144 };
ecc295bb
SW
145 pmc {
146 nvidia,pins = "pmc";
147 nvidia,function = "pwr_on";
148 };
149 rm {
150 nvidia,pins = "rm";
151 nvidia,function = "i2c1";
152 };
153 sdb {
154 nvidia,pins = "sdb", "sdc", "sdd";
155 nvidia,function = "sdio3";
156 };
157 sdio1 {
158 nvidia,pins = "sdio1";
159 nvidia,function = "sdio1";
160 };
161 slxc {
162 nvidia,pins = "slxc", "slxd";
163 nvidia,function = "spdif";
164 };
165 spid {
166 nvidia,pins = "spid", "spie", "spif";
167 nvidia,function = "spi1";
168 };
169 spig {
170 nvidia,pins = "spig", "spih";
171 nvidia,function = "spi2_alt";
172 };
173 uaa {
174 nvidia,pins = "uaa", "uab", "uda";
175 nvidia,function = "ulpi";
176 };
177 uad {
178 nvidia,pins = "uad";
179 nvidia,function = "irda";
180 };
181 uca {
182 nvidia,pins = "uca", "ucb";
183 nvidia,function = "uartc";
184 };
185 conf_ata {
186 nvidia,pins = "ata", "atb", "atc", "atd",
187 "cdev1", "cdev2", "dap1", "dap2",
a18cf6dc 188 "dap4", "ddc", "dtf", "gma", "gmc", "gmd",
ecc295bb
SW
189 "gme", "gpu", "gpu7", "i2cp", "irrx",
190 "irtx", "pta", "rm", "sdc", "sdd",
191 "slxd", "slxk", "spdi", "spdo", "uac",
192 "uad", "uca", "ucb", "uda";
193 nvidia,pull = <0>;
194 nvidia,tristate = <0>;
195 };
196 conf_ate {
a18cf6dc 197 nvidia,pins = "ate", "csus", "dap3",
ecc295bb
SW
198 "gpv", "owc", "slxc", "spib", "spid",
199 "spie";
200 nvidia,pull = <0>;
201 nvidia,tristate = <1>;
202 };
203 conf_ck32 {
204 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
205 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
206 nvidia,pull = <0>;
207 };
208 conf_crtp {
209 nvidia,pins = "crtp", "gmb", "slxa", "spia",
210 "spig", "spih";
211 nvidia,pull = <2>;
212 nvidia,tristate = <1>;
213 };
214 conf_dta {
215 nvidia,pins = "dta", "dtb", "dtc", "dtd";
216 nvidia,pull = <1>;
217 nvidia,tristate = <0>;
218 };
219 conf_dte {
220 nvidia,pins = "dte", "spif";
221 nvidia,pull = <1>;
222 nvidia,tristate = <1>;
223 };
224 conf_hdint {
225 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
226 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
227 "lvp0";
228 nvidia,tristate = <1>;
229 };
230 conf_kbca {
231 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
232 "kbce", "kbcf", "sdio1", "spic", "uaa",
233 "uab";
234 nvidia,pull = <2>;
235 nvidia,tristate = <0>;
236 };
237 conf_lc {
238 nvidia,pins = "lc", "ls";
239 nvidia,pull = <2>;
240 };
241 conf_ld0 {
242 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
243 "ld5", "ld6", "ld7", "ld8", "ld9",
244 "ld10", "ld11", "ld12", "ld13", "ld14",
245 "ld15", "ld16", "ld17", "ldi", "lhp0",
246 "lhp1", "lhp2", "lhs", "lm0", "lpp",
247 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
248 "lvs", "pmc", "sdb";
249 nvidia,tristate = <0>;
250 };
251 conf_ld17_0 {
252 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
253 "ld23_22";
254 nvidia,pull = <1>;
255 };
256 drive_sdio1 {
257 nvidia,pins = "drive_sdio1";
258 nvidia,high-speed-mode = <0>;
259 nvidia,schmitt = <0>;
260 nvidia,low-power-mode = <3>;
261 nvidia,pull-down-strength = <31>;
262 nvidia,pull-up-strength = <31>;
263 nvidia,slew-rate-rising = <3>;
264 nvidia,slew-rate-falling = <3>;
265 };
266 };
a18cf6dc
SW
267
268 state_i2cmux_ddc: pinmux_i2cmux_ddc {
269 ddc {
270 nvidia,pins = "ddc";
271 nvidia,function = "i2c2";
272 };
273 pta {
274 nvidia,pins = "pta";
275 nvidia,function = "rsvd4";
276 };
277 };
278
279 state_i2cmux_pta: pinmux_i2cmux_pta {
280 ddc {
281 nvidia,pins = "ddc";
282 nvidia,function = "rsvd4";
283 };
284 pta {
285 nvidia,pins = "pta";
286 nvidia,function = "i2c2";
287 };
288 };
289
290 state_i2cmux_idle: pinmux_i2cmux_idle {
291 ddc {
292 nvidia,pins = "ddc";
293 nvidia,function = "rsvd4";
294 };
295 pta {
296 nvidia,pins = "pta";
297 nvidia,function = "rsvd4";
298 };
299 };
ecc295bb
SW
300 };
301
2a5fdc9a
SW
302 i2s@70002800 {
303 status = "okay";
c04abb3a
SW
304 };
305
306 serial@70006300 {
2a5fdc9a 307 status = "okay";
c04abb3a
SW
308 };
309
88950f3b 310 i2c@7000c000 {
2a5fdc9a 311 status = "okay";
88950f3b 312 clock-frequency = <400000>;
797acf70
SW
313
314 wm8903: wm8903@1a {
315 compatible = "wlf,wm8903";
316 reg = <0x1a>;
317 interrupt-parent = <&gpio>;
6cecf916 318 interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
797acf70
SW
319
320 gpio-controller;
321 #gpio-cells = <2>;
322
323 micdet-cfg = <0>;
324 micdet-delay = <100>;
95decf84 325 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
797acf70 326 };
b46b0b54
LD
327
328 /* ALS and proximity sensor */
329 isl29018@44 {
330 compatible = "isil,isl29018";
331 reg = <0x44>;
332 interrupt-parent = <&gpio>;
6cecf916 333 interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
b46b0b54 334 };
45dbe9dd
OJ
335
336 gyrometer@68 {
337 compatible = "invn,mpu3050";
338 reg = <0x68>;
339 interrupt-parent = <&gpio>;
6cecf916 340 interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_LEVEL_HIGH>;
45dbe9dd 341 };
88950f3b
SW
342 };
343
344 i2c@7000c400 {
2a5fdc9a 345 status = "okay";
22bd1f7e 346 clock-frequency = <100000>;
88950f3b
SW
347 };
348
a18cf6dc
SW
349 i2cmux {
350 compatible = "i2c-mux-pinctrl";
351 #address-cells = <1>;
352 #size-cells = <0>;
353
354 i2c-parent = <&{/i2c@7000c400}>;
355
356 pinctrl-names = "ddc", "pta", "idle";
357 pinctrl-0 = <&state_i2cmux_ddc>;
358 pinctrl-1 = <&state_i2cmux_pta>;
359 pinctrl-2 = <&state_i2cmux_idle>;
360
a75191e6 361 hdmi_ddc: i2c@0 {
a18cf6dc
SW
362 reg = <0>;
363 #address-cells = <1>;
364 #size-cells = <0>;
365 };
366
367 i2c@1 {
368 reg = <1>;
369 #address-cells = <1>;
370 #size-cells = <0>;
0879c5f7
SW
371
372 smart-battery@b {
373 compatible = "ti,bq20z75", "smart-battery-1.1";
374 reg = <0xb>;
375 ti,i2c-retry-count = <2>;
376 ti,poll-retry-count = <10>;
377 };
a18cf6dc
SW
378 };
379 };
380
88950f3b 381 i2c@7000c500 {
2a5fdc9a 382 status = "okay";
88950f3b
SW
383 clock-frequency = <400000>;
384 };
385
386 i2c@7000d000 {
2a5fdc9a 387 status = "okay";
88950f3b 388 clock-frequency = <400000>;
401c9a50 389
57899053
SW
390 magnetometer@c {
391 compatible = "ak,ak8975";
392 reg = <0xc>;
393 interrupt-parent = <&gpio>;
394 interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>;
395 };
396
6529e638
SW
397 pmic: tps6586x@34 {
398 compatible = "ti,tps6586x";
399 reg = <0x34>;
6cecf916 400 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
6529e638 401
44b12ef7
SW
402 ti,system-power-controller;
403
6529e638
SW
404 #gpio-cells = <2>;
405 gpio-controller;
406
407 sys-supply = <&vdd_5v0_reg>;
408 vin-sm0-supply = <&sys_reg>;
409 vin-sm1-supply = <&sys_reg>;
410 vin-sm2-supply = <&sys_reg>;
411 vinldo01-supply = <&sm2_reg>;
412 vinldo23-supply = <&sm2_reg>;
413 vinldo4-supply = <&sm2_reg>;
414 vinldo678-supply = <&sm2_reg>;
415 vinldo9-supply = <&sm2_reg>;
416
417 regulators {
b9c665d7 418 sys_reg: sys {
6529e638
SW
419 regulator-name = "vdd_sys";
420 regulator-always-on;
421 };
422
b9c665d7 423 sm0 {
6529e638
SW
424 regulator-name = "vdd_sm0,vdd_core";
425 regulator-min-microvolt = <1300000>;
426 regulator-max-microvolt = <1300000>;
427 regulator-always-on;
428 };
429
b9c665d7 430 sm1 {
6529e638
SW
431 regulator-name = "vdd_sm1,vdd_cpu";
432 regulator-min-microvolt = <1125000>;
433 regulator-max-microvolt = <1125000>;
434 regulator-always-on;
435 };
436
b9c665d7 437 sm2_reg: sm2 {
6529e638
SW
438 regulator-name = "vdd_sm2,vin_ldo*";
439 regulator-min-microvolt = <3700000>;
440 regulator-max-microvolt = <3700000>;
441 regulator-always-on;
442 };
443
444 /* LDO0 is not connected to anything */
445
b9c665d7 446 ldo1 {
6529e638
SW
447 regulator-name = "vdd_ldo1,avdd_pll*";
448 regulator-min-microvolt = <1100000>;
449 regulator-max-microvolt = <1100000>;
450 regulator-always-on;
451 };
452
b9c665d7 453 ldo2 {
6529e638
SW
454 regulator-name = "vdd_ldo2,vdd_rtc";
455 regulator-min-microvolt = <1200000>;
456 regulator-max-microvolt = <1200000>;
457 };
458
b9c665d7 459 ldo3 {
6529e638
SW
460 regulator-name = "vdd_ldo3,avdd_usb*";
461 regulator-min-microvolt = <3300000>;
462 regulator-max-microvolt = <3300000>;
463 regulator-always-on;
464 };
465
b9c665d7 466 ldo4 {
6529e638
SW
467 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
468 regulator-min-microvolt = <1800000>;
469 regulator-max-microvolt = <1800000>;
470 regulator-always-on;
471 };
472
b9c665d7 473 ldo5 {
6529e638
SW
474 regulator-name = "vdd_ldo5,vcore_mmc";
475 regulator-min-microvolt = <2850000>;
476 regulator-max-microvolt = <2850000>;
477 regulator-always-on;
478 };
479
b9c665d7 480 ldo6 {
6529e638
SW
481 regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
482 regulator-min-microvolt = <1800000>;
483 regulator-max-microvolt = <1800000>;
484 };
485
a75191e6 486 hdmi_vdd_reg: ldo7 {
6529e638
SW
487 regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
488 regulator-min-microvolt = <3300000>;
489 regulator-max-microvolt = <3300000>;
490 };
491
a75191e6 492 hdmi_pll_reg: ldo8 {
6529e638
SW
493 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
494 regulator-min-microvolt = <1800000>;
495 regulator-max-microvolt = <1800000>;
496 };
497
b9c665d7 498 ldo9 {
6529e638
SW
499 regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
500 regulator-min-microvolt = <2850000>;
501 regulator-max-microvolt = <2850000>;
502 regulator-always-on;
503 };
504
b9c665d7 505 ldo_rtc {
6529e638
SW
506 regulator-name = "vdd_rtc_out,vdd_cell";
507 regulator-min-microvolt = <3300000>;
508 regulator-max-microvolt = <3300000>;
509 regulator-always-on;
510 };
511 };
512 };
513
45dbe9dd 514 temperature-sensor@4c {
9846210b 515 compatible = "onnn,nct1008";
401c9a50
SW
516 reg = <0x4c>;
517 };
f0d14306 518 };
d8017a97 519
58ecb23f 520 kbc@7000e200 {
beb0e325
LD
521 status = "okay";
522 nvidia,debounce-delay-ms = <32>;
523 nvidia,repeat-delay-ms = <160>;
524 nvidia,ghost-filter;
525 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
526 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
6bccbd5e
LD
527 linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W)
528 MATRIX_KEY(0x00, 0x03, KEY_S)
529 MATRIX_KEY(0x00, 0x04, KEY_A)
530 MATRIX_KEY(0x00, 0x05, KEY_Z)
531 MATRIX_KEY(0x00, 0x07, KEY_FN)
532
533 MATRIX_KEY(0x01, 0x07, KEY_LEFTMETA)
534 MATRIX_KEY(0x02, 0x06, KEY_RIGHTALT)
535 MATRIX_KEY(0x02, 0x07, KEY_LEFTALT)
536
537 MATRIX_KEY(0x03, 0x00, KEY_5)
538 MATRIX_KEY(0x03, 0x01, KEY_4)
539 MATRIX_KEY(0x03, 0x02, KEY_R)
540 MATRIX_KEY(0x03, 0x03, KEY_E)
541 MATRIX_KEY(0x03, 0x04, KEY_F)
542 MATRIX_KEY(0x03, 0x05, KEY_D)
543 MATRIX_KEY(0x03, 0x06, KEY_X)
544
545 MATRIX_KEY(0x04, 0x00, KEY_7)
546 MATRIX_KEY(0x04, 0x01, KEY_6)
547 MATRIX_KEY(0x04, 0x02, KEY_T)
548 MATRIX_KEY(0x04, 0x03, KEY_H)
549 MATRIX_KEY(0x04, 0x04, KEY_G)
550 MATRIX_KEY(0x04, 0x05, KEY_V)
551 MATRIX_KEY(0x04, 0x06, KEY_C)
552 MATRIX_KEY(0x04, 0x07, KEY_SPACE)
553
554 MATRIX_KEY(0x05, 0x00, KEY_9)
555 MATRIX_KEY(0x05, 0x01, KEY_8)
556 MATRIX_KEY(0x05, 0x02, KEY_U)
557 MATRIX_KEY(0x05, 0x03, KEY_Y)
558 MATRIX_KEY(0x05, 0x04, KEY_J)
559 MATRIX_KEY(0x05, 0x05, KEY_N)
560 MATRIX_KEY(0x05, 0x06, KEY_B)
561 MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH)
562
563 MATRIX_KEY(0x06, 0x00, KEY_MINUS)
564 MATRIX_KEY(0x06, 0x01, KEY_0)
565 MATRIX_KEY(0x06, 0x02, KEY_O)
566 MATRIX_KEY(0x06, 0x03, KEY_I)
567 MATRIX_KEY(0x06, 0x04, KEY_L)
568 MATRIX_KEY(0x06, 0x05, KEY_K)
569 MATRIX_KEY(0x06, 0x06, KEY_COMMA)
570 MATRIX_KEY(0x06, 0x07, KEY_M)
571
572 MATRIX_KEY(0x07, 0x01, KEY_EQUAL)
573 MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE)
574 MATRIX_KEY(0x07, 0x03, KEY_ENTER)
575 MATRIX_KEY(0x07, 0x07, KEY_MENU)
576
577 MATRIX_KEY(0x08, 0x04, KEY_RIGHTSHIFT)
578 MATRIX_KEY(0x08, 0x05, KEY_LEFTSHIFT)
579
580 MATRIX_KEY(0x09, 0x05, KEY_RIGHTCTRL)
581 MATRIX_KEY(0x09, 0x07, KEY_LEFTCTRL)
582
583 MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE)
584 MATRIX_KEY(0x0B, 0x01, KEY_P)
585 MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE)
586 MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON)
587 MATRIX_KEY(0x0B, 0x04, KEY_SLASH)
588 MATRIX_KEY(0x0B, 0x05, KEY_DOT)
589
590 MATRIX_KEY(0x0C, 0x00, KEY_F10)
591 MATRIX_KEY(0x0C, 0x01, KEY_F9)
592 MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE)
593 MATRIX_KEY(0x0C, 0x03, KEY_3)
594 MATRIX_KEY(0x0C, 0x04, KEY_2)
595 MATRIX_KEY(0x0C, 0x05, KEY_UP)
596 MATRIX_KEY(0x0C, 0x06, KEY_PRINT)
597 MATRIX_KEY(0x0C, 0x07, KEY_PAUSE)
598
599 MATRIX_KEY(0x0D, 0x00, KEY_INSERT)
600 MATRIX_KEY(0x0D, 0x01, KEY_DELETE)
601 MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP )
602 MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN)
603 MATRIX_KEY(0x0D, 0x05, KEY_RIGHT)
604 MATRIX_KEY(0x0D, 0x06, KEY_DOWN)
605 MATRIX_KEY(0x0D, 0x07, KEY_LEFT)
606
607 MATRIX_KEY(0x0E, 0x00, KEY_F11)
608 MATRIX_KEY(0x0E, 0x01, KEY_F12)
609 MATRIX_KEY(0x0E, 0x02, KEY_F8)
610 MATRIX_KEY(0x0E, 0x03, KEY_Q)
611 MATRIX_KEY(0x0E, 0x04, KEY_F4)
612 MATRIX_KEY(0x0E, 0x05, KEY_F3)
613 MATRIX_KEY(0x0E, 0x06, KEY_1)
614 MATRIX_KEY(0x0E, 0x07, KEY_F7)
615
616 MATRIX_KEY(0x0F, 0x00, KEY_ESC)
617 MATRIX_KEY(0x0F, 0x01, KEY_GRAVE)
618 MATRIX_KEY(0x0F, 0x02, KEY_F5)
619 MATRIX_KEY(0x0F, 0x03, KEY_TAB)
620 MATRIX_KEY(0x0F, 0x04, KEY_F1)
621 MATRIX_KEY(0x0F, 0x05, KEY_F2)
622 MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK)
623 MATRIX_KEY(0x0F, 0x07, KEY_F6)
beb0e325
LD
624
625 /* Software Handled Function Keys */
6bccbd5e
LD
626 MATRIX_KEY(0x14, 0x00, KEY_KP7)
627
628 MATRIX_KEY(0x15, 0x00, KEY_KP9)
629 MATRIX_KEY(0x15, 0x01, KEY_KP8)
630 MATRIX_KEY(0x15, 0x02, KEY_KP4)
631 MATRIX_KEY(0x15, 0x04, KEY_KP1)
632
633 MATRIX_KEY(0x16, 0x01, KEY_KPSLASH)
634 MATRIX_KEY(0x16, 0x02, KEY_KP6)
635 MATRIX_KEY(0x16, 0x03, KEY_KP5)
636 MATRIX_KEY(0x16, 0x04, KEY_KP3)
637 MATRIX_KEY(0x16, 0x05, KEY_KP2)
638 MATRIX_KEY(0x16, 0x07, KEY_KP0)
639
640 MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK)
641 MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS)
642 MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS)
643 MATRIX_KEY(0x1B, 0x05, KEY_KPDOT)
644
645 MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP)
646
647 MATRIX_KEY(0x1D, 0x03, KEY_HOME)
648 MATRIX_KEY(0x1D, 0x04, KEY_END)
649 MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSDOWN)
650 MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN)
651 MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSUP)
652
653 MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK)
654 MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK)
655 MATRIX_KEY(0x1E, 0x02, KEY_MUTE)
656
657 MATRIX_KEY(0x1F, 0x04, KEY_HELP)>;
beb0e325 658 };
57899053
SW
659
660 pmc@7000e400 {
661 nvidia,invert-interrupt;
662 nvidia,suspend-mode = <1>;
663 nvidia,cpu-pwr-good-time = <5000>;
664 nvidia,cpu-pwr-off-time = <5000>;
665 nvidia,core-pwr-good-time = <3845 3845>;
666 nvidia,core-pwr-off-time = <3875>;
667 nvidia,sys-clock-req-active-high;
668 };
669
670 memory-controller@7000f400 {
671 emc-table@190000 {
672 reg = <190000>;
673 compatible = "nvidia,tegra20-emc-table";
674 clock-frequency = <190000>;
675 nvidia,emc-registers = <0x0000000c 0x00000026
676 0x00000009 0x00000003 0x00000004 0x00000004
677 0x00000002 0x0000000c 0x00000003 0x00000003
678 0x00000002 0x00000001 0x00000004 0x00000005
679 0x00000004 0x00000009 0x0000000d 0x0000059f
680 0x00000000 0x00000003 0x00000003 0x00000003
681 0x00000003 0x00000001 0x0000000b 0x000000c8
682 0x00000003 0x00000007 0x00000004 0x0000000f
683 0x00000002 0x00000000 0x00000000 0x00000002
684 0x00000000 0x00000000 0x00000083 0xa06204ae
685 0x007dc010 0x00000000 0x00000000 0x00000000
686 0x00000000 0x00000000 0x00000000 0x00000000>;
687 };
688
689 emc-table@380000 {
690 reg = <380000>;
691 compatible = "nvidia,tegra20-emc-table";
692 clock-frequency = <380000>;
693 nvidia,emc-registers = <0x00000017 0x0000004b
694 0x00000012 0x00000006 0x00000004 0x00000005
695 0x00000003 0x0000000c 0x00000006 0x00000006
696 0x00000003 0x00000001 0x00000004 0x00000005
697 0x00000004 0x00000009 0x0000000d 0x00000b5f
698 0x00000000 0x00000003 0x00000003 0x00000006
699 0x00000006 0x00000001 0x00000011 0x000000c8
700 0x00000003 0x0000000e 0x00000007 0x0000000f
701 0x00000002 0x00000000 0x00000000 0x00000002
702 0x00000000 0x00000000 0x00000083 0xe044048b
703 0x007d8010 0x00000000 0x00000000 0x00000000
704 0x00000000 0x00000000 0x00000000 0x00000000>;
705 };
706 };
707
708 usb@c5000000 {
709 status = "okay";
710 dr_mode = "otg";
711 };
712
713 usb-phy@c5000000 {
714 status = "okay";
715 vbus-supply = <&vbus_reg>;
716 dr_mode = "otg";
717 };
718
719 usb@c5004000 {
720 status = "okay";
721 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
722 GPIO_ACTIVE_LOW>;
723 };
724
725 usb-phy@c5004000 {
726 status = "okay";
727 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
728 GPIO_ACTIVE_LOW>;
729 };
730
731 usb@c5008000 {
732 status = "okay";
733 };
734
735 usb-phy@c5008000 {
736 status = "okay";
737 };
738
739 sdhci@c8000000 {
740 status = "okay";
741 power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
742 bus-width = <4>;
743 keep-power-in-suspend;
744 };
745
746 sdhci@c8000400 {
747 status = "okay";
748 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
749 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
750 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
751 bus-width = <4>;
752 };
753
754 sdhci@c8000600 {
755 status = "okay";
756 bus-width = <8>;
757 non-removable;
758 };
759
760 clocks {
761 compatible = "simple-bus";
762 #address-cells = <1>;
763 #size-cells = <0>;
764
765 clk32k_in: clock@0 {
766 compatible = "fixed-clock";
767 reg=<0>;
768 #clock-cells = <0>;
769 clock-frequency = <32768>;
770 };
771 };
772
773 gpio-keys {
774 compatible = "gpio-keys";
775
776 power {
777 label = "Power";
778 gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
6bccbd5e 779 linux,code = <KEY_POWER>;
57899053
SW
780 gpio-key,wakeup;
781 };
782
783 lid {
784 label = "Lid";
785 gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
786 linux,input-type = <5>; /* EV_SW */
787 linux,code = <0>; /* SW_LID */
788 debounce-interval = <1>;
789 gpio-key,wakeup;
790 };
791 };
792
6529e638
SW
793 regulators {
794 compatible = "simple-bus";
795 #address-cells = <1>;
796 #size-cells = <0>;
797
798 vdd_5v0_reg: regulator@0 {
799 compatible = "regulator-fixed";
800 reg = <0>;
801 regulator-name = "vdd_5v0";
802 regulator-min-microvolt = <5000000>;
803 regulator-max-microvolt = <5000000>;
804 regulator-always-on;
805 };
806
807 regulator@1 {
808 compatible = "regulator-fixed";
809 reg = <1>;
810 regulator-name = "vdd_1v5";
811 regulator-min-microvolt = <1500000>;
812 regulator-max-microvolt = <1500000>;
3325f1bc 813 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
6529e638
SW
814 };
815
816 regulator@2 {
817 compatible = "regulator-fixed";
818 reg = <2>;
819 regulator-name = "vdd_1v2";
820 regulator-min-microvolt = <1200000>;
821 regulator-max-microvolt = <1200000>;
3325f1bc 822 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
6529e638
SW
823 enable-active-high;
824 };
4c94c8b5
VB
825
826 vbus_reg: regulator@3 {
827 compatible = "regulator-fixed";
828 reg = <3>;
829 regulator-name = "vdd_vbus_wup1";
830 regulator-min-microvolt = <5000000>;
831 regulator-max-microvolt = <5000000>;
9f310ded 832 enable-active-high;
23f95ef2 833 gpio = <&gpio TEGRA_GPIO(D, 0) 0>;
30ca2226
SW
834 regulator-always-on;
835 regulator-boot-on;
4c94c8b5 836 };
6529e638
SW
837 };
838
c04abb3a
SW
839 sound {
840 compatible = "nvidia,tegra-audio-wm8903-seaboard",
841 "nvidia,tegra-audio-wm8903";
842 nvidia,model = "NVIDIA Tegra Seaboard";
d8017a97 843
c04abb3a
SW
844 nvidia,audio-routing =
845 "Headphone Jack", "HPOUTR",
846 "Headphone Jack", "HPOUTL",
847 "Int Spk", "ROP",
848 "Int Spk", "RON",
849 "Int Spk", "LOP",
850 "Int Spk", "LON",
851 "Mic Jack", "MICBIAS",
852 "IN1R", "Mic Jack";
aa607ebf 853
c04abb3a
SW
854 nvidia,i2s-controller = <&tegra_i2s1>;
855 nvidia,audio-codec = <&wm8903>;
856
3325f1bc
SW
857 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
858 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
f9cd2b3b 859
885a8cfa
HD
860 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
861 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
862 <&tegra_car TEGRA20_CLK_CDEV1>;
f9cd2b3b 863 clock-names = "pll_a", "pll_a_out0", "mclk";
aa607ebf 864 };
8e267f3d 865};
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