ARM: tegra: convert device tree files to use key defines
[deliverable/linux.git] / arch / arm / boot / dts / tegra20-trimslice.dts
CommitLineData
a7db2c15
SW
1/dts-v1/;
2
6bccbd5e 3#include <dt-bindings/input/input.h>
1bd0bd49 4#include "tegra20.dtsi"
a7db2c15
SW
5
6/ {
7 model = "Compulab TrimSlice board";
8 compatible = "compulab,trimslice", "nvidia,tegra20";
9
f9eb26a4 10 memory {
95decf84 11 reg = <0x00000000 0x40000000>;
a7db2c15
SW
12 };
13
58ecb23f
SW
14 host1x@50000000 {
15 hdmi@54280000 {
dced3e3e
TR
16 status = "okay";
17
18 vdd-supply = <&hdmi_vdd_reg>;
19 pll-supply = <&hdmi_pll_reg>;
20
21 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
3325f1bc
SW
22 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
23 GPIO_ACTIVE_HIGH>;
dced3e3e
TR
24 };
25 };
26
58ecb23f 27 pinmux@70000014 {
ecc295bb
SW
28 pinctrl-names = "default";
29 pinctrl-0 = <&state_default>;
30
31 state_default: pinmux {
32 ata {
33 nvidia,pins = "ata";
34 nvidia,function = "ide";
35 };
36 atb {
37 nvidia,pins = "atb", "gma";
38 nvidia,function = "sdio4";
39 };
40 atc {
41 nvidia,pins = "atc", "gmb";
42 nvidia,function = "nand";
43 };
44 atd {
45 nvidia,pins = "atd", "ate", "gme", "pta";
46 nvidia,function = "gmi";
47 };
48 cdev1 {
49 nvidia,pins = "cdev1";
50 nvidia,function = "plla_out";
51 };
52 cdev2 {
53 nvidia,pins = "cdev2";
54 nvidia,function = "pllp_out4";
55 };
56 crtp {
57 nvidia,pins = "crtp";
58 nvidia,function = "crt";
59 };
60 csus {
61 nvidia,pins = "csus";
62 nvidia,function = "vi_sensor_clk";
63 };
64 dap1 {
65 nvidia,pins = "dap1";
66 nvidia,function = "dap1";
67 };
68 dap2 {
69 nvidia,pins = "dap2";
70 nvidia,function = "dap2";
71 };
72 dap3 {
73 nvidia,pins = "dap3";
74 nvidia,function = "dap3";
75 };
76 dap4 {
77 nvidia,pins = "dap4";
78 nvidia,function = "dap4";
79 };
80 ddc {
81 nvidia,pins = "ddc";
82 nvidia,function = "i2c2";
83 };
84 dta {
85 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
86 nvidia,function = "vi";
87 };
88 dtf {
89 nvidia,pins = "dtf";
90 nvidia,function = "i2c3";
91 };
92 gmc {
93 nvidia,pins = "gmc", "gmd";
94 nvidia,function = "sflash";
95 };
96 gpu {
97 nvidia,pins = "gpu";
98 nvidia,function = "uarta";
99 };
100 gpu7 {
101 nvidia,pins = "gpu7";
102 nvidia,function = "rtck";
103 };
104 gpv {
105 nvidia,pins = "gpv", "slxa", "slxk";
106 nvidia,function = "pcie";
107 };
108 hdint {
109 nvidia,pins = "hdint";
110 nvidia,function = "hdmi";
111 };
112 i2cp {
113 nvidia,pins = "i2cp";
114 nvidia,function = "i2cp";
115 };
116 irrx {
117 nvidia,pins = "irrx", "irtx";
118 nvidia,function = "uartb";
119 };
120 kbca {
121 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
122 "kbce", "kbcf";
123 nvidia,function = "kbc";
124 };
125 lcsn {
126 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
127 "ld3", "ld4", "ld5", "ld6", "ld7",
128 "ld8", "ld9", "ld10", "ld11", "ld12",
129 "ld13", "ld14", "ld15", "ld16", "ld17",
130 "ldc", "ldi", "lhp0", "lhp1", "lhp2",
131 "lhs", "lm0", "lm1", "lpp", "lpw0",
132 "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
133 "lsda", "lsdi", "lspi", "lvp0", "lvp1",
134 "lvs";
135 nvidia,function = "displaya";
136 };
137 owc {
138 nvidia,pins = "owc", "uac";
139 nvidia,function = "rsvd2";
140 };
141 pmc {
142 nvidia,pins = "pmc";
143 nvidia,function = "pwr_on";
144 };
145 rm {
146 nvidia,pins = "rm";
147 nvidia,function = "i2c1";
148 };
149 sdb {
150 nvidia,pins = "sdb", "sdc", "sdd";
151 nvidia,function = "pwm";
152 };
153 sdio1 {
154 nvidia,pins = "sdio1";
155 nvidia,function = "sdio1";
156 };
157 slxc {
158 nvidia,pins = "slxc", "slxd";
159 nvidia,function = "sdio3";
160 };
161 spdi {
162 nvidia,pins = "spdi", "spdo";
163 nvidia,function = "spdif";
164 };
165 spia {
166 nvidia,pins = "spia", "spib", "spic";
167 nvidia,function = "spi2";
168 };
169 spid {
170 nvidia,pins = "spid", "spie", "spif";
171 nvidia,function = "spi1";
172 };
173 spig {
174 nvidia,pins = "spig", "spih";
175 nvidia,function = "spi2_alt";
176 };
177 uaa {
178 nvidia,pins = "uaa", "uab", "uda";
179 nvidia,function = "ulpi";
180 };
181 uad {
182 nvidia,pins = "uad";
183 nvidia,function = "irda";
184 };
185 uca {
186 nvidia,pins = "uca", "ucb";
187 nvidia,function = "uartc";
188 };
189 conf_ata {
190 nvidia,pins = "ata", "atc", "atd", "ate",
191 "crtp", "dap2", "dap3", "dap4", "dta",
192 "dtb", "dtc", "dtd", "dte", "gmb",
193 "gme", "i2cp", "pta", "slxc", "slxd",
194 "spdi", "spdo", "uda";
195 nvidia,pull = <0>;
196 nvidia,tristate = <1>;
197 };
198 conf_atb {
563da21b
SW
199 nvidia,pins = "atb", "cdev1", "cdev2", "dap1",
200 "gma", "gmc", "gmd", "gpu", "gpu7",
201 "gpv", "sdio1", "slxa", "slxk", "uac";
ecc295bb
SW
202 nvidia,pull = <0>;
203 nvidia,tristate = <0>;
204 };
ecc295bb
SW
205 conf_ck32 {
206 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
207 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
208 nvidia,pull = <0>;
209 };
563da21b
SW
210 conf_csus {
211 nvidia,pins = "csus", "spia", "spib",
212 "spid", "spif";
213 nvidia,pull = <1>;
214 nvidia,tristate = <1>;
215 };
ecc295bb
SW
216 conf_ddc {
217 nvidia,pins = "ddc", "dtf", "rm", "sdc", "sdd";
218 nvidia,pull = <2>;
219 nvidia,tristate = <0>;
220 };
221 conf_hdint {
222 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
223 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
224 "lvp0", "pmc";
225 nvidia,tristate = <1>;
226 };
227 conf_irrx {
228 nvidia,pins = "irrx", "irtx", "kbca", "kbcb",
229 "kbcc", "kbcd", "kbce", "kbcf", "owc",
230 "spic", "spie", "spig", "spih", "uaa",
231 "uab", "uad", "uca", "ucb";
232 nvidia,pull = <2>;
233 nvidia,tristate = <1>;
234 };
235 conf_lc {
236 nvidia,pins = "lc", "ls";
237 nvidia,pull = <2>;
238 };
239 conf_ld0 {
240 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
241 "ld5", "ld6", "ld7", "ld8", "ld9",
242 "ld10", "ld11", "ld12", "ld13", "ld14",
243 "ld15", "ld16", "ld17", "ldi", "lhp0",
244 "lhp1", "lhp2", "lhs", "lm0", "lpp",
245 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
246 "lvs", "sdb";
247 nvidia,tristate = <0>;
248 };
249 conf_ld17_0 {
250 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
251 "ld23_22";
252 nvidia,pull = <1>;
253 };
bff1ea70
SW
254 conf_spif {
255 nvidia,pins = "spif";
256 nvidia,pull = <1>;
257 nvidia,tristate = <0>;
258 };
ecc295bb
SW
259 };
260 };
261
2a5fdc9a
SW
262 i2s@70002800 {
263 status = "okay";
c04abb3a
SW
264 };
265
266 serial@70006000 {
2a5fdc9a 267 status = "okay";
c04abb3a
SW
268 };
269
dced3e3e 270 dvi_ddc: i2c@7000c000 {
2a5fdc9a 271 status = "okay";
dced3e3e 272 clock-frequency = <100000>;
a7db2c15
SW
273 };
274
fea221e2
SW
275 spi@7000c380 {
276 status = "okay";
277 spi-max-frequency = <48000000>;
278 spi-flash@0 {
279 compatible = "winbond,w25q80bl";
280 reg = <0>;
281 spi-max-frequency = <48000000>;
282 };
283 };
284
dced3e3e 285 hdmi_ddc: i2c@7000c400 {
2a5fdc9a 286 status = "okay";
dced3e3e 287 clock-frequency = <100000>;
a7db2c15
SW
288 };
289
290 i2c@7000c500 {
2a5fdc9a 291 status = "okay";
a7db2c15 292 clock-frequency = <400000>;
a7db2c15 293
22bfe102
SW
294 codec: codec@1a {
295 compatible = "ti,tlv320aic23";
296 reg = <0x1a>;
297 };
298
081cc0a5
SW
299 rtc@56 {
300 compatible = "emmicro,em3027";
301 reg = <0x56>;
302 };
88950f3b
SW
303 };
304
58ecb23f 305 pmc@7000e400 {
47d2d63b 306 nvidia,suspend-mode = <1>;
a44a019d
JL
307 nvidia,cpu-pwr-good-time = <5000>;
308 nvidia,cpu-pwr-off-time = <5000>;
309 nvidia,core-pwr-good-time = <3845 3845>;
310 nvidia,core-pwr-off-time = <3875>;
311 nvidia,sys-clock-req-active-high;
312 };
313
58ecb23f 314 pcie-controller@80003000 {
1798efda
TR
315 status = "okay";
316 pex-clk-supply = <&pci_clk_reg>;
317 vdd-supply = <&pci_vdd_reg>;
318
319 pci@1,0 {
320 status = "okay";
321 };
322 };
323
2a5fdc9a
SW
324 usb@c5000000 {
325 status = "okay";
797acf70
SW
326 };
327
4c94c8b5
VB
328 usb-phy@c5000000 {
329 status = "okay";
330 vbus-supply = <&vbus_reg>;
331 };
332
c04abb3a 333 usb@c5004000 {
a6a3dd1a 334 status = "okay";
3325f1bc
SW
335 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
336 GPIO_ACTIVE_LOW>;
31c1ec92
SW
337 };
338
9dffe3be 339 usb-phy@c5004000 {
4c94c8b5 340 status = "okay";
3325f1bc
SW
341 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
342 GPIO_ACTIVE_LOW>;
1292c129
SW
343 };
344
9dffe3be
VB
345 usb@c5008000 {
346 status = "okay";
40e8b3a6
VB
347 };
348
4c94c8b5
VB
349 usb-phy@c5008000 {
350 status = "okay";
351 };
352
2a5fdc9a
SW
353 sdhci@c8000000 {
354 status = "okay";
deb88cc3 355 bus-width = <4>;
1292c129
SW
356 };
357
a7db2c15 358 sdhci@c8000600 {
2a5fdc9a 359 status = "okay";
3325f1bc
SW
360 cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>;
361 wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
deb88cc3 362 bus-width = <4>;
a7db2c15 363 };
aa607ebf 364
7021d122
JL
365 clocks {
366 compatible = "simple-bus";
367 #address-cells = <1>;
368 #size-cells = <0>;
369
58ecb23f 370 clk32k_in: clock@0 {
7021d122
JL
371 compatible = "fixed-clock";
372 reg=<0>;
373 #clock-cells = <0>;
374 clock-frequency = <32768>;
375 };
376 };
377
5741a256
JL
378 gpio-keys {
379 compatible = "gpio-keys";
380
381 power {
382 label = "Power";
3325f1bc 383 gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>;
6bccbd5e 384 linux,code = <KEY_POWER>;
5741a256
JL
385 gpio-key,wakeup;
386 };
387 };
388
bff1ea70
SW
389 poweroff {
390 compatible = "gpio-poweroff";
3325f1bc 391 gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
bff1ea70
SW
392 };
393
dced3e3e
TR
394 regulators {
395 compatible = "simple-bus";
396 #address-cells = <1>;
397 #size-cells = <0>;
398
399 hdmi_vdd_reg: regulator@0 {
400 compatible = "regulator-fixed";
401 reg = <0>;
402 regulator-name = "avdd_hdmi";
403 regulator-min-microvolt = <3300000>;
404 regulator-max-microvolt = <3300000>;
405 regulator-always-on;
406 };
407
408 hdmi_pll_reg: regulator@1 {
409 compatible = "regulator-fixed";
410 reg = <1>;
411 regulator-name = "avdd_hdmi_pll";
412 regulator-min-microvolt = <1800000>;
413 regulator-max-microvolt = <1800000>;
414 regulator-always-on;
415 };
4c94c8b5
VB
416
417 vbus_reg: regulator@2 {
418 compatible = "regulator-fixed";
419 reg = <2>;
420 regulator-name = "usb1_vbus";
421 regulator-min-microvolt = <5000000>;
422 regulator-max-microvolt = <5000000>;
9f310ded 423 enable-active-high;
23f95ef2 424 gpio = <&gpio TEGRA_GPIO(V, 2) 0>;
30ca2226
SW
425 regulator-always-on;
426 regulator-boot-on;
4c94c8b5 427 };
1798efda
TR
428
429 pci_clk_reg: regulator@3 {
430 compatible = "regulator-fixed";
431 reg = <3>;
432 regulator-name = "pci_clk";
433 regulator-min-microvolt = <3300000>;
434 regulator-max-microvolt = <3300000>;
435 regulator-always-on;
436 };
437
438 pci_vdd_reg: regulator@4 {
439 compatible = "regulator-fixed";
440 reg = <4>;
441 regulator-name = "pci_vdd";
442 regulator-min-microvolt = <1050000>;
443 regulator-max-microvolt = <1050000>;
444 regulator-always-on;
445 };
dced3e3e
TR
446 };
447
c04abb3a
SW
448 sound {
449 compatible = "nvidia,tegra-audio-trimslice";
450 nvidia,i2s-controller = <&tegra_i2s1>;
451 nvidia,audio-codec = <&codec>;
f9cd2b3b 452
885a8cfa
HD
453 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
454 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
455 <&tegra_car TEGRA20_CLK_CDEV1>;
f9cd2b3b 456 clock-names = "pll_a", "pll_a_out0", "mclk";
aa607ebf 457 };
a7db2c15 458};
This page took 0.121171 seconds and 5 git commands to generate.