[deliverable/linux.git] / arch / arm / boot / dts / tegra20-ventana.dts

/dts-v1/;

#include <dt-bindings/input/input.h>
#include "tegra20.dtsi"

/ {
	model = "NVIDIA Tegra20 Ventana evaluation board";
	compatible = "nvidia,ventana", "nvidia,tegra20";

	aliases {
		rtc0 = "/i2c@7000d000/tps6586x@34";
		rtc1 = "/rtc@7000e000";
		serial0 = &uartd;
	};

	memory {
		reg = <0x00000000 0x40000000>;
	};

	host1x@50000000 {
		dc@54200000 {
			rgb {
				status = "okay";

				nvidia,panel = <&panel>;
			};
		};

		hdmi@54280000 {
			status = "okay";

			vdd-supply = <&hdmi_vdd_reg>;
			pll-supply = <&hdmi_pll_reg>;

			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
				GPIO_ACTIVE_HIGH>;
		};
	};

	pinmux@70000014 {
		pinctrl-names = "default";
		pinctrl-0 = <&state_default>;

		state_default: pinmux {
			ata {
				nvidia,pins = "ata";
				nvidia,function = "ide";
			};
			atb {
				nvidia,pins = "atb", "gma", "gme";
				nvidia,function = "sdio4";
			};
			atc {
				nvidia,pins = "atc";
				nvidia,function = "nand";
			};
			atd {
				nvidia,pins = "atd", "ate", "gmb", "spia",
					"spib", "spic";
				nvidia,function = "gmi";
			};
			cdev1 {
				nvidia,pins = "cdev1";
				nvidia,function = "plla_out";
			};
			cdev2 {
				nvidia,pins = "cdev2";
				nvidia,function = "pllp_out4";
			};
			crtp {
				nvidia,pins = "crtp", "lm1";
				nvidia,function = "crt";
			};
			csus {
				nvidia,pins = "csus";
				nvidia,function = "vi_sensor_clk";
			};
			dap1 {
				nvidia,pins = "dap1";
				nvidia,function = "dap1";
			};
			dap2 {
				nvidia,pins = "dap2";
				nvidia,function = "dap2";
			};
			dap3 {
				nvidia,pins = "dap3";
				nvidia,function = "dap3";
			};
			dap4 {
				nvidia,pins = "dap4";
				nvidia,function = "dap4";
			};
			dta {
				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
				nvidia,function = "vi";
			};
			dtf {
				nvidia,pins = "dtf";
				nvidia,function = "i2c3";
			};
			gmc {
				nvidia,pins = "gmc";
				nvidia,function = "uartd";
			};
			gmd {
				nvidia,pins = "gmd";
				nvidia,function = "sflash";
			};
			gpu {
				nvidia,pins = "gpu";
				nvidia,function = "pwm";
			};
			gpu7 {
				nvidia,pins = "gpu7";
				nvidia,function = "rtck";
			};
			gpv {
				nvidia,pins = "gpv", "slxa", "slxk";
				nvidia,function = "pcie";
			};
			hdint {
				nvidia,pins = "hdint";
				nvidia,function = "hdmi";
			};
			i2cp {
				nvidia,pins = "i2cp";
				nvidia,function = "i2cp";
			};
			irrx {
				nvidia,pins = "irrx", "irtx";
				nvidia,function = "uartb";
			};
			kbca {
				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
					"kbce", "kbcf";
				nvidia,function = "kbc";
			};
			lcsn {
				nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
					"lsdi", "lvp0";
				nvidia,function = "rsvd4";
			};
			ld0 {
				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
					"ld5", "ld6", "ld7", "ld8", "ld9",
					"ld10", "ld11", "ld12", "ld13", "ld14",
					"ld15", "ld16", "ld17", "ldi", "lhp0",
					"lhp1", "lhp2", "lhs", "lpp", "lpw0",
					"lpw2", "lsc0", "lsc1", "lsck", "lsda",
					"lspi", "lvp1", "lvs";
				nvidia,function = "displaya";
			};
			owc {
				nvidia,pins = "owc", "spdi", "spdo", "uac";
				nvidia,function = "rsvd2";
			};
			pmc {
				nvidia,pins = "pmc";
				nvidia,function = "pwr_on";
			};
			rm {
				nvidia,pins = "rm";
				nvidia,function = "i2c1";
			};
			sdb {
				nvidia,pins = "sdb", "sdc", "sdd", "slxc";
				nvidia,function = "sdio3";
			};
			sdio1 {
				nvidia,pins = "sdio1";
				nvidia,function = "sdio1";
			};
			slxd {
				nvidia,pins = "slxd";
				nvidia,function = "spdif";
			};
			spid {
				nvidia,pins = "spid", "spie", "spif";
				nvidia,function = "spi1";
			};
			spig {
				nvidia,pins = "spig", "spih";
				nvidia,function = "spi2_alt";
			};
			uaa {
				nvidia,pins = "uaa", "uab", "uda";
				nvidia,function = "ulpi";
			};
			uad {
				nvidia,pins = "uad";
				nvidia,function = "irda";
			};
			uca {
				nvidia,pins = "uca", "ucb";
				nvidia,function = "uartc";
			};
			conf_ata {
				nvidia,pins = "ata", "atb", "atc", "atd",
					"cdev1", "cdev2", "dap1", "dap2",
					"dap4", "ddc", "dtf", "gma", "gmc",
					"gme", "gpu", "gpu7", "i2cp", "irrx",
					"irtx", "pta", "rm", "sdc", "sdd",
					"slxc", "slxd", "slxk", "spdi", "spdo",
					"uac", "uad", "uca", "ucb", "uda";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			conf_ate {
				nvidia,pins = "ate", "csus", "dap3", "gmd",
					"gpv", "owc", "spia", "spib", "spic",
					"spid", "spie", "spig";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_ck32 {
				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			};
			conf_crtp {
				nvidia,pins = "crtp", "gmb", "slxa", "spih";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_dta {
				nvidia,pins = "dta", "dtb", "dtc", "dtd";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			conf_dte {
				nvidia,pins = "dte", "spif";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_hdint {
				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
					"lpw1", "lsck", "lsda", "lsdi", "lvp0";
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_kbca {
				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
					"kbce", "kbcf", "sdio1", "uaa", "uab";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			conf_lc {
				nvidia,pins = "lc", "ls";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
			};
			conf_ld0 {
				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
					"ld5", "ld6", "ld7", "ld8", "ld9",
					"ld10", "ld11", "ld12", "ld13", "ld14",
					"ld15", "ld16", "ld17", "ldi", "lhp0",
					"lhp1", "lhp2", "lhs", "lm0", "lpp",
					"lpw0", "lpw2", "lsc0", "lsc1", "lspi",
					"lvp1", "lvs", "pmc", "sdb";
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			conf_ld17_0 {
				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
					"ld23_22";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
			};
			drive_sdio1 {
				nvidia,pins = "drive_sdio1";
				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
				nvidia,schmitt = <TEGRA_PIN_ENABLE>;
				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
				nvidia,pull-down-strength = <31>;
				nvidia,pull-up-strength = <31>;
				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
			};
		};

		state_i2cmux_ddc: pinmux_i2cmux_ddc {
			ddc {
				nvidia,pins = "ddc";
				nvidia,function = "i2c2";
			};
			pta {
				nvidia,pins = "pta";
				nvidia,function = "rsvd4";
			};
		};

		state_i2cmux_pta: pinmux_i2cmux_pta {
			ddc {
				nvidia,pins = "ddc";
				nvidia,function = "rsvd4";
			};
			pta {
				nvidia,pins = "pta";
				nvidia,function = "i2c2";
			};
		};

		state_i2cmux_idle: pinmux_i2cmux_idle {
			ddc {
				nvidia,pins = "ddc";
				nvidia,function = "rsvd4";
			};
			pta {
				nvidia,pins = "pta";
				nvidia,function = "rsvd4";
			};
		};
	};

	i2s@70002800 {
		status = "okay";
	};

	serial@70006300 {
		status = "okay";
	};

	pwm: pwm@7000a000 {
		status = "okay";
	};

	i2c@7000c000 {
		status = "okay";
		clock-frequency = <400000>;

		wm8903: wm8903@1a {
			compatible = "wlf,wm8903";
			reg = <0x1a>;
			interrupt-parent = <&gpio>;
			interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;

			gpio-controller;
			#gpio-cells = <2>;

			micdet-cfg = <0>;
			micdet-delay = <100>;
			gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
		};

		/* ALS and proximity sensor */
		isl29018@44 {
			compatible = "isil,isl29018";
			reg = <0x44>;
			interrupt-parent = <&gpio>;
			interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
		};
	};

	i2c@7000c400 {
		status = "okay";
		clock-frequency = <100000>;
	};

	i2cmux {
		compatible = "i2c-mux-pinctrl";
		#address-cells = <1>;
		#size-cells = <0>;

		i2c-parent = <&{/i2c@7000c400}>;

		pinctrl-names = "ddc", "pta", "idle";
		pinctrl-0 = <&state_i2cmux_ddc>;
		pinctrl-1 = <&state_i2cmux_pta>;
		pinctrl-2 = <&state_i2cmux_idle>;

		hdmi_ddc: i2c@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		lvds_ddc: i2c@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
		};
	};

	i2c@7000c500 {
		status = "okay";
		clock-frequency = <400000>;
	};

	i2c@7000d000 {
		status = "okay";
		clock-frequency = <400000>;

		pmic: tps6586x@34 {
			compatible = "ti,tps6586x";
			reg = <0x34>;
			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;

			ti,system-power-controller;

			#gpio-cells = <2>;
			gpio-controller;

			sys-supply = <&vdd_5v0_reg>;
			vin-sm0-supply = <&sys_reg>;
			vin-sm1-supply = <&sys_reg>;
			vin-sm2-supply = <&sys_reg>;
			vinldo01-supply = <&sm2_reg>;
			vinldo23-supply = <&sm2_reg>;
			vinldo4-supply = <&sm2_reg>;
			vinldo678-supply = <&sm2_reg>;
			vinldo9-supply = <&sm2_reg>;

			regulators {
				sys_reg: sys {
					regulator-name = "vdd_sys";
					regulator-always-on;
				};

				sm0 {
					regulator-name = "vdd_sm0,vdd_core";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
					regulator-always-on;
				};

				sm1 {
					regulator-name = "vdd_sm1,vdd_cpu";
					regulator-min-microvolt = <1000000>;
					regulator-max-microvolt = <1000000>;
					regulator-always-on;
				};

				sm2_reg: sm2 {
					regulator-name = "vdd_sm2,vin_ldo*";
					regulator-min-microvolt = <3700000>;
					regulator-max-microvolt = <3700000>;
					regulator-always-on;
				};

				/* LDO0 is not connected to anything */

				ldo1 {
					regulator-name = "vdd_ldo1,avdd_pll*";
					regulator-min-microvolt = <1100000>;
					regulator-max-microvolt = <1100000>;
					regulator-always-on;
				};

				ldo2 {
					regulator-name = "vdd_ldo2,vdd_rtc";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
				};

				ldo3 {
					regulator-name = "vdd_ldo3,avdd_usb*";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					regulator-always-on;
				};

				ldo4 {
					regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
				};

				ldo5 {
					regulator-name = "vdd_ldo5,vcore_mmc";
					regulator-min-microvolt = <2850000>;
					regulator-max-microvolt = <2850000>;
					regulator-always-on;
				};

				ldo6 {
					regulator-name = "vdd_ldo6,avdd_vdac";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};

				hdmi_vdd_reg: ldo7 {
					regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
				};

				hdmi_pll_reg: ldo8 {
					regulator-name = "vdd_ldo8,avdd_hdmi_pll";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};

				ldo9 {
					regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
					regulator-min-microvolt = <2850000>;
					regulator-max-microvolt = <2850000>;
					regulator-always-on;
				};

				ldo_rtc {
					regulator-name = "vdd_rtc_out,vdd_cell";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					regulator-always-on;
				};
			};
		};

		temperature-sensor@4c {
			compatible = "onnn,nct1008";
			reg = <0x4c>;
		};
	};

	pmc@7000e400 {
		nvidia,invert-interrupt;
		nvidia,suspend-mode = <1>;
		nvidia,cpu-pwr-good-time = <2000>;
		nvidia,cpu-pwr-off-time = <100>;
		nvidia,core-pwr-good-time = <3845 3845>;
		nvidia,core-pwr-off-time = <458>;
		nvidia,sys-clock-req-active-high;
	};

	usb@c5000000 {
		status = "okay";
	};

	usb-phy@c5000000 {
		status = "okay";
	};

	usb@c5004000 {
		status = "okay";
		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
			GPIO_ACTIVE_LOW>;
	};

	usb-phy@c5004000 {
		status = "okay";
		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
			GPIO_ACTIVE_LOW>;
	};

	usb@c5008000 {
		status = "okay";
	};

	usb-phy@c5008000 {
		status = "okay";
	};

	sdhci@c8000000 {
		status = "okay";
		power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
		bus-width = <4>;
		keep-power-in-suspend;
	};

	sdhci@c8000400 {
		status = "okay";
		cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
		wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
		power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
		bus-width = <4>;
	};

	sdhci@c8000600 {
		status = "okay";
		bus-width = <8>;
		non-removable;
	};

	backlight: backlight {
		compatible = "pwm-backlight";

		enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
		power-supply = <&vdd_bl_reg>;
		pwms = <&pwm 2 5000000>;

		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <6>;
	};

	clocks {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		clk32k_in: clock@0 {
			compatible = "fixed-clock";
			reg=<0>;
			#clock-cells = <0>;
			clock-frequency = <32768>;
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		power {
			label = "Power";
			gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
			linux,code = <KEY_POWER>;
			gpio-key,wakeup;
		};
	};

	panel: panel {
		compatible = "chunghwa,claa101wa01a", "simple-panel";

		power-supply = <&vdd_pnl_reg>;
		enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;

		backlight = <&backlight>;
		ddc-i2c-bus = <&lvds_ddc>;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		vdd_5v0_reg: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "vdd_5v0";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			regulator-always-on;
		};

		regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "vdd_1v5";
			regulator-min-microvolt = <1500000>;
			regulator-max-microvolt = <1500000>;
			gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
		};

		regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "vdd_1v2";
			regulator-min-microvolt = <1200000>;
			regulator-max-microvolt = <1200000>;
			gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};

		vdd_pnl_reg: regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			regulator-name = "vdd_pnl";
			regulator-min-microvolt = <2800000>;
			regulator-max-microvolt = <2800000>;
			gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};

		vdd_bl_reg: regulator@4 {
			compatible = "regulator-fixed";
			reg = <4>;
			regulator-name = "vdd_bl";
			regulator-min-microvolt = <2800000>;
			regulator-max-microvolt = <2800000>;
			gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};
	};

	sound {
		compatible = "nvidia,tegra-audio-wm8903-ventana",
			     "nvidia,tegra-audio-wm8903";
		nvidia,model = "NVIDIA Tegra Ventana";

		nvidia,audio-routing =
			"Headphone Jack", "HPOUTR",
			"Headphone Jack", "HPOUTL",
			"Int Spk", "ROP",
			"Int Spk", "RON",
			"Int Spk", "LOP",
			"Int Spk", "LON",
			"Mic Jack", "MICBIAS",
			"IN1L", "Mic Jack";

		nvidia,i2s-controller = <&tegra_i2s1>;
		nvidia,audio-codec = <&wm8903>;

		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
		nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
			GPIO_ACTIVE_HIGH>;
		nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
			GPIO_ACTIVE_HIGH>;

		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
			 <&tegra_car TEGRA20_CLK_CDEV1>;
		clock-names = "pll_a", "pll_a_out0", "mclk";
	};
};
Commit	Line	Data
add29e61 PDS	1	/dts-v1/;
add29e61 PDS	2
6bccbd5e	3	#include <dt-bindings/input/input.h>
1bd0bd49	4	#include "tegra20.dtsi"
add29e61 PDS	5
add29e61 PDS	6	/ {
8fef5dff	7	model = "NVIDIA Tegra20 Ventana evaluation board";
add29e61 PDS	8	compatible = "nvidia,ventana", "nvidia,tegra20";
add29e61 PDS	9
553c0a20 SW	10	aliases {
	11	rtc0 = "/i2c@7000d000/tps6586x@34";
	12	rtc1 = "/rtc@7000e000";
c4574aa0	13	serial0 = &uartd;
553c0a20 SW	14	};
553c0a20 SW	15
add29e61	16	memory {
95decf84	17	reg = <0x00000000 0x40000000>;
add29e61 PDS	18	};
add29e61 PDS	19
58ecb23f	20	host1x@50000000 {
1771a254 SW	21	dc@54200000 {
	22	rgb {
	23	status = "okay";
	24
	25	nvidia,panel = <&panel>;
	26	};
	27	};
	28
58ecb23f	29	hdmi@54280000 {
97d5520f SW	30	status = "okay";
	31
	32	vdd-supply = <&hdmi_vdd_reg>;
	33	pll-supply = <&hdmi_pll_reg>;
	34
	35	nvidia,ddc-i2c-bus = <&hdmi_ddc>;
3325f1bc SW	36	nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
3325f1bc SW	37	GPIO_ACTIVE_HIGH>;
97d5520f SW	38	};
	39	};
	40
58ecb23f	41	pinmux@70000014 {
ecc295bb SW	42	pinctrl-names = "default";
	43	pinctrl-0 = <&state_default>;
	44
	45	state_default: pinmux {
	46	ata {
	47	nvidia,pins = "ata";
	48	nvidia,function = "ide";
	49	};
	50	atb {
	51	nvidia,pins = "atb", "gma", "gme";
	52	nvidia,function = "sdio4";
	53	};
	54	atc {
	55	nvidia,pins = "atc";
	56	nvidia,function = "nand";
	57	};
	58	atd {
	59	nvidia,pins = "atd", "ate", "gmb", "spia",
	60	"spib", "spic";
	61	nvidia,function = "gmi";
	62	};
	63	cdev1 {
	64	nvidia,pins = "cdev1";
	65	nvidia,function = "plla_out";
	66	};
	67	cdev2 {
	68	nvidia,pins = "cdev2";
	69	nvidia,function = "pllp_out4";
	70	};
	71	crtp {
	72	nvidia,pins = "crtp", "lm1";
	73	nvidia,function = "crt";
	74	};
	75	csus {
	76	nvidia,pins = "csus";
	77	nvidia,function = "vi_sensor_clk";
	78	};
	79	dap1 {
	80	nvidia,pins = "dap1";
	81	nvidia,function = "dap1";
	82	};
	83	dap2 {
	84	nvidia,pins = "dap2";
	85	nvidia,function = "dap2";
	86	};
	87	dap3 {
	88	nvidia,pins = "dap3";
	89	nvidia,function = "dap3";
	90	};
	91	dap4 {
	92	nvidia,pins = "dap4";
	93	nvidia,function = "dap4";
	94	};
ecc295bb SW	95	dta {
	96	nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
	97	nvidia,function = "vi";
	98	};
	99	dtf {
	100	nvidia,pins = "dtf";
	101	nvidia,function = "i2c3";
	102	};
	103	gmc {
	104	nvidia,pins = "gmc";
	105	nvidia,function = "uartd";
	106	};
	107	gmd {
	108	nvidia,pins = "gmd";
	109	nvidia,function = "sflash";
	110	};
	111	gpu {
	112	nvidia,pins = "gpu";
	113	nvidia,function = "pwm";
	114	};
	115	gpu7 {
	116	nvidia,pins = "gpu7";
	117	nvidia,function = "rtck";
	118	};
	119	gpv {
	120	nvidia,pins = "gpv", "slxa", "slxk";
	121	nvidia,function = "pcie";
	122	};
	123	hdint {
cf633464	124	nvidia,pins = "hdint";
ecc295bb SW	125	nvidia,function = "hdmi";
	126	};
	127	i2cp {
	128	nvidia,pins = "i2cp";
	129	nvidia,function = "i2cp";
	130	};
	131	irrx {
	132	nvidia,pins = "irrx", "irtx";
	133	nvidia,function = "uartb";
	134	};
	135	kbca {
	136	nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
	137	"kbce", "kbcf";
	138	nvidia,function = "kbc";
	139	};
	140	lcsn {
	141	nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
	142	"lsdi", "lvp0";
	143	nvidia,function = "rsvd4";
	144	};
	145	ld0 {
	146	nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
	147	"ld5", "ld6", "ld7", "ld8", "ld9",
	148	"ld10", "ld11", "ld12", "ld13", "ld14",
	149	"ld15", "ld16", "ld17", "ldi", "lhp0",
	150	"lhp1", "lhp2", "lhs", "lpp", "lpw0",
	151	"lpw2", "lsc0", "lsc1", "lsck", "lsda",
	152	"lspi", "lvp1", "lvs";
	153	nvidia,function = "displaya";
	154	};
cf633464 MZ	155	owc {
	156	nvidia,pins = "owc", "spdi", "spdo", "uac";
	157	nvidia,function = "rsvd2";
	158	};
ecc295bb SW	159	pmc {
	160	nvidia,pins = "pmc";
	161	nvidia,function = "pwr_on";
	162	};
	163	rm {
	164	nvidia,pins = "rm";
	165	nvidia,function = "i2c1";
	166	};
	167	sdb {
	168	nvidia,pins = "sdb", "sdc", "sdd", "slxc";
	169	nvidia,function = "sdio3";
	170	};
	171	sdio1 {
	172	nvidia,pins = "sdio1";
	173	nvidia,function = "sdio1";
	174	};
	175	slxd {
	176	nvidia,pins = "slxd";
	177	nvidia,function = "spdif";
	178	};
	179	spid {
	180	nvidia,pins = "spid", "spie", "spif";
	181	nvidia,function = "spi1";
	182	};
	183	spig {
	184	nvidia,pins = "spig", "spih";
	185	nvidia,function = "spi2_alt";
	186	};
	187	uaa {
	188	nvidia,pins = "uaa", "uab", "uda";
	189	nvidia,function = "ulpi";
	190	};
	191	uad {
	192	nvidia,pins = "uad";
	193	nvidia,function = "irda";
	194	};
	195	uca {
	196	nvidia,pins = "uca", "ucb";
	197	nvidia,function = "uartc";
	198	};
	199	conf_ata {
	200	nvidia,pins = "ata", "atb", "atc", "atd",
	201	"cdev1", "cdev2", "dap1", "dap2",
	202	"dap4", "ddc", "dtf", "gma", "gmc",
	203	"gme", "gpu", "gpu7", "i2cp", "irrx",
	204	"irtx", "pta", "rm", "sdc", "sdd",
	205	"slxc", "slxd", "slxk", "spdi", "spdo",
	206	"uac", "uad", "uca", "ucb", "uda";
ba4104e7 LD	207	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	208	nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb SW	209	};
	210	conf_ate {
	211	nvidia,pins = "ate", "csus", "dap3", "gmd",
	212	"gpv", "owc", "spia", "spib", "spic",
	213	"spid", "spie", "spig";
ba4104e7 LD	214	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	215	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	216	};
	217	conf_ck32 {
	218	nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
	219	"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
ba4104e7	220	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ecc295bb SW	221	};
	222	conf_crtp {
	223	nvidia,pins = "crtp", "gmb", "slxa", "spih";
ba4104e7 LD	224	nvidia,pull = <TEGRA_PIN_PULL_UP>;
ba4104e7 LD	225	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	226	};
	227	conf_dta {
	228	nvidia,pins = "dta", "dtb", "dtc", "dtd";
ba4104e7 LD	229	nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
ba4104e7 LD	230	nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb SW	231	};
	232	conf_dte {
	233	nvidia,pins = "dte", "spif";
ba4104e7 LD	234	nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
ba4104e7 LD	235	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	236	};
	237	conf_hdint {
	238	nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
	239	"lpw1", "lsck", "lsda", "lsdi", "lvp0";
ba4104e7	240	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	241	};
	242	conf_kbca {
	243	nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
	244	"kbce", "kbcf", "sdio1", "uaa", "uab";
ba4104e7 LD	245	nvidia,pull = <TEGRA_PIN_PULL_UP>;
ba4104e7 LD	246	nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb SW	247	};
	248	conf_lc {
	249	nvidia,pins = "lc", "ls";
ba4104e7	250	nvidia,pull = <TEGRA_PIN_PULL_UP>;
ecc295bb SW	251	};
	252	conf_ld0 {
	253	nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
	254	"ld5", "ld6", "ld7", "ld8", "ld9",
	255	"ld10", "ld11", "ld12", "ld13", "ld14",
	256	"ld15", "ld16", "ld17", "ldi", "lhp0",
	257	"lhp1", "lhp2", "lhs", "lm0", "lpp",
	258	"lpw0", "lpw2", "lsc0", "lsc1", "lspi",
	259	"lvp1", "lvs", "pmc", "sdb";
ba4104e7	260	nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb SW	261	};
	262	conf_ld17_0 {
	263	nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
	264	"ld23_22";
ba4104e7	265	nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
ecc295bb	266	};
c729429e WN	267	drive_sdio1 {
c729429e WN	268	nvidia,pins = "drive_sdio1";
ba4104e7 LD	269	nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
	270	nvidia,schmitt = <TEGRA_PIN_ENABLE>;
	271	nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
c729429e WN	272	nvidia,pull-down-strength = <31>;
c729429e WN	273	nvidia,pull-up-strength = <31>;
ba4104e7 LD	274	nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
ba4104e7 LD	275	nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
c729429e	276	};
ecc295bb	277	};
cf633464 MZ	278
	279	state_i2cmux_ddc: pinmux_i2cmux_ddc {
	280	ddc {
	281	nvidia,pins = "ddc";
	282	nvidia,function = "i2c2";
	283	};
	284	pta {
	285	nvidia,pins = "pta";
	286	nvidia,function = "rsvd4";
	287	};
	288	};
	289
	290	state_i2cmux_pta: pinmux_i2cmux_pta {
	291	ddc {
	292	nvidia,pins = "ddc";
	293	nvidia,function = "rsvd4";
	294	};
	295	pta {
	296	nvidia,pins = "pta";
	297	nvidia,function = "i2c2";
	298	};
	299	};
	300
	301	state_i2cmux_idle: pinmux_i2cmux_idle {
	302	ddc {
	303	nvidia,pins = "ddc";
	304	nvidia,function = "rsvd4";
	305	};
	306	pta {
	307	nvidia,pins = "pta";
	308	nvidia,function = "rsvd4";
	309	};
	310	};
ecc295bb SW	311	};
ecc295bb SW	312
2a5fdc9a SW	313	i2s@70002800 {
2a5fdc9a SW	314	status = "okay";
c04abb3a SW	315	};
	316
	317	serial@70006300 {
2a5fdc9a	318	status = "okay";
c04abb3a SW	319	};
c04abb3a SW	320
1771a254 SW	321	pwm: pwm@7000a000 {
	322	status = "okay";
	323	};
	324
88950f3b	325	i2c@7000c000 {
2a5fdc9a	326	status = "okay";
88950f3b	327	clock-frequency = <400000>;
797acf70 SW	328
	329	wm8903: wm8903@1a {
	330	compatible = "wlf,wm8903";
	331	reg = <0x1a>;
	332	interrupt-parent = <&gpio>;
6cecf916	333	interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
797acf70 SW	334
	335	gpio-controller;
	336	#gpio-cells = <2>;
	337
	338	micdet-cfg = <0>;
	339	micdet-delay = <100>;
95decf84	340	gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
797acf70	341	};
b46b0b54 LD	342
	343	/* ALS and proximity sensor */
	344	isl29018@44 {
	345	compatible = "isil,isl29018";
	346	reg = <0x44>;
	347	interrupt-parent = <&gpio>;
6cecf916	348	interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
b46b0b54	349	};
88950f3b SW	350	};
	351
	352	i2c@7000c400 {
2a5fdc9a	353	status = "okay";
97d5520f	354	clock-frequency = <100000>;
88950f3b SW	355	};
88950f3b SW	356
cf633464 MZ	357	i2cmux {
	358	compatible = "i2c-mux-pinctrl";
	359	#address-cells = <1>;
	360	#size-cells = <0>;
	361
	362	i2c-parent = <&{/i2c@7000c400}>;
	363
	364	pinctrl-names = "ddc", "pta", "idle";
	365	pinctrl-0 = <&state_i2cmux_ddc>;
	366	pinctrl-1 = <&state_i2cmux_pta>;
	367	pinctrl-2 = <&state_i2cmux_idle>;
	368
97d5520f	369	hdmi_ddc: i2c@0 {
cf633464 MZ	370	reg = <0>;
	371	#address-cells = <1>;
	372	#size-cells = <0>;
	373	};
	374
1771a254	375	lvds_ddc: i2c@1 {
cf633464 MZ	376	reg = <1>;
	377	#address-cells = <1>;
	378	#size-cells = <0>;
	379	};
	380	};
	381
88950f3b	382	i2c@7000c500 {
2a5fdc9a	383	status = "okay";
88950f3b SW	384	clock-frequency = <400000>;
	385	};
	386
	387	i2c@7000d000 {
2a5fdc9a	388	status = "okay";
88950f3b	389	clock-frequency = <400000>;
017a0104 SW	390
	391	pmic: tps6586x@34 {
	392	compatible = "ti,tps6586x";
	393	reg = <0x34>;
6cecf916	394	interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
017a0104	395
44b12ef7 SW	396	ti,system-power-controller;
44b12ef7 SW	397
017a0104 SW	398	#gpio-cells = <2>;
	399	gpio-controller;
	400
	401	sys-supply = <&vdd_5v0_reg>;
	402	vin-sm0-supply = <&sys_reg>;
	403	vin-sm1-supply = <&sys_reg>;
	404	vin-sm2-supply = <&sys_reg>;
	405	vinldo01-supply = <&sm2_reg>;
	406	vinldo23-supply = <&sm2_reg>;
	407	vinldo4-supply = <&sm2_reg>;
	408	vinldo678-supply = <&sm2_reg>;
	409	vinldo9-supply = <&sm2_reg>;
	410
	411	regulators {
b9c665d7	412	sys_reg: sys {
017a0104 SW	413	regulator-name = "vdd_sys";
	414	regulator-always-on;
	415	};
	416
b9c665d7	417	sm0 {
017a0104 SW	418	regulator-name = "vdd_sm0,vdd_core";
	419	regulator-min-microvolt = <1200000>;
	420	regulator-max-microvolt = <1200000>;
	421	regulator-always-on;
	422	};
	423
b9c665d7	424	sm1 {
017a0104 SW	425	regulator-name = "vdd_sm1,vdd_cpu";
	426	regulator-min-microvolt = <1000000>;
	427	regulator-max-microvolt = <1000000>;
	428	regulator-always-on;
	429	};
	430
b9c665d7	431	sm2_reg: sm2 {
017a0104 SW	432	regulator-name = "vdd_sm2,vin_ldo*";
	433	regulator-min-microvolt = <3700000>;
	434	regulator-max-microvolt = <3700000>;
	435	regulator-always-on;
	436	};
	437
	438	/* LDO0 is not connected to anything */
	439
b9c665d7	440	ldo1 {
017a0104 SW	441	regulator-name = "vdd_ldo1,avdd_pll*";
	442	regulator-min-microvolt = <1100000>;
	443	regulator-max-microvolt = <1100000>;
	444	regulator-always-on;
	445	};
	446
b9c665d7	447	ldo2 {
017a0104 SW	448	regulator-name = "vdd_ldo2,vdd_rtc";
	449	regulator-min-microvolt = <1200000>;
	450	regulator-max-microvolt = <1200000>;
	451	};
	452
b9c665d7	453	ldo3 {
017a0104 SW	454	regulator-name = "vdd_ldo3,avdd_usb*";
	455	regulator-min-microvolt = <3300000>;
	456	regulator-max-microvolt = <3300000>;
	457	regulator-always-on;
	458	};
	459
b9c665d7	460	ldo4 {
017a0104 SW	461	regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
	462	regulator-min-microvolt = <1800000>;
	463	regulator-max-microvolt = <1800000>;
	464	regulator-always-on;
	465	};
	466
b9c665d7	467	ldo5 {
017a0104 SW	468	regulator-name = "vdd_ldo5,vcore_mmc";
	469	regulator-min-microvolt = <2850000>;
	470	regulator-max-microvolt = <2850000>;
	471	regulator-always-on;
	472	};
	473
b9c665d7	474	ldo6 {
017a0104 SW	475	regulator-name = "vdd_ldo6,avdd_vdac";
	476	regulator-min-microvolt = <1800000>;
	477	regulator-max-microvolt = <1800000>;
	478	};
	479
97d5520f	480	hdmi_vdd_reg: ldo7 {
017a0104 SW	481	regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
	482	regulator-min-microvolt = <3300000>;
	483	regulator-max-microvolt = <3300000>;
	484	};
	485
97d5520f	486	hdmi_pll_reg: ldo8 {
017a0104 SW	487	regulator-name = "vdd_ldo8,avdd_hdmi_pll";
	488	regulator-min-microvolt = <1800000>;
	489	regulator-max-microvolt = <1800000>;
	490	};
	491
b9c665d7	492	ldo9 {
017a0104 SW	493	regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
	494	regulator-min-microvolt = <2850000>;
	495	regulator-max-microvolt = <2850000>;
	496	regulator-always-on;
	497	};
	498
b9c665d7	499	ldo_rtc {
017a0104 SW	500	regulator-name = "vdd_rtc_out,vdd_cell";
	501	regulator-min-microvolt = <3300000>;
	502	regulator-max-microvolt = <3300000>;
	503	regulator-always-on;
	504	};
	505	};
	506	};
ee9f7260 TR	507
	508	temperature-sensor@4c {
	509	compatible = "onnn,nct1008";
	510	reg = <0x4c>;
	511	};
017a0104 SW	512	};
017a0104 SW	513
58ecb23f	514	pmc@7000e400 {
017a0104	515	nvidia,invert-interrupt;
47d2d63b	516	nvidia,suspend-mode = <1>;
a44a019d JL	517	nvidia,cpu-pwr-good-time = <2000>;
	518	nvidia,cpu-pwr-off-time = <100>;
	519	nvidia,core-pwr-good-time = <3845 3845>;
	520	nvidia,core-pwr-off-time = <458>;
	521	nvidia,sys-clock-req-active-high;
88950f3b SW	522	};
88950f3b SW	523
2a5fdc9a SW	524	usb@c5000000 {
2a5fdc9a SW	525	status = "okay";
c04abb3a SW	526	};
c04abb3a SW	527
4c94c8b5 VB	528	usb-phy@c5000000 {
	529	status = "okay";
	530	};
	531
2a5fdc9a SW	532	usb@c5004000 {
2a5fdc9a SW	533	status = "okay";
3325f1bc SW	534	nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
3325f1bc SW	535	GPIO_ACTIVE_LOW>;
797acf70 SW	536	};
797acf70 SW	537
9dffe3be	538	usb-phy@c5004000 {
4c94c8b5	539	status = "okay";
3325f1bc SW	540	nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
3325f1bc SW	541	GPIO_ACTIVE_LOW>;
c04abb3a SW	542	};
c04abb3a SW	543
9dffe3be VB	544	usb@c5008000 {
9dffe3be VB	545	status = "okay";
40e8b3a6 VB	546	};
40e8b3a6 VB	547
4c94c8b5 VB	548	usb-phy@c5008000 {
	549	status = "okay";
	550	};
	551
c729429e WN	552	sdhci@c8000000 {
c729429e WN	553	status = "okay";
3325f1bc	554	power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
c729429e	555	bus-width = <4>;
7a2617a6	556	keep-power-in-suspend;
c729429e WN	557	};
c729429e WN	558
c04abb3a	559	sdhci@c8000400 {
2a5fdc9a	560	status = "okay";
3325f1bc SW	561	cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
	562	wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
	563	power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
deb88cc3	564	bus-width = <4>;
c04abb3a SW	565	};
	566
	567	sdhci@c8000600 {
2a5fdc9a	568	status = "okay";
deb88cc3	569	bus-width = <8>;
7a2617a6	570	non-removable;
c04abb3a SW	571	};
c04abb3a SW	572
1771a254 SW	573	backlight: backlight {
	574	compatible = "pwm-backlight";
	575
	576	enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
	577	power-supply = <&vdd_bl_reg>;
	578	pwms = <&pwm 2 5000000>;
	579
	580	brightness-levels = <0 4 8 16 32 64 128 255>;
	581	default-brightness-level = <6>;
	582	};
	583
7021d122 JL	584	clocks {
	585	compatible = "simple-bus";
	586	#address-cells = <1>;
	587	#size-cells = <0>;
	588
58ecb23f	589	clk32k_in: clock@0 {
7021d122 JL	590	compatible = "fixed-clock";
	591	reg=<0>;
	592	#clock-cells = <0>;
	593	clock-frequency = <32768>;
	594	};
	595	};
	596
5741a256 JL	597	gpio-keys {
	598	compatible = "gpio-keys";
	599
	600	power {
	601	label = "Power";
3325f1bc	602	gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
6bccbd5e	603	linux,code = <KEY_POWER>;
5741a256 JL	604	gpio-key,wakeup;
	605	};
	606	};
	607
1771a254 SW	608	panel: panel {
	609	compatible = "chunghwa,claa101wa01a", "simple-panel";
	610
	611	power-supply = <&vdd_pnl_reg>;
	612	enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
	613
	614	backlight = <&backlight>;
	615	ddc-i2c-bus = <&lvds_ddc>;
	616	};
	617
017a0104 SW	618	regulators {
	619	compatible = "simple-bus";
	620	#address-cells = <1>;
	621	#size-cells = <0>;
	622
	623	vdd_5v0_reg: regulator@0 {
	624	compatible = "regulator-fixed";
	625	reg = <0>;
	626	regulator-name = "vdd_5v0";
	627	regulator-min-microvolt = <5000000>;
	628	regulator-max-microvolt = <5000000>;
	629	regulator-always-on;
	630	};
	631
	632	regulator@1 {
	633	compatible = "regulator-fixed";
	634	reg = <1>;
	635	regulator-name = "vdd_1v5";
	636	regulator-min-microvolt = <1500000>;
	637	regulator-max-microvolt = <1500000>;
3325f1bc	638	gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
017a0104 SW	639	};
	640
	641	regulator@2 {
	642	compatible = "regulator-fixed";
	643	reg = <2>;
	644	regulator-name = "vdd_1v2";
	645	regulator-min-microvolt = <1200000>;
	646	regulator-max-microvolt = <1200000>;
3325f1bc	647	gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
017a0104 SW	648	enable-active-high;
	649	};
	650
1771a254	651	vdd_pnl_reg: regulator@3 {
017a0104 SW	652	compatible = "regulator-fixed";
	653	reg = <3>;
	654	regulator-name = "vdd_pnl";
	655	regulator-min-microvolt = <2800000>;
	656	regulator-max-microvolt = <2800000>;
3325f1bc	657	gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
017a0104 SW	658	enable-active-high;
	659	};
	660
1771a254	661	vdd_bl_reg: regulator@4 {
017a0104 SW	662	compatible = "regulator-fixed";
	663	reg = <4>;
	664	regulator-name = "vdd_bl";
	665	regulator-min-microvolt = <2800000>;
	666	regulator-max-microvolt = <2800000>;
3325f1bc	667	gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
017a0104 SW	668	enable-active-high;
	669	};
	670	};
	671
797acf70 SW	672	sound {
	673	compatible = "nvidia,tegra-audio-wm8903-ventana",
	674	"nvidia,tegra-audio-wm8903";
	675	nvidia,model = "NVIDIA Tegra Ventana";
	676
	677	nvidia,audio-routing =
	678	"Headphone Jack", "HPOUTR",
	679	"Headphone Jack", "HPOUTL",
	680	"Int Spk", "ROP",
	681	"Int Spk", "RON",
	682	"Int Spk", "LOP",
	683	"Int Spk", "LON",
	684	"Mic Jack", "MICBIAS",
	685	"IN1L", "Mic Jack";
	686
	687	nvidia,i2s-controller = <&tegra_i2s1>;
	688	nvidia,audio-codec = <&wm8903>;
	689
3325f1bc SW	690	nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
	691	nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
	692	nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
	693	GPIO_ACTIVE_HIGH>;
	694	nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
	695	GPIO_ACTIVE_HIGH>;
f9cd2b3b	696
885a8cfa HD	697	clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
	698	<&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
	699	<&tegra_car TEGRA20_CLK_CDEV1>;
f9cd2b3b	700	clock-names = "pll_a", "pll_a_out0", "mclk";
797acf70	701	};
add29e61	702	};