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1 | /dts-v1/; |
2 | ||
1bd0bd49 | 3 | #include "tegra30.dtsi" |
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4 | |
5 | / { | |
6 | model = "NVIDIA Tegra30 Beaver evaluation board"; | |
7 | compatible = "nvidia,beaver", "nvidia,tegra30"; | |
8 | ||
9 | memory { | |
30022bb4 | 10 | reg = <0x80000000 0x7ff00000>; |
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11 | }; |
12 | ||
13 | pinmux { | |
14 | pinctrl-names = "default"; | |
15 | pinctrl-0 = <&state_default>; | |
16 | ||
17 | state_default: pinmux { | |
18 | sdmmc1_clk_pz0 { | |
19 | nvidia,pins = "sdmmc1_clk_pz0"; | |
20 | nvidia,function = "sdmmc1"; | |
21 | nvidia,pull = <0>; | |
22 | nvidia,tristate = <0>; | |
23 | }; | |
24 | sdmmc1_cmd_pz1 { | |
25 | nvidia,pins = "sdmmc1_cmd_pz1", | |
26 | "sdmmc1_dat0_py7", | |
27 | "sdmmc1_dat1_py6", | |
28 | "sdmmc1_dat2_py5", | |
29 | "sdmmc1_dat3_py4"; | |
30 | nvidia,function = "sdmmc1"; | |
31 | nvidia,pull = <2>; | |
32 | nvidia,tristate = <0>; | |
33 | }; | |
34 | sdmmc3_clk_pa6 { | |
35 | nvidia,pins = "sdmmc3_clk_pa6"; | |
36 | nvidia,function = "sdmmc3"; | |
37 | nvidia,pull = <0>; | |
38 | nvidia,tristate = <0>; | |
39 | }; | |
40 | sdmmc3_cmd_pa7 { | |
41 | nvidia,pins = "sdmmc3_cmd_pa7", | |
42 | "sdmmc3_dat0_pb7", | |
43 | "sdmmc3_dat1_pb6", | |
44 | "sdmmc3_dat2_pb5", | |
45 | "sdmmc3_dat3_pb4"; | |
46 | nvidia,function = "sdmmc3"; | |
47 | nvidia,pull = <2>; | |
48 | nvidia,tristate = <0>; | |
49 | }; | |
50 | sdmmc4_clk_pcc4 { | |
51 | nvidia,pins = "sdmmc4_clk_pcc4", | |
52 | "sdmmc4_rst_n_pcc3"; | |
53 | nvidia,function = "sdmmc4"; | |
54 | nvidia,pull = <0>; | |
55 | nvidia,tristate = <0>; | |
56 | }; | |
57 | sdmmc4_dat0_paa0 { | |
58 | nvidia,pins = "sdmmc4_dat0_paa0", | |
59 | "sdmmc4_dat1_paa1", | |
60 | "sdmmc4_dat2_paa2", | |
61 | "sdmmc4_dat3_paa3", | |
62 | "sdmmc4_dat4_paa4", | |
63 | "sdmmc4_dat5_paa5", | |
64 | "sdmmc4_dat6_paa6", | |
65 | "sdmmc4_dat7_paa7"; | |
66 | nvidia,function = "sdmmc4"; | |
67 | nvidia,pull = <2>; | |
68 | nvidia,tristate = <0>; | |
69 | }; | |
70 | dap2_fs_pa2 { | |
71 | nvidia,pins = "dap2_fs_pa2", | |
72 | "dap2_sclk_pa3", | |
73 | "dap2_din_pa4", | |
74 | "dap2_dout_pa5"; | |
75 | nvidia,function = "i2s1"; | |
76 | nvidia,pull = <0>; | |
77 | nvidia,tristate = <0>; | |
78 | }; | |
79 | sdio3 { | |
80 | nvidia,pins = "drive_sdio3"; | |
81 | nvidia,high-speed-mode = <0>; | |
82 | nvidia,schmitt = <0>; | |
83 | nvidia,pull-down-strength = <46>; | |
84 | nvidia,pull-up-strength = <42>; | |
85 | nvidia,slew-rate-rising = <1>; | |
86 | nvidia,slew-rate-falling = <1>; | |
87 | }; | |
88 | }; | |
89 | }; | |
90 | ||
91 | serial@70006000 { | |
92 | status = "okay"; | |
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93 | }; |
94 | ||
95 | i2c@7000c000 { | |
96 | status = "okay"; | |
97 | clock-frequency = <100000>; | |
98 | }; | |
99 | ||
100 | i2c@7000c400 { | |
101 | status = "okay"; | |
102 | clock-frequency = <100000>; | |
103 | }; | |
104 | ||
105 | i2c@7000c500 { | |
106 | status = "okay"; | |
107 | clock-frequency = <100000>; | |
108 | }; | |
109 | ||
110 | i2c@7000c700 { | |
111 | status = "okay"; | |
112 | clock-frequency = <100000>; | |
113 | }; | |
114 | ||
115 | i2c@7000d000 { | |
116 | status = "okay"; | |
117 | clock-frequency = <100000>; | |
118 | ||
23037bbd SW |
119 | rt5640: rt5640 { |
120 | compatible = "realtek,rt5640"; | |
121 | reg = <0x1c>; | |
122 | interrupt-parent = <&gpio>; | |
123 | interrupts = <TEGRA_GPIO(X, 3) GPIO_ACTIVE_HIGH>; | |
124 | realtek,ldo1-en-gpios = | |
125 | <&gpio TEGRA_GPIO(X, 2) GPIO_ACTIVE_HIGH>; | |
126 | }; | |
127 | ||
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128 | tps62361 { |
129 | compatible = "ti,tps62361"; | |
130 | reg = <0x60>; | |
131 | ||
132 | regulator-name = "tps62361-vout"; | |
133 | regulator-min-microvolt = <500000>; | |
134 | regulator-max-microvolt = <1500000>; | |
135 | regulator-boot-on; | |
136 | regulator-always-on; | |
137 | ti,vsel0-state-high; | |
138 | ti,vsel1-state-high; | |
139 | }; | |
140 | ||
141 | pmic: tps65911@2d { | |
142 | compatible = "ti,tps65911"; | |
143 | reg = <0x2d>; | |
144 | ||
6cecf916 | 145 | interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; |
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146 | #interrupt-cells = <2>; |
147 | interrupt-controller; | |
148 | ||
149 | ti,system-power-controller; | |
150 | ||
151 | #gpio-cells = <2>; | |
152 | gpio-controller; | |
153 | ||
154 | vcc1-supply = <&vdd_5v_in_reg>; | |
155 | vcc2-supply = <&vdd_5v_in_reg>; | |
156 | vcc3-supply = <&vio_reg>; | |
157 | vcc4-supply = <&vdd_5v_in_reg>; | |
158 | vcc5-supply = <&vdd_5v_in_reg>; | |
159 | vcc6-supply = <&vdd2_reg>; | |
160 | vcc7-supply = <&vdd_5v_in_reg>; | |
161 | vccio-supply = <&vdd_5v_in_reg>; | |
162 | ||
163 | regulators { | |
164 | #address-cells = <1>; | |
165 | #size-cells = <0>; | |
166 | ||
167 | vdd1_reg: vdd1 { | |
168 | regulator-name = "vddio_ddr_1v2"; | |
169 | regulator-min-microvolt = <1200000>; | |
170 | regulator-max-microvolt = <1200000>; | |
171 | regulator-always-on; | |
172 | }; | |
173 | ||
174 | vdd2_reg: vdd2 { | |
175 | regulator-name = "vdd_1v5_gen"; | |
176 | regulator-min-microvolt = <1500000>; | |
177 | regulator-max-microvolt = <1500000>; | |
178 | regulator-always-on; | |
179 | }; | |
180 | ||
181 | vddctrl_reg: vddctrl { | |
182 | regulator-name = "vdd_cpu,vdd_sys"; | |
183 | regulator-min-microvolt = <1000000>; | |
184 | regulator-max-microvolt = <1000000>; | |
185 | regulator-always-on; | |
186 | }; | |
187 | ||
188 | vio_reg: vio { | |
189 | regulator-name = "vdd_1v8_gen"; | |
190 | regulator-min-microvolt = <1800000>; | |
191 | regulator-max-microvolt = <1800000>; | |
192 | regulator-always-on; | |
193 | }; | |
194 | ||
195 | ldo1_reg: ldo1 { | |
196 | regulator-name = "vdd_pexa,vdd_pexb"; | |
197 | regulator-min-microvolt = <1050000>; | |
198 | regulator-max-microvolt = <1050000>; | |
199 | }; | |
200 | ||
201 | ldo2_reg: ldo2 { | |
202 | regulator-name = "vdd_sata,avdd_plle"; | |
203 | regulator-min-microvolt = <1050000>; | |
204 | regulator-max-microvolt = <1050000>; | |
205 | }; | |
206 | ||
207 | /* LDO3 is not connected to anything */ | |
208 | ||
209 | ldo4_reg: ldo4 { | |
210 | regulator-name = "vdd_rtc"; | |
211 | regulator-min-microvolt = <1200000>; | |
212 | regulator-max-microvolt = <1200000>; | |
213 | regulator-always-on; | |
214 | }; | |
215 | ||
216 | ldo5_reg: ldo5 { | |
217 | regulator-name = "vddio_sdmmc,avdd_vdac"; | |
218 | regulator-min-microvolt = <3300000>; | |
219 | regulator-max-microvolt = <3300000>; | |
220 | regulator-always-on; | |
221 | }; | |
222 | ||
223 | ldo6_reg: ldo6 { | |
224 | regulator-name = "avdd_dsi_csi,pwrdet_mipi"; | |
225 | regulator-min-microvolt = <1200000>; | |
226 | regulator-max-microvolt = <1200000>; | |
227 | }; | |
228 | ||
229 | ldo7_reg: ldo7 { | |
230 | regulator-name = "vdd_pllm,x,u,a_p_c_s"; | |
231 | regulator-min-microvolt = <1200000>; | |
232 | regulator-max-microvolt = <1200000>; | |
233 | regulator-always-on; | |
234 | }; | |
235 | ||
236 | ldo8_reg: ldo8 { | |
237 | regulator-name = "vdd_ddr_hs"; | |
238 | regulator-min-microvolt = <1000000>; | |
239 | regulator-max-microvolt = <1000000>; | |
240 | regulator-always-on; | |
241 | }; | |
242 | }; | |
243 | }; | |
244 | }; | |
245 | ||
246 | spi@7000da00 { | |
247 | status = "okay"; | |
248 | spi-max-frequency = <25000000>; | |
249 | spi-flash@1 { | |
250 | compatible = "winbond,w25q32"; | |
251 | reg = <1>; | |
252 | spi-max-frequency = <20000000>; | |
253 | }; | |
254 | }; | |
255 | ||
256 | ahub { | |
257 | i2s@70080400 { | |
258 | status = "okay"; | |
259 | }; | |
260 | }; | |
261 | ||
262 | pmc { | |
263 | status = "okay"; | |
264 | nvidia,invert-interrupt; | |
a44a019d JL |
265 | nvidia,suspend-mode = <2>; |
266 | nvidia,cpu-pwr-good-time = <2000>; | |
267 | nvidia,cpu-pwr-off-time = <200>; | |
268 | nvidia,core-pwr-good-time = <3845 3845>; | |
269 | nvidia,core-pwr-off-time = <0>; | |
270 | nvidia,core-power-req-active-high; | |
271 | nvidia,sys-clock-req-active-high; | |
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272 | }; |
273 | ||
274 | sdhci@78000000 { | |
275 | status = "okay"; | |
3325f1bc SW |
276 | cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; |
277 | wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>; | |
278 | power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>; | |
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279 | bus-width = <4>; |
280 | }; | |
281 | ||
282 | sdhci@78000600 { | |
283 | status = "okay"; | |
284 | bus-width = <8>; | |
7a2617a6 | 285 | non-removable; |
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286 | }; |
287 | ||
7021d122 JL |
288 | clocks { |
289 | compatible = "simple-bus"; | |
290 | #address-cells = <1>; | |
291 | #size-cells = <0>; | |
292 | ||
293 | clk32k_in: clock { | |
294 | compatible = "fixed-clock"; | |
295 | reg=<0>; | |
296 | #clock-cells = <0>; | |
297 | clock-frequency = <32768>; | |
298 | }; | |
299 | }; | |
300 | ||
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301 | regulators { |
302 | compatible = "simple-bus"; | |
303 | #address-cells = <1>; | |
304 | #size-cells = <0>; | |
305 | ||
306 | vdd_5v_in_reg: regulator@0 { | |
307 | compatible = "regulator-fixed"; | |
308 | reg = <0>; | |
309 | regulator-name = "vdd_5v_in"; | |
310 | regulator-min-microvolt = <5000000>; | |
311 | regulator-max-microvolt = <5000000>; | |
312 | regulator-always-on; | |
313 | }; | |
314 | ||
315 | chargepump_5v_reg: regulator@1 { | |
316 | compatible = "regulator-fixed"; | |
317 | reg = <1>; | |
318 | regulator-name = "chargepump_5v"; | |
319 | regulator-min-microvolt = <5000000>; | |
320 | regulator-max-microvolt = <5000000>; | |
321 | regulator-boot-on; | |
322 | regulator-always-on; | |
323 | enable-active-high; | |
3325f1bc | 324 | gpio = <&pmic 0 GPIO_ACTIVE_HIGH>; |
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325 | }; |
326 | ||
327 | ddr_reg: regulator@2 { | |
328 | compatible = "regulator-fixed"; | |
329 | reg = <2>; | |
330 | regulator-name = "vdd_ddr"; | |
331 | regulator-min-microvolt = <1500000>; | |
332 | regulator-max-microvolt = <1500000>; | |
333 | regulator-always-on; | |
334 | regulator-boot-on; | |
335 | enable-active-high; | |
3325f1bc | 336 | gpio = <&pmic 7 GPIO_ACTIVE_HIGH>; |
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337 | vin-supply = <&vdd_5v_in_reg>; |
338 | }; | |
339 | ||
340 | vdd_5v_sata_reg: regulator@3 { | |
341 | compatible = "regulator-fixed"; | |
342 | reg = <3>; | |
343 | regulator-name = "vdd_5v_sata"; | |
344 | regulator-min-microvolt = <5000000>; | |
345 | regulator-max-microvolt = <5000000>; | |
346 | regulator-always-on; | |
347 | regulator-boot-on; | |
348 | enable-active-high; | |
3325f1bc | 349 | gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>; |
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350 | vin-supply = <&vdd_5v_in_reg>; |
351 | }; | |
352 | ||
353 | usb1_vbus_reg: regulator@4 { | |
354 | compatible = "regulator-fixed"; | |
355 | reg = <4>; | |
356 | regulator-name = "usb1_vbus"; | |
357 | regulator-min-microvolt = <5000000>; | |
358 | regulator-max-microvolt = <5000000>; | |
359 | enable-active-high; | |
3325f1bc | 360 | gpio = <&gpio TEGRA_GPIO(I, 4) GPIO_ACTIVE_HIGH>; |
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361 | gpio-open-drain; |
362 | vin-supply = <&vdd_5v_in_reg>; | |
363 | }; | |
364 | ||
365 | usb3_vbus_reg: regulator@5 { | |
366 | compatible = "regulator-fixed"; | |
367 | reg = <5>; | |
368 | regulator-name = "usb3_vbus"; | |
369 | regulator-min-microvolt = <5000000>; | |
370 | regulator-max-microvolt = <5000000>; | |
371 | enable-active-high; | |
3325f1bc | 372 | gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>; |
d7df69fe BW |
373 | gpio-open-drain; |
374 | vin-supply = <&vdd_5v_in_reg>; | |
375 | }; | |
376 | ||
377 | sys_3v3_reg: regulator@6 { | |
378 | compatible = "regulator-fixed"; | |
379 | reg = <6>; | |
380 | regulator-name = "sys_3v3,vdd_3v3_alw"; | |
381 | regulator-min-microvolt = <3300000>; | |
382 | regulator-max-microvolt = <3300000>; | |
383 | regulator-always-on; | |
384 | regulator-boot-on; | |
385 | enable-active-high; | |
3325f1bc | 386 | gpio = <&pmic 6 GPIO_ACTIVE_HIGH>; |
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387 | vin-supply = <&vdd_5v_in_reg>; |
388 | }; | |
389 | ||
390 | sys_3v3_pexs_reg: regulator@7 { | |
391 | compatible = "regulator-fixed"; | |
392 | reg = <7>; | |
393 | regulator-name = "sys_3v3_pexs"; | |
394 | regulator-min-microvolt = <3300000>; | |
395 | regulator-max-microvolt = <3300000>; | |
396 | regulator-always-on; | |
397 | regulator-boot-on; | |
398 | enable-active-high; | |
3325f1bc | 399 | gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>; |
d7df69fe BW |
400 | vin-supply = <&sys_3v3_reg>; |
401 | }; | |
402 | }; | |
b4dd3e0c EB |
403 | |
404 | gpio-leds { | |
405 | compatible = "gpio-leds"; | |
406 | ||
407 | gpled1 { | |
408 | label = "LED1"; /* CR5A1 (blue) */ | |
3325f1bc | 409 | gpios = <&gpio TEGRA_GPIO(L, 1) GPIO_ACTIVE_HIGH>; |
b4dd3e0c EB |
410 | }; |
411 | gpled2 { | |
412 | label = "LED2"; /* CR4A2 (green) */ | |
3325f1bc | 413 | gpios = <&gpio TEGRA_GPIO(L, 0) GPIO_ACTIVE_HIGH>; |
b4dd3e0c EB |
414 | }; |
415 | }; | |
23037bbd SW |
416 | |
417 | sound { | |
418 | compatible = "nvidia,tegra-audio-rt5640-beaver", | |
419 | "nvidia,tegra-audio-rt5640"; | |
420 | nvidia,model = "NVIDIA Tegra Beaver"; | |
421 | ||
422 | nvidia,audio-routing = | |
423 | "Headphones", "HPOR", | |
424 | "Headphones", "HPOL"; | |
425 | ||
426 | nvidia,i2s-controller = <&tegra_i2s1>; | |
427 | nvidia,audio-codec = <&rt5640>; | |
428 | ||
429 | nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; | |
430 | ||
431 | clocks = <&tegra_car TEGRA30_CLK_PLL_A>, | |
432 | <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, | |
433 | <&tegra_car TEGRA30_CLK_EXTERN1>; | |
434 | clock-names = "pll_a", "pll_a_out0", "mclk"; | |
435 | }; | |
d7df69fe | 436 | }; |