Commit | Line | Data |
---|---|---|
d7df69fe BW |
1 | /dts-v1/; |
2 | ||
1bd0bd49 | 3 | #include "tegra30.dtsi" |
d7df69fe BW |
4 | |
5 | / { | |
6 | model = "NVIDIA Tegra30 Beaver evaluation board"; | |
7 | compatible = "nvidia,beaver", "nvidia,tegra30"; | |
8 | ||
553c0a20 SW |
9 | aliases { |
10 | rtc0 = "/i2c@7000d000/tps65911@2d"; | |
11 | rtc1 = "/rtc@7000e000"; | |
12 | }; | |
13 | ||
d7df69fe | 14 | memory { |
30022bb4 | 15 | reg = <0x80000000 0x7ff00000>; |
d7df69fe BW |
16 | }; |
17 | ||
58ecb23f | 18 | pcie-controller@00003000 { |
bb034cb5 TR |
19 | status = "okay"; |
20 | pex-clk-supply = <&sys_3v3_pexs_reg>; | |
21 | vdd-supply = <&ldo1_reg>; | |
22 | avdd-supply = <&ldo2_reg>; | |
23 | ||
24 | pci@1,0 { | |
25 | status = "okay"; | |
44fefab4 | 26 | nvidia,num-lanes = <2>; |
bb034cb5 TR |
27 | }; |
28 | ||
29 | pci@2,0 { | |
44fefab4 | 30 | nvidia,num-lanes = <2>; |
bb034cb5 TR |
31 | }; |
32 | ||
33 | pci@3,0 { | |
44fefab4 SW |
34 | status = "okay"; |
35 | nvidia,num-lanes = <2>; | |
bb034cb5 TR |
36 | }; |
37 | }; | |
38 | ||
58ecb23f SW |
39 | host1x@50000000 { |
40 | hdmi@54280000 { | |
9bd80b41 TR |
41 | status = "okay"; |
42 | ||
43 | vdd-supply = <&sys_3v3_reg>; | |
44 | pll-supply = <&vio_reg>; | |
45 | ||
46 | nvidia,hpd-gpio = | |
47 | <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; | |
48 | nvidia,ddc-i2c-bus = <&hdmiddc>; | |
49 | }; | |
50 | }; | |
51 | ||
58ecb23f | 52 | pinmux@70000868 { |
d7df69fe BW |
53 | pinctrl-names = "default"; |
54 | pinctrl-0 = <&state_default>; | |
55 | ||
56 | state_default: pinmux { | |
57 | sdmmc1_clk_pz0 { | |
58 | nvidia,pins = "sdmmc1_clk_pz0"; | |
59 | nvidia,function = "sdmmc1"; | |
a47c662a LD |
60 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
61 | nvidia,tristate = <TEGRA_PIN_DISABLE>; | |
d7df69fe BW |
62 | }; |
63 | sdmmc1_cmd_pz1 { | |
64 | nvidia,pins = "sdmmc1_cmd_pz1", | |
65 | "sdmmc1_dat0_py7", | |
66 | "sdmmc1_dat1_py6", | |
67 | "sdmmc1_dat2_py5", | |
68 | "sdmmc1_dat3_py4"; | |
69 | nvidia,function = "sdmmc1"; | |
a47c662a LD |
70 | nvidia,pull = <TEGRA_PIN_PULL_UP>; |
71 | nvidia,tristate = <TEGRA_PIN_DISABLE>; | |
d7df69fe BW |
72 | }; |
73 | sdmmc3_clk_pa6 { | |
74 | nvidia,pins = "sdmmc3_clk_pa6"; | |
75 | nvidia,function = "sdmmc3"; | |
a47c662a LD |
76 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
77 | nvidia,tristate = <TEGRA_PIN_DISABLE>; | |
d7df69fe BW |
78 | }; |
79 | sdmmc3_cmd_pa7 { | |
80 | nvidia,pins = "sdmmc3_cmd_pa7", | |
81 | "sdmmc3_dat0_pb7", | |
82 | "sdmmc3_dat1_pb6", | |
83 | "sdmmc3_dat2_pb5", | |
84 | "sdmmc3_dat3_pb4"; | |
85 | nvidia,function = "sdmmc3"; | |
a47c662a LD |
86 | nvidia,pull = <TEGRA_PIN_PULL_UP>; |
87 | nvidia,tristate = <TEGRA_PIN_DISABLE>; | |
d7df69fe BW |
88 | }; |
89 | sdmmc4_clk_pcc4 { | |
90 | nvidia,pins = "sdmmc4_clk_pcc4", | |
91 | "sdmmc4_rst_n_pcc3"; | |
92 | nvidia,function = "sdmmc4"; | |
a47c662a LD |
93 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
94 | nvidia,tristate = <TEGRA_PIN_DISABLE>; | |
d7df69fe BW |
95 | }; |
96 | sdmmc4_dat0_paa0 { | |
97 | nvidia,pins = "sdmmc4_dat0_paa0", | |
98 | "sdmmc4_dat1_paa1", | |
99 | "sdmmc4_dat2_paa2", | |
100 | "sdmmc4_dat3_paa3", | |
101 | "sdmmc4_dat4_paa4", | |
102 | "sdmmc4_dat5_paa5", | |
103 | "sdmmc4_dat6_paa6", | |
104 | "sdmmc4_dat7_paa7"; | |
105 | nvidia,function = "sdmmc4"; | |
a47c662a LD |
106 | nvidia,pull = <TEGRA_PIN_PULL_UP>; |
107 | nvidia,tristate = <TEGRA_PIN_DISABLE>; | |
d7df69fe BW |
108 | }; |
109 | dap2_fs_pa2 { | |
110 | nvidia,pins = "dap2_fs_pa2", | |
111 | "dap2_sclk_pa3", | |
112 | "dap2_din_pa4", | |
113 | "dap2_dout_pa5"; | |
114 | nvidia,function = "i2s1"; | |
a47c662a LD |
115 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
116 | nvidia,tristate = <TEGRA_PIN_DISABLE>; | |
d7df69fe | 117 | }; |
cc34c9f7 TT |
118 | pex_l1_prsnt_n_pdd4 { |
119 | nvidia,pins = "pex_l1_prsnt_n_pdd4", | |
120 | "pex_l1_clkreq_n_pdd6"; | |
a47c662a | 121 | nvidia,pull = <TEGRA_PIN_PULL_UP>; |
cc34c9f7 | 122 | }; |
d7df69fe BW |
123 | sdio3 { |
124 | nvidia,pins = "drive_sdio3"; | |
a47c662a LD |
125 | nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>; |
126 | nvidia,schmitt = <TEGRA_PIN_DISABLE>; | |
d7df69fe BW |
127 | nvidia,pull-down-strength = <46>; |
128 | nvidia,pull-up-strength = <42>; | |
129 | nvidia,slew-rate-rising = <1>; | |
130 | nvidia,slew-rate-falling = <1>; | |
131 | }; | |
cc34c9f7 TT |
132 | gpv { |
133 | nvidia,pins = "drive_gpv"; | |
134 | nvidia,pull-up-strength = <16>; | |
135 | }; | |
d7df69fe BW |
136 | }; |
137 | }; | |
138 | ||
139 | serial@70006000 { | |
140 | status = "okay"; | |
d7df69fe BW |
141 | }; |
142 | ||
143 | i2c@7000c000 { | |
144 | status = "okay"; | |
145 | clock-frequency = <100000>; | |
146 | }; | |
147 | ||
148 | i2c@7000c400 { | |
149 | status = "okay"; | |
150 | clock-frequency = <100000>; | |
151 | }; | |
152 | ||
153 | i2c@7000c500 { | |
154 | status = "okay"; | |
155 | clock-frequency = <100000>; | |
156 | }; | |
157 | ||
9bd80b41 | 158 | hdmiddc: i2c@7000c700 { |
d7df69fe BW |
159 | status = "okay"; |
160 | clock-frequency = <100000>; | |
161 | }; | |
162 | ||
163 | i2c@7000d000 { | |
164 | status = "okay"; | |
165 | clock-frequency = <100000>; | |
166 | ||
58ecb23f | 167 | rt5640: rt5640@1c { |
23037bbd SW |
168 | compatible = "realtek,rt5640"; |
169 | reg = <0x1c>; | |
170 | interrupt-parent = <&gpio>; | |
171 | interrupts = <TEGRA_GPIO(X, 3) GPIO_ACTIVE_HIGH>; | |
172 | realtek,ldo1-en-gpios = | |
173 | <&gpio TEGRA_GPIO(X, 2) GPIO_ACTIVE_HIGH>; | |
174 | }; | |
175 | ||
d7df69fe BW |
176 | pmic: tps65911@2d { |
177 | compatible = "ti,tps65911"; | |
178 | reg = <0x2d>; | |
179 | ||
6cecf916 | 180 | interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; |
d7df69fe BW |
181 | #interrupt-cells = <2>; |
182 | interrupt-controller; | |
183 | ||
184 | ti,system-power-controller; | |
185 | ||
186 | #gpio-cells = <2>; | |
187 | gpio-controller; | |
188 | ||
189 | vcc1-supply = <&vdd_5v_in_reg>; | |
190 | vcc2-supply = <&vdd_5v_in_reg>; | |
191 | vcc3-supply = <&vio_reg>; | |
192 | vcc4-supply = <&vdd_5v_in_reg>; | |
193 | vcc5-supply = <&vdd_5v_in_reg>; | |
194 | vcc6-supply = <&vdd2_reg>; | |
195 | vcc7-supply = <&vdd_5v_in_reg>; | |
196 | vccio-supply = <&vdd_5v_in_reg>; | |
197 | ||
198 | regulators { | |
199 | #address-cells = <1>; | |
200 | #size-cells = <0>; | |
201 | ||
202 | vdd1_reg: vdd1 { | |
203 | regulator-name = "vddio_ddr_1v2"; | |
204 | regulator-min-microvolt = <1200000>; | |
205 | regulator-max-microvolt = <1200000>; | |
206 | regulator-always-on; | |
207 | }; | |
208 | ||
209 | vdd2_reg: vdd2 { | |
210 | regulator-name = "vdd_1v5_gen"; | |
211 | regulator-min-microvolt = <1500000>; | |
212 | regulator-max-microvolt = <1500000>; | |
213 | regulator-always-on; | |
214 | }; | |
215 | ||
216 | vddctrl_reg: vddctrl { | |
217 | regulator-name = "vdd_cpu,vdd_sys"; | |
218 | regulator-min-microvolt = <1000000>; | |
219 | regulator-max-microvolt = <1000000>; | |
220 | regulator-always-on; | |
221 | }; | |
222 | ||
223 | vio_reg: vio { | |
224 | regulator-name = "vdd_1v8_gen"; | |
225 | regulator-min-microvolt = <1800000>; | |
226 | regulator-max-microvolt = <1800000>; | |
227 | regulator-always-on; | |
228 | }; | |
229 | ||
230 | ldo1_reg: ldo1 { | |
231 | regulator-name = "vdd_pexa,vdd_pexb"; | |
232 | regulator-min-microvolt = <1050000>; | |
233 | regulator-max-microvolt = <1050000>; | |
234 | }; | |
235 | ||
236 | ldo2_reg: ldo2 { | |
237 | regulator-name = "vdd_sata,avdd_plle"; | |
238 | regulator-min-microvolt = <1050000>; | |
239 | regulator-max-microvolt = <1050000>; | |
240 | }; | |
241 | ||
242 | /* LDO3 is not connected to anything */ | |
243 | ||
244 | ldo4_reg: ldo4 { | |
245 | regulator-name = "vdd_rtc"; | |
246 | regulator-min-microvolt = <1200000>; | |
247 | regulator-max-microvolt = <1200000>; | |
248 | regulator-always-on; | |
249 | }; | |
250 | ||
251 | ldo5_reg: ldo5 { | |
252 | regulator-name = "vddio_sdmmc,avdd_vdac"; | |
253 | regulator-min-microvolt = <3300000>; | |
254 | regulator-max-microvolt = <3300000>; | |
255 | regulator-always-on; | |
256 | }; | |
257 | ||
258 | ldo6_reg: ldo6 { | |
259 | regulator-name = "avdd_dsi_csi,pwrdet_mipi"; | |
260 | regulator-min-microvolt = <1200000>; | |
261 | regulator-max-microvolt = <1200000>; | |
262 | }; | |
263 | ||
264 | ldo7_reg: ldo7 { | |
265 | regulator-name = "vdd_pllm,x,u,a_p_c_s"; | |
266 | regulator-min-microvolt = <1200000>; | |
267 | regulator-max-microvolt = <1200000>; | |
268 | regulator-always-on; | |
269 | }; | |
270 | ||
271 | ldo8_reg: ldo8 { | |
272 | regulator-name = "vdd_ddr_hs"; | |
273 | regulator-min-microvolt = <1000000>; | |
274 | regulator-max-microvolt = <1000000>; | |
275 | regulator-always-on; | |
276 | }; | |
277 | }; | |
278 | }; | |
57899053 SW |
279 | |
280 | tps62361@60 { | |
281 | compatible = "ti,tps62361"; | |
282 | reg = <0x60>; | |
283 | ||
284 | regulator-name = "tps62361-vout"; | |
285 | regulator-min-microvolt = <500000>; | |
286 | regulator-max-microvolt = <1500000>; | |
287 | regulator-boot-on; | |
288 | regulator-always-on; | |
289 | ti,vsel0-state-high; | |
290 | ti,vsel1-state-high; | |
291 | }; | |
d7df69fe BW |
292 | }; |
293 | ||
294 | spi@7000da00 { | |
295 | status = "okay"; | |
296 | spi-max-frequency = <25000000>; | |
297 | spi-flash@1 { | |
298 | compatible = "winbond,w25q32"; | |
299 | reg = <1>; | |
300 | spi-max-frequency = <20000000>; | |
301 | }; | |
302 | }; | |
303 | ||
58ecb23f | 304 | pmc@7000e400 { |
d7df69fe BW |
305 | status = "okay"; |
306 | nvidia,invert-interrupt; | |
47d2d63b | 307 | nvidia,suspend-mode = <1>; |
a44a019d JL |
308 | nvidia,cpu-pwr-good-time = <2000>; |
309 | nvidia,cpu-pwr-off-time = <200>; | |
310 | nvidia,core-pwr-good-time = <3845 3845>; | |
311 | nvidia,core-pwr-off-time = <0>; | |
312 | nvidia,core-power-req-active-high; | |
313 | nvidia,sys-clock-req-active-high; | |
d7df69fe BW |
314 | }; |
315 | ||
57899053 SW |
316 | ahub@70080000 { |
317 | i2s@70080400 { | |
318 | status = "okay"; | |
319 | }; | |
320 | }; | |
321 | ||
d7df69fe BW |
322 | sdhci@78000000 { |
323 | status = "okay"; | |
3325f1bc SW |
324 | cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; |
325 | wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>; | |
326 | power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>; | |
d7df69fe BW |
327 | bus-width = <4>; |
328 | }; | |
329 | ||
330 | sdhci@78000600 { | |
331 | status = "okay"; | |
332 | bus-width = <8>; | |
7a2617a6 | 333 | non-removable; |
d7df69fe BW |
334 | }; |
335 | ||
4c696500 EB |
336 | usb@7d004000 { |
337 | status = "okay"; | |
338 | }; | |
339 | ||
340 | phy2: usb-phy@7d004000 { | |
341 | vbus-supply = <&sys_3v3_reg>; | |
342 | status = "okay"; | |
343 | }; | |
344 | ||
cc34c9f7 TT |
345 | usb@7d008000 { |
346 | status = "okay"; | |
347 | }; | |
348 | ||
349 | usb-phy@7d008000 { | |
350 | vbus-supply = <&usb3_vbus_reg>; | |
351 | status = "okay"; | |
352 | }; | |
353 | ||
7021d122 JL |
354 | clocks { |
355 | compatible = "simple-bus"; | |
356 | #address-cells = <1>; | |
357 | #size-cells = <0>; | |
358 | ||
58ecb23f | 359 | clk32k_in: clock@0 { |
7021d122 JL |
360 | compatible = "fixed-clock"; |
361 | reg=<0>; | |
362 | #clock-cells = <0>; | |
363 | clock-frequency = <32768>; | |
364 | }; | |
365 | }; | |
366 | ||
57899053 SW |
367 | gpio-leds { |
368 | compatible = "gpio-leds"; | |
369 | ||
370 | gpled1 { | |
371 | label = "LED1"; /* CR5A1 (blue) */ | |
372 | gpios = <&gpio TEGRA_GPIO(L, 1) GPIO_ACTIVE_HIGH>; | |
373 | }; | |
374 | gpled2 { | |
375 | label = "LED2"; /* CR4A2 (green) */ | |
376 | gpios = <&gpio TEGRA_GPIO(L, 0) GPIO_ACTIVE_HIGH>; | |
377 | }; | |
378 | }; | |
379 | ||
d7df69fe BW |
380 | regulators { |
381 | compatible = "simple-bus"; | |
382 | #address-cells = <1>; | |
383 | #size-cells = <0>; | |
384 | ||
385 | vdd_5v_in_reg: regulator@0 { | |
386 | compatible = "regulator-fixed"; | |
387 | reg = <0>; | |
388 | regulator-name = "vdd_5v_in"; | |
389 | regulator-min-microvolt = <5000000>; | |
390 | regulator-max-microvolt = <5000000>; | |
391 | regulator-always-on; | |
392 | }; | |
393 | ||
394 | chargepump_5v_reg: regulator@1 { | |
395 | compatible = "regulator-fixed"; | |
396 | reg = <1>; | |
397 | regulator-name = "chargepump_5v"; | |
398 | regulator-min-microvolt = <5000000>; | |
399 | regulator-max-microvolt = <5000000>; | |
400 | regulator-boot-on; | |
401 | regulator-always-on; | |
402 | enable-active-high; | |
3325f1bc | 403 | gpio = <&pmic 0 GPIO_ACTIVE_HIGH>; |
d7df69fe BW |
404 | }; |
405 | ||
406 | ddr_reg: regulator@2 { | |
407 | compatible = "regulator-fixed"; | |
408 | reg = <2>; | |
409 | regulator-name = "vdd_ddr"; | |
410 | regulator-min-microvolt = <1500000>; | |
411 | regulator-max-microvolt = <1500000>; | |
412 | regulator-always-on; | |
413 | regulator-boot-on; | |
414 | enable-active-high; | |
3325f1bc | 415 | gpio = <&pmic 7 GPIO_ACTIVE_HIGH>; |
d7df69fe BW |
416 | vin-supply = <&vdd_5v_in_reg>; |
417 | }; | |
418 | ||
419 | vdd_5v_sata_reg: regulator@3 { | |
420 | compatible = "regulator-fixed"; | |
421 | reg = <3>; | |
422 | regulator-name = "vdd_5v_sata"; | |
423 | regulator-min-microvolt = <5000000>; | |
424 | regulator-max-microvolt = <5000000>; | |
425 | regulator-always-on; | |
426 | regulator-boot-on; | |
427 | enable-active-high; | |
3325f1bc | 428 | gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>; |
d7df69fe BW |
429 | vin-supply = <&vdd_5v_in_reg>; |
430 | }; | |
431 | ||
432 | usb1_vbus_reg: regulator@4 { | |
433 | compatible = "regulator-fixed"; | |
434 | reg = <4>; | |
435 | regulator-name = "usb1_vbus"; | |
436 | regulator-min-microvolt = <5000000>; | |
437 | regulator-max-microvolt = <5000000>; | |
438 | enable-active-high; | |
cc34c9f7 | 439 | gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>; |
d7df69fe BW |
440 | gpio-open-drain; |
441 | vin-supply = <&vdd_5v_in_reg>; | |
442 | }; | |
443 | ||
444 | usb3_vbus_reg: regulator@5 { | |
445 | compatible = "regulator-fixed"; | |
446 | reg = <5>; | |
447 | regulator-name = "usb3_vbus"; | |
448 | regulator-min-microvolt = <5000000>; | |
449 | regulator-max-microvolt = <5000000>; | |
450 | enable-active-high; | |
cc34c9f7 | 451 | gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>; |
d7df69fe BW |
452 | gpio-open-drain; |
453 | vin-supply = <&vdd_5v_in_reg>; | |
454 | }; | |
455 | ||
456 | sys_3v3_reg: regulator@6 { | |
457 | compatible = "regulator-fixed"; | |
458 | reg = <6>; | |
459 | regulator-name = "sys_3v3,vdd_3v3_alw"; | |
460 | regulator-min-microvolt = <3300000>; | |
461 | regulator-max-microvolt = <3300000>; | |
462 | regulator-always-on; | |
463 | regulator-boot-on; | |
464 | enable-active-high; | |
3325f1bc | 465 | gpio = <&pmic 6 GPIO_ACTIVE_HIGH>; |
d7df69fe BW |
466 | vin-supply = <&vdd_5v_in_reg>; |
467 | }; | |
468 | ||
469 | sys_3v3_pexs_reg: regulator@7 { | |
470 | compatible = "regulator-fixed"; | |
471 | reg = <7>; | |
472 | regulator-name = "sys_3v3_pexs"; | |
473 | regulator-min-microvolt = <3300000>; | |
474 | regulator-max-microvolt = <3300000>; | |
475 | regulator-always-on; | |
476 | regulator-boot-on; | |
477 | enable-active-high; | |
3325f1bc | 478 | gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>; |
d7df69fe BW |
479 | vin-supply = <&sys_3v3_reg>; |
480 | }; | |
481 | }; | |
b4dd3e0c | 482 | |
23037bbd SW |
483 | sound { |
484 | compatible = "nvidia,tegra-audio-rt5640-beaver", | |
485 | "nvidia,tegra-audio-rt5640"; | |
486 | nvidia,model = "NVIDIA Tegra Beaver"; | |
487 | ||
488 | nvidia,audio-routing = | |
489 | "Headphones", "HPOR", | |
ac472284 SW |
490 | "Headphones", "HPOL", |
491 | "Mic Jack", "MICBIAS1", | |
492 | "IN2P", "Mic Jack"; | |
23037bbd SW |
493 | |
494 | nvidia,i2s-controller = <&tegra_i2s1>; | |
495 | nvidia,audio-codec = <&rt5640>; | |
496 | ||
497 | nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; | |
498 | ||
499 | clocks = <&tegra_car TEGRA30_CLK_PLL_A>, | |
500 | <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, | |
501 | <&tegra_car TEGRA30_CLK_EXTERN1>; | |
502 | clock-names = "pll_a", "pll_a_out0", "mclk"; | |
503 | }; | |
d7df69fe | 504 | }; |