[deliverable/linux.git] / arch / arm / boot / dts / tegra30-cardhu.dtsi

/include/ "tegra30.dtsi"

/**
 * This file contains common DT entry for all fab version of Cardhu.
 * There is multiple fab version of Cardhu starting from A01 to A07.
 * Cardhu fab version A01 and A03 are not supported. Cardhu fab version
 * A02 will have different sets of GPIOs for fixed regulator compare to
 * Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
 * compatible with fab version A04. Based on Cardhu fab version, the
 * related dts file need to be chosen like for Cardhu fab version A02,
 * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
 * tegra30-cardhu-a04.dts.
 * The identification of board is done in two ways, by looking the sticker
 * on PCB and by reading board id eeprom.
 * The stciker will have number like 600-81291-1000-002 C.3. In this 4th
 * number is the fab version like here it is 002 and hence fab version A02.
 * The (downstream internal) U-Boot of Cardhu display the board-id as
 * follows:
 * BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
 * In this Fab version is 02 i.e. A02.
 * The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
 * The location 0x8 of this eeprom contains the Fab version. It is 1 byte
 * wide.
 */

/ {
	model = "NVIDIA Tegra30 Cardhu evaluation board";
	compatible = "nvidia,cardhu", "nvidia,tegra30";

	memory {
		reg = <0x80000000 0x40000000>;
	};

	pinmux {
		pinctrl-names = "default";
		pinctrl-0 = <&state_default>;

		state_default: pinmux {
			sdmmc1_clk_pz0 {
				nvidia,pins = "sdmmc1_clk_pz0";
				nvidia,function = "sdmmc1";
				nvidia,pull = <0>;
				nvidia,tristate = <0>;
			};
			sdmmc1_cmd_pz1 {
				nvidia,pins =	"sdmmc1_cmd_pz1",
						"sdmmc1_dat0_py7",
						"sdmmc1_dat1_py6",
						"sdmmc1_dat2_py5",
						"sdmmc1_dat3_py4";
				nvidia,function = "sdmmc1";
				nvidia,pull = <2>;
				nvidia,tristate = <0>;
			};
			sdmmc4_clk_pcc4 {
				nvidia,pins =	"sdmmc4_clk_pcc4",
						"sdmmc4_rst_n_pcc3";
				nvidia,function = "sdmmc4";
				nvidia,pull = <0>;
				nvidia,tristate = <0>;
			};
			sdmmc4_dat0_paa0 {
				nvidia,pins =	"sdmmc4_dat0_paa0",
						"sdmmc4_dat1_paa1",
						"sdmmc4_dat2_paa2",
						"sdmmc4_dat3_paa3",
						"sdmmc4_dat4_paa4",
						"sdmmc4_dat5_paa5",
						"sdmmc4_dat6_paa6",
						"sdmmc4_dat7_paa7";
				nvidia,function = "sdmmc4";
				nvidia,pull = <2>;
				nvidia,tristate = <0>;
			};
			dap2_fs_pa2 {
				nvidia,pins =	"dap2_fs_pa2",
						"dap2_sclk_pa3",
						"dap2_din_pa4",
						"dap2_dout_pa5";
				nvidia,function = "i2s1";
				nvidia,pull = <0>;
				nvidia,tristate = <0>;
			};
		};
	};

	serial@70006000 {
		status = "okay";
		clock-frequency = <408000000>;
	};

	i2c@7000c000 {
		status = "okay";
		clock-frequency = <100000>;
	};

	i2c@7000c400 {
		status = "okay";
		clock-frequency = <100000>;
	};

	i2c@7000c500 {
		status = "okay";
		clock-frequency = <100000>;

		/* ALS and Proximity sensor */
		isl29028@44 {
			compatible = "isil,isl29028";
			reg = <0x44>;
			interrupt-parent = <&gpio>;
			interrupts = <88 0x04>; /*gpio PL0 */
		};
	};

	i2c@7000c700 {
		status = "okay";
		clock-frequency = <100000>;
	};

	i2c@7000d000 {
		status = "okay";
		clock-frequency = <100000>;

		wm8903: wm8903@1a {
			compatible = "wlf,wm8903";
			reg = <0x1a>;
			interrupt-parent = <&gpio>;
			interrupts = <179 0x04>; /* gpio PW3 */

			gpio-controller;
			#gpio-cells = <2>;

			micdet-cfg = <0>;
			micdet-delay = <100>;
			gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
		};

		tps62361 {
			compatible = "ti,tps62361";
			reg = <0x60>;

			regulator-name = "tps62361-vout";
			regulator-min-microvolt = <500000>;
			regulator-max-microvolt = <1500000>;
			regulator-boot-on;
			regulator-always-on;
			ti,vsel0-state-high;
			ti,vsel1-state-high;
		};

		pmic: tps65911@2d {
			compatible = "ti,tps65911";
			reg = <0x2d>;

			interrupts = <0 86 0x4>;
			#interrupt-cells = <2>;
			interrupt-controller;

			#gpio-cells = <2>;
			gpio-controller;

			vcc1-supply = <&vdd_ac_bat_reg>;
			vcc2-supply = <&vdd_ac_bat_reg>;
			vcc3-supply = <&vio_reg>;
			vcc4-supply = <&vdd_5v0_reg>;
			vcc5-supply = <&vdd_ac_bat_reg>;
			vcc6-supply = <&vdd2_reg>;
			vcc7-supply = <&vdd_ac_bat_reg>;
			vccio-supply = <&vdd_ac_bat_reg>;

			regulators {
				#address-cells = <1>;
				#size-cells = <0>;

				vdd1_reg: regulator@0 {
					reg = <0>;
					regulator-compatible = "vdd1";
					regulator-name = "vddio_ddr_1v2";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
					regulator-always-on;
				};

				vdd2_reg: regulator@1 {
					reg = <1>;
					regulator-compatible = "vdd2";
					regulator-name = "vdd_1v5_gen";
					regulator-min-microvolt = <1500000>;
					regulator-max-microvolt = <1500000>;
					regulator-always-on;
				};

				vddctrl_reg: regulator@2 {
					reg = <2>;
					regulator-compatible = "vddctrl";
					regulator-name = "vdd_cpu,vdd_sys";
					regulator-min-microvolt = <1000000>;
					regulator-max-microvolt = <1000000>;
					regulator-always-on;
				};

				vio_reg: regulator@3 {
					reg = <3>;
					regulator-compatible = "vio";
					regulator-name = "vdd_1v8_gen";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
				};

				ldo1_reg: regulator@4 {
					reg = <4>;
					regulator-compatible = "ldo1";
					regulator-name = "vdd_pexa,vdd_pexb";
					regulator-min-microvolt = <1050000>;
					regulator-max-microvolt = <1050000>;
				};

				ldo2_reg: regulator@5 {
					reg = <5>;
					regulator-compatible = "ldo2";
					regulator-name = "vdd_sata,avdd_plle";
					regulator-min-microvolt = <1050000>;
					regulator-max-microvolt = <1050000>;
				};

				/* LDO3 is not connected to anything */

				ldo4_reg: regulator@7 {
					reg = <7>;
					regulator-compatible = "ldo4";
					regulator-name = "vdd_rtc";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
					regulator-always-on;
				};

				ldo5_reg: regulator@8 {
					reg = <8>;
					regulator-compatible = "ldo5";
					regulator-name = "vddio_sdmmc,avdd_vdac";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					regulator-always-on;
				};

				ldo6_reg: regulator@9 {
					reg = <9>;
					regulator-compatible = "ldo6";
					regulator-name = "avdd_dsi_csi,pwrdet_mipi";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
				};

				ldo7_reg: regulator@10 {
					reg = <10>;
					regulator-compatible = "ldo7";
					regulator-name = "vdd_pllm,x,u,a_p_c_s";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
					regulator-always-on;
				};

				ldo8_reg: regulator@11 {
					reg = <11>;
					regulator-compatible = "ldo8";
					regulator-name = "vdd_ddr_hs";
					regulator-min-microvolt = <1000000>;
					regulator-max-microvolt = <1000000>;
					regulator-always-on;
				};
			};
		};
	};

	ahub {
		i2s@70080400 {
			status = "okay";
		};
	};

	pmc {
		status = "okay";
		nvidia,invert-interrupt;
	};

	sdhci@78000000 {
		status = "okay";
		cd-gpios = <&gpio 69 0>; /* gpio PI5 */
		wp-gpios = <&gpio 155 0>; /* gpio PT3 */
		power-gpios = <&gpio 31 0>; /* gpio PD7 */
		bus-width = <4>;
	};

	sdhci@78000600 {
		status = "okay";
		bus-width = <8>;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		vdd_ac_bat_reg: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "vdd_ac_bat";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			regulator-always-on;
		};

		cam_1v8_reg: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "cam_1v8";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			enable-active-high;
			gpio = <&gpio 220 0>; /* gpio PBB4 */
			vin-supply = <&vio_reg>;
		};

		cp_5v_reg: regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "cp_5v";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			regulator-boot-on;
			regulator-always-on;
			enable-active-high;
			gpio = <&pmic 0 0>; /* PMIC TPS65911 GPIO0 */
		};

		emmc_3v3_reg: regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			regulator-name = "emmc_3v3";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
			regulator-boot-on;
			enable-active-high;
			gpio = <&gpio 25 0>; /* gpio PD1 */
			vin-supply = <&sys_3v3_reg>;
		};

		modem_3v3_reg: regulator@4 {
			compatible = "regulator-fixed";
			reg = <4>;
			regulator-name = "modem_3v3";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			enable-active-high;
			gpio = <&gpio 30 0>; /* gpio PD6 */
		};

		pex_hvdd_3v3_reg: regulator@5 {
			compatible = "regulator-fixed";
			reg = <5>;
			regulator-name = "pex_hvdd_3v3";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			enable-active-high;
			gpio = <&gpio 95 0>; /* gpio PL7 */
			vin-supply = <&sys_3v3_reg>;
		};

		vdd_cam1_ldo_reg: regulator@6 {
			compatible = "regulator-fixed";
			reg = <6>;
			regulator-name = "vdd_cam1_ldo";
			regulator-min-microvolt = <2800000>;
			regulator-max-microvolt = <2800000>;
			enable-active-high;
			gpio = <&gpio 142 0>; /* gpio PR6 */
			vin-supply = <&sys_3v3_reg>;
		};

		vdd_cam2_ldo_reg: regulator@7 {
			compatible = "regulator-fixed";
			reg = <7>;
			regulator-name = "vdd_cam2_ldo";
			regulator-min-microvolt = <2800000>;
			regulator-max-microvolt = <2800000>;
			enable-active-high;
			gpio = <&gpio 143 0>; /* gpio PR7 */
			vin-supply = <&sys_3v3_reg>;
		};

		vdd_cam3_ldo_reg: regulator@8 {
			compatible = "regulator-fixed";
			reg = <8>;
			regulator-name = "vdd_cam3_ldo";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			enable-active-high;
			gpio = <&gpio 144 0>; /* gpio PS0 */
			vin-supply = <&sys_3v3_reg>;
		};

		vdd_com_reg: regulator@9 {
			compatible = "regulator-fixed";
			reg = <9>;
			regulator-name = "vdd_com";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			enable-active-high;
			gpio = <&gpio 24 0>; /* gpio PD0 */
			vin-supply = <&sys_3v3_reg>;
		};

		vdd_fuse_3v3_reg: regulator@10 {
			compatible = "regulator-fixed";
			reg = <10>;
			regulator-name = "vdd_fuse_3v3";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			enable-active-high;
			gpio = <&gpio 94 0>; /* gpio PL6 */
			vin-supply = <&sys_3v3_reg>;
		};

		vdd_pnl1_reg: regulator@11 {
			compatible = "regulator-fixed";
			reg = <11>;
			regulator-name = "vdd_pnl1";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
			regulator-boot-on;
			enable-active-high;
			gpio = <&gpio 92 0>; /* gpio PL4 */
			vin-supply = <&sys_3v3_reg>;
		};

		vdd_vid_reg: regulator@12 {
			compatible = "regulator-fixed";
			reg = <12>;
			regulator-name = "vddio_vid";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			gpio = <&gpio 152 0>; /* GPIO PT0 */
			gpio-open-drain;
			vin-supply = <&vdd_5v0_reg>;
		};
	};

	sound {
		compatible = "nvidia,tegra-audio-wm8903-cardhu",
			     "nvidia,tegra-audio-wm8903";
		nvidia,model = "NVIDIA Tegra Cardhu";

		nvidia,audio-routing =
			"Headphone Jack", "HPOUTR",
			"Headphone Jack", "HPOUTL",
			"Int Spk", "ROP",
			"Int Spk", "RON",
			"Int Spk", "LOP",
			"Int Spk", "LON",
			"Mic Jack", "MICBIAS",
			"IN1L", "Mic Jack";

		nvidia,i2s-controller = <&tegra_i2s1>;
		nvidia,audio-codec = <&wm8903>;

		nvidia,spkr-en-gpios = <&wm8903 2 0>;
		nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
	};
};
Commit	Line	Data
64c4e9f8 PDS	1	/include/ "tegra30.dtsi"
64c4e9f8 PDS	2
640a7af5 LD	3	/**
	4	* This file contains common DT entry for all fab version of Cardhu.
	5	* There is multiple fab version of Cardhu starting from A01 to A07.
	6	* Cardhu fab version A01 and A03 are not supported. Cardhu fab version
	7	* A02 will have different sets of GPIOs for fixed regulator compare to
	8	* Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
	9	* compatible with fab version A04. Based on Cardhu fab version, the
	10	* related dts file need to be chosen like for Cardhu fab version A02,
	11	* use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
	12	* tegra30-cardhu-a04.dts.
	13	* The identification of board is done in two ways, by looking the sticker
	14	* on PCB and by reading board id eeprom.
	15	* The stciker will have number like 600-81291-1000-002 C.3. In this 4th
	16	* number is the fab version like here it is 002 and hence fab version A02.
	17	* The (downstream internal) U-Boot of Cardhu display the board-id as
	18	* follows:
	19	* BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
	20	* In this Fab version is 02 i.e. A02.
	21	* The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
	22	* The location 0x8 of this eeprom contains the Fab version. It is 1 byte
	23	* wide.
	24	*/
	25
64c4e9f8 PDS	26	/ {
	27	model = "NVIDIA Tegra30 Cardhu evaluation board";
	28	compatible = "nvidia,cardhu", "nvidia,tegra30";
	29
	30	memory {
95decf84	31	reg = <0x80000000 0x40000000>;
64c4e9f8 PDS	32	};
64c4e9f8 PDS	33
f9eb26a4	34	pinmux {
e5cbeef0 SW	35	pinctrl-names = "default";
	36	pinctrl-0 = <&state_default>;
	37
	38	state_default: pinmux {
	39	sdmmc1_clk_pz0 {
	40	nvidia,pins = "sdmmc1_clk_pz0";
	41	nvidia,function = "sdmmc1";
	42	nvidia,pull = <0>;
	43	nvidia,tristate = <0>;
	44	};
	45	sdmmc1_cmd_pz1 {
	46	nvidia,pins = "sdmmc1_cmd_pz1",
	47	"sdmmc1_dat0_py7",
	48	"sdmmc1_dat1_py6",
	49	"sdmmc1_dat2_py5",
	50	"sdmmc1_dat3_py4";
	51	nvidia,function = "sdmmc1";
	52	nvidia,pull = <2>;
	53	nvidia,tristate = <0>;
	54	};
	55	sdmmc4_clk_pcc4 {
	56	nvidia,pins = "sdmmc4_clk_pcc4",
	57	"sdmmc4_rst_n_pcc3";
	58	nvidia,function = "sdmmc4";
	59	nvidia,pull = <0>;
	60	nvidia,tristate = <0>;
	61	};
	62	sdmmc4_dat0_paa0 {
	63	nvidia,pins = "sdmmc4_dat0_paa0",
	64	"sdmmc4_dat1_paa1",
	65	"sdmmc4_dat2_paa2",
	66	"sdmmc4_dat3_paa3",
	67	"sdmmc4_dat4_paa4",
	68	"sdmmc4_dat5_paa5",
	69	"sdmmc4_dat6_paa6",
	70	"sdmmc4_dat7_paa7";
	71	nvidia,function = "sdmmc4";
	72	nvidia,pull = <2>;
	73	nvidia,tristate = <0>;
	74	};
8c6a3852 SW	75	dap2_fs_pa2 {
	76	nvidia,pins = "dap2_fs_pa2",
	77	"dap2_sclk_pa3",
	78	"dap2_din_pa4",
	79	"dap2_dout_pa5";
	80	nvidia,function = "i2s1";
	81	nvidia,pull = <0>;
	82	nvidia,tristate = <0>;
	83	};
e5cbeef0 SW	84	};
	85	};
	86
64c4e9f8	87	serial@70006000 {
2a5fdc9a	88	status = "okay";
95decf84	89	clock-frequency = <408000000>;
64c4e9f8 PDS	90	};
	91
	92	i2c@7000c000 {
2a5fdc9a	93	status = "okay";
64c4e9f8 PDS	94	clock-frequency = <100000>;
	95	};
	96
	97	i2c@7000c400 {
2a5fdc9a	98	status = "okay";
64c4e9f8 PDS	99	clock-frequency = <100000>;
	100	};
	101
	102	i2c@7000c500 {
2a5fdc9a	103	status = "okay";
64c4e9f8	104	clock-frequency = <100000>;
b46b0b54 LD	105
	106	/* ALS and Proximity sensor */
	107	isl29028@44 {
	108	compatible = "isil,isl29028";
	109	reg = <0x44>;
	110	interrupt-parent = <&gpio>;
	111	interrupts = <88 0x04>; /gpio PL0 /
	112	};
64c4e9f8 PDS	113	};
	114
	115	i2c@7000c700 {
2a5fdc9a	116	status = "okay";
64c4e9f8 PDS	117	clock-frequency = <100000>;
	118	};
	119
	120	i2c@7000d000 {
2a5fdc9a	121	status = "okay";
64c4e9f8	122	clock-frequency = <100000>;
8c6a3852 SW	123
	124	wm8903: wm8903@1a {
	125	compatible = "wlf,wm8903";
	126	reg = <0x1a>;
	127	interrupt-parent = <&gpio>;
	128	interrupts = <179 0x04>; /* gpio PW3 */
	129
	130	gpio-controller;
	131	#gpio-cells = <2>;
	132
	133	micdet-cfg = <0>;
	134	micdet-delay = <100>;
	135	gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
	136	};
331da58c LD	137
	138	tps62361 {
	139	compatible = "ti,tps62361";
	140	reg = <0x60>;
	141
	142	regulator-name = "tps62361-vout";
	143	regulator-min-microvolt = <500000>;
	144	regulator-max-microvolt = <1500000>;
	145	regulator-boot-on;
	146	regulator-always-on;
	147	ti,vsel0-state-high;
	148	ti,vsel1-state-high;
	149	};
167e6279 LD	150
	151	pmic: tps65911@2d {
	152	compatible = "ti,tps65911";
	153	reg = <0x2d>;
	154
	155	interrupts = <0 86 0x4>;
	156	#interrupt-cells = <2>;
	157	interrupt-controller;
	158
	159	#gpio-cells = <2>;
	160	gpio-controller;
	161
	162	vcc1-supply = <&vdd_ac_bat_reg>;
	163	vcc2-supply = <&vdd_ac_bat_reg>;
	164	vcc3-supply = <&vio_reg>;
fa4a9252	165	vcc4-supply = <&vdd_5v0_reg>;
167e6279 LD	166	vcc5-supply = <&vdd_ac_bat_reg>;
	167	vcc6-supply = <&vdd2_reg>;
	168	vcc7-supply = <&vdd_ac_bat_reg>;
	169	vccio-supply = <&vdd_ac_bat_reg>;
	170
	171	regulators {
	172	#address-cells = <1>;
	173	#size-cells = <0>;
	174
	175	vdd1_reg: regulator@0 {
	176	reg = <0>;
	177	regulator-compatible = "vdd1";
	178	regulator-name = "vddio_ddr_1v2";
	179	regulator-min-microvolt = <1200000>;
	180	regulator-max-microvolt = <1200000>;
	181	regulator-always-on;
	182	};
	183
	184	vdd2_reg: regulator@1 {
	185	reg = <1>;
	186	regulator-compatible = "vdd2";
	187	regulator-name = "vdd_1v5_gen";
	188	regulator-min-microvolt = <1500000>;
	189	regulator-max-microvolt = <1500000>;
	190	regulator-always-on;
	191	};
	192
	193	vddctrl_reg: regulator@2 {
	194	reg = <2>;
	195	regulator-compatible = "vddctrl";
	196	regulator-name = "vdd_cpu,vdd_sys";
	197	regulator-min-microvolt = <1000000>;
	198	regulator-max-microvolt = <1000000>;
	199	regulator-always-on;
	200	};
	201
	202	vio_reg: regulator@3 {
	203	reg = <3>;
	204	regulator-compatible = "vio";
	205	regulator-name = "vdd_1v8_gen";
	206	regulator-min-microvolt = <1800000>;
	207	regulator-max-microvolt = <1800000>;
	208	regulator-always-on;
	209	};
	210
	211	ldo1_reg: regulator@4 {
	212	reg = <4>;
	213	regulator-compatible = "ldo1";
	214	regulator-name = "vdd_pexa,vdd_pexb";
	215	regulator-min-microvolt = <1050000>;
	216	regulator-max-microvolt = <1050000>;
	217	};
	218
	219	ldo2_reg: regulator@5 {
	220	reg = <5>;
	221	regulator-compatible = "ldo2";
	222	regulator-name = "vdd_sata,avdd_plle";
	223	regulator-min-microvolt = <1050000>;
	224	regulator-max-microvolt = <1050000>;
	225	};
	226
	227	/* LDO3 is not connected to anything */
	228
	229	ldo4_reg: regulator@7 {
230	reg = <7>;
231	regulator-compatible = "ldo4";
232	regulator-name = "vdd_rtc";
233	regulator-min-microvolt = <1200000>;
234	regulator-max-microvolt = <1200000>;
235	regulator-always-on;
236	};
237
fa4a9252 LD	238	ldo5_reg: regulator@8 {
	239	reg = <8>;
	240	regulator-compatible = "ldo5";
	241	regulator-name = "vddio_sdmmc,avdd_vdac";
	242	regulator-min-microvolt = <3300000>;
	243	regulator-max-microvolt = <3300000>;
	244	regulator-always-on;
	245	};
	246
167e6279 LD	247	ldo6_reg: regulator@9 {
	248	reg = <9>;
	249	regulator-compatible = "ldo6";
	250	regulator-name = "avdd_dsi_csi,pwrdet_mipi";
	251	regulator-min-microvolt = <1200000>;
	252	regulator-max-microvolt = <1200000>;
	253	};
	254
	255	ldo7_reg: regulator@10 {
	256	reg = <10>;
	257	regulator-compatible = "ldo7";
	258	regulator-name = "vdd_pllm,x,u,a_p_c_s";
	259	regulator-min-microvolt = <1200000>;
	260	regulator-max-microvolt = <1200000>;
	261	regulator-always-on;
	262	};
	263
	264	ldo8_reg: regulator@11 {
	265	reg = <11>;
	266	regulator-compatible = "ldo8";
	267	regulator-name = "vdd_ddr_hs";
	268	regulator-min-microvolt = <1000000>;
	269	regulator-max-microvolt = <1000000>;
	270	regulator-always-on;
	271	};
	272	};
	273	};
64c4e9f8	274	};
850c4c8f	275
f9eb26a4	276	ahub {
2a5fdc9a SW	277	i2s@70080400 {
2a5fdc9a SW	278	status = "okay";
8c6a3852 SW	279	};
	280	};
	281
167e6279 LD	282	pmc {
	283	status = "okay";
	284	nvidia,invert-interrupt;
	285	};
	286
c04abb3a	287	sdhci@78000000 {
2a5fdc9a	288	status = "okay";
c04abb3a SW	289	cd-gpios = <&gpio 69 0>; /* gpio PI5 */
	290	wp-gpios = <&gpio 155 0>; /* gpio PT3 */
	291	power-gpios = <&gpio 31 0>; /* gpio PD7 */
7f217794	292	bus-width = <4>;
c04abb3a SW	293	};
c04abb3a SW	294
c04abb3a	295	sdhci@78000600 {
2a5fdc9a	296	status = "okay";
7f217794	297	bus-width = <8>;
c04abb3a SW	298	};
c04abb3a SW	299
167e6279 LD	300	regulators {
	301	compatible = "simple-bus";
	302	#address-cells = <1>;
	303	#size-cells = <0>;
	304
	305	vdd_ac_bat_reg: regulator@0 {
	306	compatible = "regulator-fixed";
	307	reg = <0>;
	308	regulator-name = "vdd_ac_bat";
	309	regulator-min-microvolt = <5000000>;
	310	regulator-max-microvolt = <5000000>;
	311	regulator-always-on;
	312	};
fa4a9252 LD	313
	314	cam_1v8_reg: regulator@1 {
	315	compatible = "regulator-fixed";
	316	reg = <1>;
	317	regulator-name = "cam_1v8";
	318	regulator-min-microvolt = <1800000>;
	319	regulator-max-microvolt = <1800000>;
	320	enable-active-high;
	321	gpio = <&gpio 220 0>; /* gpio PBB4 */
	322	vin-supply = <&vio_reg>;
	323	};
	324
	325	cp_5v_reg: regulator@2 {
	326	compatible = "regulator-fixed";
	327	reg = <2>;
	328	regulator-name = "cp_5v";
	329	regulator-min-microvolt = <5000000>;
	330	regulator-max-microvolt = <5000000>;
	331	regulator-boot-on;
	332	regulator-always-on;
	333	enable-active-high;
	334	gpio = <&pmic 0 0>; /* PMIC TPS65911 GPIO0 */
	335	};
	336
	337	emmc_3v3_reg: regulator@3 {
	338	compatible = "regulator-fixed";
	339	reg = <3>;
	340	regulator-name = "emmc_3v3";
	341	regulator-min-microvolt = <3300000>;
	342	regulator-max-microvolt = <3300000>;
	343	regulator-always-on;
	344	regulator-boot-on;
	345	enable-active-high;
	346	gpio = <&gpio 25 0>; /* gpio PD1 */
	347	vin-supply = <&sys_3v3_reg>;
	348	};
	349
	350	modem_3v3_reg: regulator@4 {
	351	compatible = "regulator-fixed";
	352	reg = <4>;
	353	regulator-name = "modem_3v3";
	354	regulator-min-microvolt = <3300000>;
	355	regulator-max-microvolt = <3300000>;
	356	enable-active-high;
	357	gpio = <&gpio 30 0>; /* gpio PD6 */
	358	};
	359
	360	pex_hvdd_3v3_reg: regulator@5 {
	361	compatible = "regulator-fixed";
	362	reg = <5>;
	363	regulator-name = "pex_hvdd_3v3";
	364	regulator-min-microvolt = <3300000>;
	365	regulator-max-microvolt = <3300000>;
	366	enable-active-high;
	367	gpio = <&gpio 95 0>; /* gpio PL7 */
	368	vin-supply = <&sys_3v3_reg>;
	369	};
	370
	371	vdd_cam1_ldo_reg: regulator@6 {
	372	compatible = "regulator-fixed";
	373	reg = <6>;
	374	regulator-name = "vdd_cam1_ldo";
	375	regulator-min-microvolt = <2800000>;
	376	regulator-max-microvolt = <2800000>;
377	enable-active-high;
378	gpio = <&gpio 142 0>; /* gpio PR6 */
379	vin-supply = <&sys_3v3_reg>;
380	};
381
382	vdd_cam2_ldo_reg: regulator@7 {
383	compatible = "regulator-fixed";
384	reg = <7>;
385	regulator-name = "vdd_cam2_ldo";
386	regulator-min-microvolt = <2800000>;
387	regulator-max-microvolt = <2800000>;
388	enable-active-high;
389	gpio = <&gpio 143 0>; /* gpio PR7 */
390	vin-supply = <&sys_3v3_reg>;
391	};
392
393	vdd_cam3_ldo_reg: regulator@8 {
394	compatible = "regulator-fixed";
395	reg = <8>;
396	regulator-name = "vdd_cam3_ldo";
397	regulator-min-microvolt = <3300000>;
398	regulator-max-microvolt = <3300000>;
399	enable-active-high;
400	gpio = <&gpio 144 0>; /* gpio PS0 */
401	vin-supply = <&sys_3v3_reg>;
402	};
403
404	vdd_com_reg: regulator@9 {
405	compatible = "regulator-fixed";
406	reg = <9>;
407	regulator-name = "vdd_com";
408	regulator-min-microvolt = <3300000>;
409	regulator-max-microvolt = <3300000>;
410	enable-active-high;
411	gpio = <&gpio 24 0>; /* gpio PD0 */
412	vin-supply = <&sys_3v3_reg>;
413	};
414
415	vdd_fuse_3v3_reg: regulator@10 {
416	compatible = "regulator-fixed";
417	reg = <10>;
418	regulator-name = "vdd_fuse_3v3";
419	regulator-min-microvolt = <3300000>;
420	regulator-max-microvolt = <3300000>;
421	enable-active-high;
422	gpio = <&gpio 94 0>; /* gpio PL6 */
423	vin-supply = <&sys_3v3_reg>;
424	};
425
426	vdd_pnl1_reg: regulator@11 {
427	compatible = "regulator-fixed";
428	reg = <11>;
429	regulator-name = "vdd_pnl1";
430	regulator-min-microvolt = <3300000>;
431	regulator-max-microvolt = <3300000>;
432	regulator-always-on;
433	regulator-boot-on;
434	enable-active-high;
435	gpio = <&gpio 92 0>; /* gpio PL4 */
436	vin-supply = <&sys_3v3_reg>;
437	};
438
439	vdd_vid_reg: regulator@12 {
440	compatible = "regulator-fixed";
441	reg = <12>;
442	regulator-name = "vddio_vid";
443	regulator-min-microvolt = <5000000>;
444	regulator-max-microvolt = <5000000>;
445	enable-active-high;
446	gpio = <&gpio 152 0>; /* GPIO PT0 */
447	gpio-open-drain;
448	vin-supply = <&vdd_5v0_reg>;
449	};
167e6279 LD	450	};
167e6279 LD	451
8c6a3852 SW	452	sound {
	453	compatible = "nvidia,tegra-audio-wm8903-cardhu",
	454	"nvidia,tegra-audio-wm8903";
	455	nvidia,model = "NVIDIA Tegra Cardhu";
	456
	457	nvidia,audio-routing =
	458	"Headphone Jack", "HPOUTR",
	459	"Headphone Jack", "HPOUTL",
	460	"Int Spk", "ROP",
	461	"Int Spk", "RON",
	462	"Int Spk", "LOP",
	463	"Int Spk", "LON",
	464	"Mic Jack", "MICBIAS",
	465	"IN1L", "Mic Jack";
	466
	467	nvidia,i2s-controller = <&tegra_i2s1>;
	468	nvidia,audio-codec = <&wm8903>;
	469
	470	nvidia,spkr-en-gpios = <&wm8903 2 0>;
	471	nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
	472	};
64c4e9f8	473	};