projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ARM: dts: imx6q: enable dma for ecspi5
[deliverable/linux.git] / arch / arm / boot / dts / vf610-twr.dts
CommitLineData
e77b74ee
JL		 1/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10/dts-v1/;
11#include "vf610.dtsi"
12
13/ {
14 model = "VF610 Tower Board";
15 compatible = "fsl,vf610-twr", "fsl,vf610";
16
17 chosen {
18 bootargs = "console=ttyLP1,115200";
19 };
20
21 memory {
22 reg = <0x80000000 0x8000000>;
23 };
24
3f3ebfb8
SA		 25 audio_ext: mclk_osc {
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <24576000>;
29 };
e77b74ee 30
3f3ebfb8
SA		 31 enet_ext: eth_osc {
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <50000000>;
e77b74ee
JL		 35 };
36
c5d571e7
XL		 37 regulators {
38 compatible = "simple-bus";
39 #address-cells = <1>;
40 #size-cells = <0>;
41
42 reg_3p3v: regulator@0 {
43 compatible = "regulator-fixed";
44 reg = <0>;
45 regulator-name = "3P3V";
46 regulator-min-microvolt = <3300000>;
47 regulator-max-microvolt = <3300000>;
48 regulator-always-on;
49 };
64436ff6
FD		 50
51 reg_vcc_3v3_mcu: regulator@1 {
52 compatible = "regulator-fixed";
53 reg = <1>;
54 regulator-name = "vcc_3v3_mcu";
55 regulator-min-microvolt = <3300000>;
56 regulator-max-microvolt = <3300000>;
57 };
c5d571e7 58 };
8128c4f3
XL		 59
60 sound {
61 compatible = "simple-audio-card";
62 simple-audio-card,format = "i2s";
63 simple-audio-card,widgets =
64 "Microphone", "Microphone Jack",
65 "Headphone", "Headphone Jack",
66 "Speaker", "Speaker Ext",
67 "Line", "Line In Jack";
68 simple-audio-card,routing =
69 "MIC_IN", "Microphone Jack",
70 "Microphone Jack", "Mic Bias",
71 "LINE_IN", "Line In Jack",
72 "Headphone Jack", "HP_OUT",
73 "Speaker Ext", "LINE_OUT";
74
75 simple-audio-card,cpu {
76 sound-dai = <&sai2>;
8128c4f3
XL		 77 frame-master;
78 bitclock-master;
79 };
80
81 simple-audio-card,codec {
82 sound-dai = <&codec>;
83 frame-master;
84 bitclock-master;
85 };
86 };
e77b74ee
JL		 87};
88
64436ff6
FD		 89&adc0 {
90 pinctrl-names = "default";
91 pinctrl-0 = <&pinctrl_adc0_ad5>;
92 vref-supply = <&reg_vcc_3v3_mcu>;
93 status = "okay";
94};
95
3f3ebfb8
SA		 96&clks {
97 clocks = <&sxosc>, <&fxosc>, <&enet_ext>, <&audio_ext>;
98 clock-names = "sxosc", "fxosc", "enet_ext", "audio_ext";
99};
100
dc03a50f
CF		 101&dspi0 {
102 bus-num = <0>;
103 pinctrl-names = "default";
07ed1eed 104 pinctrl-0 = <&pinctrl_dspi0>;
dc03a50f
CF		 105 status = "okay";
106
107 sflash: at26df081a@0 {
108 #address-cells = <1>;
109 #size-cells = <1>;
110 compatible = "atmel,at26df081a";
111 spi-max-frequency = <16000000>;
112 spi-cpol;
113 spi-cpha;
114 reg = <0>;
115 };
116};
117
efb45b30
SA		 118&edma0 {
119 status = "okay";
120};
121
0517fe6a
CS		 122&esdhc1 {
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_esdhc1>;
125 bus-width = <4>;
2b36bda3 126 cd-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>;
0517fe6a
CS		 127 status = "okay";
128};
129
e77b74ee
JL		 130&fec0 {
131 phy-mode = "rmii";
132 pinctrl-names = "default";
07ed1eed 133 pinctrl-0 = <&pinctrl_fec0>;
e77b74ee
JL		 134 status = "okay";
135};
136
137&fec1 {
138 phy-mode = "rmii";
139 pinctrl-names = "default";
07ed1eed 140 pinctrl-0 = <&pinctrl_fec1>;
e77b74ee
JL		 141 status = "okay";
142};
143
d45393cd
JL		 144&i2c0 {
145 clock-frequency = <100000>;
146 pinctrl-names = "default";
07ed1eed 147 pinctrl-0 = <&pinctrl_i2c0>;
d45393cd 148 status = "okay";
c5d571e7
XL		 149
150 codec: sgtl5000@0a {
8128c4f3 151 #sound-dai-cells = <0>;
c5d571e7
XL		 152 compatible = "fsl,sgtl5000";
153 reg = <0x0a>;
154 VDDA-supply = <&reg_3p3v>;
155 VDDIO-supply = <&reg_3p3v>;
156 clocks = <&clks VF610_CLK_SAI2>;
157 };
d45393cd
JL		 158};
159
07ed1eed
SG		 160&iomuxc {
161 vf610-twr {
64436ff6
FD		 162 pinctrl_adc0_ad5: adc0ad5grp {
163 fsl,pins = <
164 VF610_PAD_PTC30__ADC0_SE5 0xa1
165 >;
166 };
167
07ed1eed
SG		 168 pinctrl_dspi0: dspi0grp {
169 fsl,pins = <
170 VF610_PAD_PTB19__DSPI0_CS0 0x1182
171 VF610_PAD_PTB20__DSPI0_SIN 0x1181
172 VF610_PAD_PTB21__DSPI0_SOUT 0x1182
173 VF610_PAD_PTB22__DSPI0_SCK 0x1182
174 >;
175 };
176
0517fe6a 177 pinctrl_esdhc1: esdhc1grp {
0aa4dcb5 178 fsl,pins = <
0517fe6a
CS		 179 VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
180 VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
181 VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
182 VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
183 VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
184 VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
185 VF610_PAD_PTA7__GPIO_134 0x219d
186 >;
187 };
188
07ed1eed
SG		 189 pinctrl_fec0: fec0grp {
190 fsl,pins = <
191 VF610_PAD_PTA6__RMII_CLKIN 0x30d1
192 VF610_PAD_PTC0__ENET_RMII0_MDC 0x30d3
193 VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d1
194 VF610_PAD_PTC2__ENET_RMII0_CRS 0x30d1
195 VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1
196 VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1
197 VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1
198 VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2
199 VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2
200 VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2
201 >;
202 };
203
204 pinctrl_fec1: fec1grp {
205 fsl,pins = <
206 VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2
207 VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3
208 VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1
209 VF610_PAD_PTC12__ENET_RMII_RXD1 0x30d1
210 VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1
211 VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1
212 VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2
213 VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2
214 VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2
215 >;
216 };
217
218 pinctrl_i2c0: i2c0grp {
219 fsl,pins = <
220 VF610_PAD_PTB14__I2C0_SCL 0x30d3
221 VF610_PAD_PTB15__I2C0_SDA 0x30d3
222 >;
223 };
224
f54c2fea
XL		 225 pinctrl_pwm0: pwm0grp {
226 fsl,pins = <
227 VF610_PAD_PTB0__FTM0_CH0 0x1582
228 VF610_PAD_PTB1__FTM0_CH1 0x1582
229 VF610_PAD_PTB2__FTM0_CH2 0x1582
230 VF610_PAD_PTB3__FTM0_CH3 0x1582
f54c2fea
XL		 231 >;
232 };
233
95b13b66
XL		 234 pinctrl_sai2: sai2grp {
235 fsl,pins = <
236 VF610_PAD_PTA16__SAI2_TX_BCLK 0x02ed
237 VF610_PAD_PTA18__SAI2_TX_DATA 0x02ee
238 VF610_PAD_PTA19__SAI2_TX_SYNC 0x02ed
239 VF610_PAD_PTA21__SAI2_RX_BCLK 0x02ed
240 VF610_PAD_PTA22__SAI2_RX_DATA 0x02ed
241 VF610_PAD_PTA23__SAI2_RX_SYNC 0x02ed
242 VF610_PAD_PTB18__EXT_AUDIO_MCLK 0x02ed
243 >;
244 };
245
07ed1eed
SG		 246 pinctrl_uart1: uart1grp {
247 fsl,pins = <
248 VF610_PAD_PTB4__UART1_TX 0x21a2
249 VF610_PAD_PTB5__UART1_RX 0x21a1
250 >;
251 };
d8c99930
BP		 252
253 pinctrl_uart2: uart2grp {
254 fsl,pins = <
255 VF610_PAD_PTB6__UART2_TX 0x21a2
256 VF610_PAD_PTB7__UART2_RX 0x21a1
257 >;
258 };
07ed1eed
SG		 259 };
260};
261
266a71b3
XL		 262&pwm0 {
263 pinctrl-names = "default";
264 pinctrl-0 = <&pinctrl_pwm0>;
265 status = "okay";
266};
267
95b13b66 268&sai2 {
8128c4f3 269 #sound-dai-cells = <0>;
95b13b66
XL		 270 pinctrl-names = "default";
271 pinctrl-0 = <&pinctrl_sai2>;
272 status = "okay";
273};
274
e77b74ee
JL		 275&uart1 {
276 pinctrl-names = "default";
07ed1eed 277 pinctrl-0 = <&pinctrl_uart1>;
e77b74ee
JL		 278 status = "okay";
279};
d8c99930
BP		 280
281&uart2 {
282 pinctrl-names = "default";
283 pinctrl-0 = <&pinctrl_uart2>;
284 status = "okay";
285};
49b2ae0c
SA		 286
287&usbdev0 {
288 disable-over-current;
289 status = "okay";
290};
291
292&usbh1 {
293 disable-over-current;
294 status = "okay";
295};
efb45b30 296
ac039cd9
SA		 297&usbmisc0 {
298 status = "okay";
299};
300
301&usbmisc1 {
302 status = "okay";
303};
304
efb45b30
SA		 305&usbphy0 {
306 status = "okay";
307};
308
309&usbphy1 {
310 status = "okay";
311};
Linux kernel - Deliverables
This page took 0.205364 seconds and 5 git commands to generate.