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1556063f CT |
1 | /* |
2 | * Copyright (C) 2015, 2016 Zodiac Inflight Innovations | |
3 | * | |
4 | * Based on an original 'vf610-twr.dts' which is Copyright 2015, | |
5 | * Freescale Semiconductor, Inc. | |
6 | * | |
7 | * This file is dual-licensed: you can use it either under the terms | |
8 | * of the GPL or the X11 license, at your option. Note that this dual | |
9 | * licensing only applies to this file, and not this project as a | |
10 | * whole. | |
11 | * | |
12 | * a) This file is free software; you can redistribute it and/or | |
13 | * modify it under the terms of the GNU General Public License | |
14 | * version 2 as published by the Free Software Foundation. | |
15 | * | |
16 | * This file is distributed in the hope that it will be useful | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * Or, alternatively | |
22 | * | |
23 | * b) Permission is hereby granted, free of charge, to any person | |
24 | * obtaining a copy of this software and associated documentation | |
25 | * files (the "Software"), to deal in the Software without | |
26 | * restriction, including without limitation the rights to use | |
27 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
28 | * sell copies of the Software, and to permit persons to whom the | |
29 | * Software is furnished to do so, subject to the following | |
30 | * conditions: | |
31 | * | |
32 | * The above copyright notice and this permission notice shall be | |
33 | * included in all copies or substantial portions of the Software. | |
34 | * | |
35 | * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND | |
36 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
37 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
38 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
39 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY | |
40 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
41 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
42 | * OTHER DEALINGS IN THE SOFTWARE. | |
43 | */ | |
44 | ||
45 | /dts-v1/; | |
46 | #include "vf610.dtsi" | |
47 | ||
48 | / { | |
49 | model = "ZII VF610 Development Board, Rev B"; | |
50 | compatible = "zii,vf610dev-b", "zii,vf610dev", "fsl,vf610"; | |
51 | ||
52 | chosen { | |
53 | stdout-path = "serial0:115200n8"; | |
54 | }; | |
55 | ||
56 | memory { | |
57 | reg = <0x80000000 0x20000000>; | |
58 | }; | |
59 | ||
60 | gpio-leds { | |
61 | compatible = "gpio-leds"; | |
62 | pinctrl-0 = <&pinctrl_leds_debug>; | |
63 | pinctrl-names = "default"; | |
64 | ||
65 | debug { | |
66 | label = "zii:green:debug1"; | |
67 | gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; | |
68 | linux,default-trigger = "heartbeat"; | |
69 | }; | |
70 | }; | |
71 | ||
72 | mdio-mux { | |
73 | compatible = "mdio-mux-gpio"; | |
74 | pinctrl-0 = <&pinctrl_mdio_mux>; | |
75 | pinctrl-names = "default"; | |
76 | gpios = <&gpio0 8 GPIO_ACTIVE_HIGH | |
77 | &gpio0 9 GPIO_ACTIVE_HIGH | |
78 | &gpio0 24 GPIO_ACTIVE_HIGH | |
79 | &gpio0 25 GPIO_ACTIVE_HIGH>; | |
80 | mdio-parent-bus = <&mdio1>; | |
81 | #address-cells = <1>; | |
82 | #size-cells = <0>; | |
83 | ||
84 | mdio_mux_1: mdio@1 { | |
85 | reg = <1>; | |
86 | #address-cells = <1>; | |
87 | #size-cells = <0>; | |
9dff6733 AL |
88 | |
89 | switch0: switch0@0 { | |
90 | compatible = "marvell,mv88e6085"; | |
91 | #address-cells = <1>; | |
92 | #size-cells = <0>; | |
93 | reg = <0>; | |
94 | dsa,member = <0 0>; | |
95 | ||
96 | ports { | |
97 | #address-cells = <1>; | |
98 | #size-cells = <0>; | |
99 | port@0 { | |
100 | reg = <0>; | |
101 | label = "lan0"; | |
102 | }; | |
103 | ||
104 | port@1 { | |
105 | reg = <1>; | |
106 | label = "lan1"; | |
107 | }; | |
108 | ||
109 | port@2 { | |
110 | reg = <2>; | |
111 | label = "lan2"; | |
112 | }; | |
113 | ||
114 | switch0port5: port@5 { | |
115 | reg = <5>; | |
116 | label = "dsa"; | |
117 | phy-mode = "rgmii-txid"; | |
118 | link = <&switch1port6 | |
119 | &switch2port9>; | |
120 | fixed-link { | |
121 | speed = <1000>; | |
122 | full-duplex; | |
123 | }; | |
124 | }; | |
125 | ||
126 | port@6 { | |
127 | reg = <6>; | |
128 | label = "cpu"; | |
129 | ethernet = <&fec1>; | |
130 | fixed-link { | |
131 | speed = <100>; | |
132 | full-duplex; | |
133 | }; | |
134 | }; | |
135 | }; | |
136 | }; | |
1556063f CT |
137 | }; |
138 | ||
139 | mdio_mux_2: mdio@2 { | |
140 | reg = <2>; | |
141 | #address-cells = <1>; | |
142 | #size-cells = <0>; | |
1556063f | 143 | |
9dff6733 AL |
144 | switch1: switch1@0 { |
145 | compatible = "marvell,mv88e6085"; | |
146 | #address-cells = <1>; | |
147 | #size-cells = <0>; | |
1556063f | 148 | reg = <0>; |
9dff6733 AL |
149 | dsa,member = <0 1>; |
150 | ||
151 | ports { | |
152 | #address-cells = <1>; | |
153 | #size-cells = <0>; | |
154 | port@0 { | |
155 | reg = <0>; | |
156 | label = "lan3"; | |
157 | phy-handle = <&switch1phy0>; | |
158 | }; | |
159 | ||
160 | port@1 { | |
161 | reg = <1>; | |
162 | label = "lan4"; | |
163 | phy-handle = <&switch1phy1>; | |
164 | }; | |
165 | ||
166 | port@2 { | |
167 | reg = <2>; | |
168 | label = "lan5"; | |
169 | phy-handle = <&switch1phy2>; | |
170 | }; | |
171 | ||
172 | switch1port5: port@5 { | |
173 | reg = <5>; | |
174 | label = "dsa"; | |
175 | link = <&switch2port9>; | |
176 | phy-mode = "rgmii-txid"; | |
177 | fixed-link { | |
178 | speed = <1000>; | |
179 | full-duplex; | |
180 | }; | |
181 | }; | |
182 | ||
183 | switch1port6: port@6 { | |
184 | reg = <6>; | |
185 | label = "dsa"; | |
186 | phy-mode = "rgmii-txid"; | |
187 | link = <&switch0port5>; | |
188 | fixed-link { | |
189 | speed = <1000>; | |
190 | full-duplex; | |
191 | }; | |
192 | }; | |
1556063f | 193 | }; |
9dff6733 AL |
194 | mdio { |
195 | #address-cells = <1>; | |
196 | #size-cells = <0>; | |
197 | switch1phy0: switch1phy0@0 { | |
198 | reg = <0>; | |
199 | }; | |
200 | switch1phy1: switch1phy0@1 { | |
201 | reg = <1>; | |
202 | }; | |
203 | switch1phy2: switch1phy0@2 { | |
204 | reg = <2>; | |
205 | }; | |
1556063f CT |
206 | }; |
207 | }; | |
1556063f CT |
208 | }; |
209 | ||
9dff6733 | 210 | mdio_mux_4: mdio@4 { |
1556063f CT |
211 | #address-cells = <1>; |
212 | #size-cells = <0>; | |
9dff6733 | 213 | reg = <4>; |
1556063f | 214 | |
9dff6733 AL |
215 | switch2: switch2@0 { |
216 | compatible = "marvell,mv88e6085"; | |
217 | #address-cells = <1>; | |
218 | #size-cells = <0>; | |
1556063f | 219 | reg = <0>; |
9dff6733 AL |
220 | dsa,member = <0 2>; |
221 | ||
222 | ports { | |
223 | #address-cells = <1>; | |
224 | #size-cells = <0>; | |
225 | port@0 { | |
226 | reg = <0>; | |
227 | label = "lan6"; | |
228 | }; | |
229 | ||
230 | port@1 { | |
231 | reg = <1>; | |
232 | label = "lan7"; | |
233 | }; | |
234 | ||
235 | port@2 { | |
236 | reg = <2>; | |
237 | label = "lan8"; | |
238 | }; | |
239 | ||
240 | port@3 { | |
241 | reg = <3>; | |
242 | label = "optical3"; | |
243 | fixed-link { | |
244 | speed = <1000>; | |
245 | full-duplex; | |
246 | link-gpios = <&gpio6 2 | |
247 | GPIO_ACTIVE_HIGH>; | |
248 | }; | |
249 | }; | |
250 | ||
251 | port@4 { | |
252 | reg = <4>; | |
253 | label = "optical4"; | |
254 | fixed-link { | |
255 | speed = <1000>; | |
256 | full-duplex; | |
257 | link-gpios = <&gpio6 3 | |
258 | GPIO_ACTIVE_HIGH>; | |
259 | }; | |
260 | }; | |
261 | ||
262 | switch2port9: port@9 { | |
263 | reg = <9>; | |
264 | label = "dsa"; | |
265 | phy-mode = "rgmii-txid"; | |
266 | link = <&switch1port5 | |
267 | &switch0port5>; | |
268 | fixed-link { | |
269 | speed = <1000>; | |
270 | full-duplex; | |
271 | }; | |
272 | }; | |
1556063f CT |
273 | }; |
274 | }; | |
275 | }; | |
276 | ||
9dff6733 AL |
277 | mdio_mux_8: mdio@8 { |
278 | reg = <8>; | |
1556063f CT |
279 | #address-cells = <1>; |
280 | #size-cells = <0>; | |
1556063f CT |
281 | }; |
282 | }; | |
283 | ||
284 | reg_vcc_3v3_mcu: regulator-vcc-3v3-mcu { | |
285 | compatible = "regulator-fixed"; | |
286 | regulator-name = "vcc_3v3_mcu"; | |
287 | regulator-min-microvolt = <3300000>; | |
288 | regulator-max-microvolt = <3300000>; | |
289 | }; | |
290 | ||
291 | usb0_vbus: regulator-usb0-vbus { | |
292 | compatible = "regulator-fixed"; | |
293 | pinctrl-0 = <&pinctrl_usb_vbus>; | |
294 | regulator-name = "usb_vbus"; | |
295 | regulator-min-microvolt = <5000000>; | |
296 | regulator-max-microvolt = <5000000>; | |
297 | enable-active-high; | |
298 | regulator-always-on; | |
299 | regulator-boot-on; | |
300 | gpio = <&gpio0 6 0>; | |
301 | }; | |
302 | ||
303 | spi0 { | |
304 | compatible = "spi-gpio"; | |
305 | pinctrl-0 = <&pinctrl_gpio_spi0>; | |
306 | pinctrl-names = "default"; | |
307 | #address-cells = <1>; | |
308 | #size-cells = <0>; | |
309 | gpio-sck = <&gpio1 12 GPIO_ACTIVE_HIGH>; | |
310 | gpio-mosi = <&gpio1 11 GPIO_ACTIVE_HIGH>; | |
311 | gpio-miso = <&gpio1 10 GPIO_ACTIVE_HIGH>; | |
312 | cs-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH | |
313 | &gpio1 8 GPIO_ACTIVE_HIGH>; | |
314 | num-chipselects = <2>; | |
315 | ||
316 | m25p128@0 { | |
317 | compatible = "m25p128", "jedec,spi-nor"; | |
318 | #address-cells = <1>; | |
319 | #size-cells = <1>; | |
320 | reg = <0>; | |
321 | spi-max-frequency = <1000000>; | |
322 | }; | |
323 | ||
324 | at93c46d@1 { | |
325 | compatible = "atmel,at93c46d"; | |
326 | pinctrl-0 = <&pinctrl_gpio_e6185_eeprom_sel>; | |
327 | pinctrl-names = "default"; | |
328 | #address-cells = <0>; | |
329 | #size-cells = <0>; | |
330 | reg = <1>; | |
331 | spi-max-frequency = <500000>; | |
332 | spi-cs-high; | |
333 | data-size = <16>; | |
334 | select-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>; | |
335 | }; | |
336 | }; | |
337 | }; | |
338 | ||
339 | &adc0 { | |
340 | pinctrl-names = "default"; | |
341 | pinctrl-0 = <&pinctrl_adc0_ad5>; | |
342 | vref-supply = <®_vcc_3v3_mcu>; | |
343 | status = "okay"; | |
344 | }; | |
345 | ||
346 | &edma0 { | |
347 | status = "okay"; | |
348 | }; | |
349 | ||
350 | &esdhc1 { | |
351 | pinctrl-names = "default"; | |
352 | pinctrl-0 = <&pinctrl_esdhc1>; | |
353 | bus-width = <4>; | |
354 | status = "okay"; | |
355 | }; | |
356 | ||
357 | &fec0 { | |
358 | phy-mode = "rmii"; | |
359 | pinctrl-names = "default"; | |
360 | pinctrl-0 = <&pinctrl_fec0>; | |
361 | status = "okay"; | |
362 | }; | |
363 | ||
364 | &fec1 { | |
365 | phy-mode = "rmii"; | |
366 | pinctrl-names = "default"; | |
367 | pinctrl-0 = <&pinctrl_fec1>; | |
368 | status = "okay"; | |
369 | ||
370 | fixed-link { | |
371 | speed = <100>; | |
372 | full-duplex; | |
373 | }; | |
374 | ||
375 | mdio1: mdio { | |
376 | #address-cells = <1>; | |
377 | #size-cells = <0>; | |
378 | status = "okay"; | |
379 | }; | |
380 | }; | |
381 | ||
382 | &i2c0 { | |
383 | clock-frequency = <100000>; | |
384 | pinctrl-names = "default"; | |
385 | pinctrl-0 = <&pinctrl_i2c0>; | |
386 | status = "okay"; | |
387 | ||
388 | gpio5: pca9554@20 { | |
389 | compatible = "nxp,pca9554"; | |
390 | reg = <0x20>; | |
391 | gpio-controller; | |
392 | #gpio-cells = <2>; | |
393 | ||
394 | }; | |
395 | ||
396 | gpio6: pca9554@22 { | |
397 | compatible = "nxp,pca9554"; | |
398 | pinctrl-names = "default"; | |
399 | pinctrl-0 = <&pinctrl_pca9554_22>; | |
400 | reg = <0x22>; | |
401 | gpio-controller; | |
402 | #gpio-cells = <2>; | |
403 | interrupt-parent = <&gpio2>; | |
404 | interrupts = <2 IRQ_TYPE_LEVEL_LOW>; | |
405 | }; | |
406 | ||
407 | lm75@48 { | |
408 | compatible = "national,lm75"; | |
409 | reg = <0x48>; | |
410 | }; | |
411 | ||
412 | at24c04@50 { | |
413 | compatible = "atmel,24c04"; | |
414 | reg = <0x50>; | |
415 | }; | |
416 | ||
417 | at24c04@52 { | |
418 | compatible = "atmel,24c04"; | |
419 | reg = <0x52>; | |
420 | }; | |
421 | ||
422 | ds1682@6b { | |
423 | compatible = "dallas,ds1682"; | |
424 | reg = <0x6b>; | |
425 | }; | |
426 | }; | |
427 | ||
428 | &i2c1 { | |
429 | clock-frequency = <100000>; | |
430 | pinctrl-names = "default"; | |
431 | pinctrl-0 = <&pinctrl_i2c1>; | |
432 | status = "okay"; | |
433 | }; | |
434 | ||
435 | &i2c2 { | |
436 | clock-frequency = <100000>; | |
437 | pinctrl-names = "default"; | |
438 | pinctrl-0 = <&pinctrl_i2c2>; | |
439 | status = "okay"; | |
440 | ||
441 | tca9548@70 { | |
442 | compatible = "nxp,pca9548"; | |
443 | pinctrl-0 = <&pinctrl_i2c_mux_reset>; | |
444 | pinctrl-names = "default"; | |
445 | #address-cells = <1>; | |
446 | #size-cells = <0>; | |
447 | reg = <0x70>; | |
448 | reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; | |
449 | ||
450 | i2c@0 { | |
451 | #address-cells = <1>; | |
452 | #size-cells = <0>; | |
453 | reg = <0>; | |
454 | ||
455 | sfp1: at24c04@50 { | |
456 | compatible = "atmel,24c02"; | |
457 | reg = <0x50>; | |
458 | }; | |
459 | }; | |
460 | ||
461 | i2c@1 { | |
462 | #address-cells = <1>; | |
463 | #size-cells = <0>; | |
464 | reg = <1>; | |
465 | ||
466 | sfp2: at24c04@50 { | |
467 | compatible = "atmel,24c02"; | |
468 | reg = <0x50>; | |
469 | }; | |
470 | }; | |
471 | ||
472 | i2c@2 { | |
473 | #address-cells = <1>; | |
474 | #size-cells = <0>; | |
475 | reg = <2>; | |
476 | ||
477 | sfp3: at24c04@50 { | |
478 | compatible = "atmel,24c02"; | |
479 | reg = <0x50>; | |
480 | }; | |
481 | }; | |
482 | ||
483 | i2c@3 { | |
484 | #address-cells = <1>; | |
485 | #size-cells = <0>; | |
486 | reg = <3>; | |
487 | ||
488 | sfp4: at24c04@50 { | |
489 | compatible = "atmel,24c02"; | |
490 | reg = <0x50>; | |
491 | }; | |
492 | }; | |
493 | ||
494 | i2c@4 { | |
495 | #address-cells = <1>; | |
496 | #size-cells = <0>; | |
497 | reg = <4>; | |
498 | }; | |
499 | }; | |
500 | }; | |
501 | ||
502 | &i2c3 { | |
503 | clock-frequency = <100000>; | |
504 | pinctrl-names = "default"; | |
505 | pinctrl-0 = <&pinctrl_i2c3>; | |
506 | status = "okay"; | |
507 | }; | |
508 | ||
509 | &uart0 { | |
510 | pinctrl-names = "default"; | |
511 | pinctrl-0 = <&pinctrl_uart0>; | |
512 | status = "okay"; | |
513 | }; | |
514 | ||
515 | &uart1 { | |
516 | pinctrl-names = "default"; | |
517 | pinctrl-0 = <&pinctrl_uart1>; | |
518 | status = "okay"; | |
519 | }; | |
520 | ||
521 | &uart2 { | |
522 | pinctrl-names = "default"; | |
523 | pinctrl-0 = <&pinctrl_uart2>; | |
524 | status = "okay"; | |
525 | }; | |
526 | ||
527 | &usbdev0 { | |
528 | disable-over-current; | |
529 | vbus-supply = <&usb0_vbus>; | |
530 | dr_mode = "host"; | |
531 | status = "okay"; | |
532 | }; | |
533 | ||
534 | &usbh1 { | |
535 | disable-over-current; | |
536 | status = "okay"; | |
537 | }; | |
538 | ||
539 | &usbmisc0 { | |
540 | status = "okay"; | |
541 | }; | |
542 | ||
543 | &usbmisc1 { | |
544 | status = "okay"; | |
545 | }; | |
546 | ||
547 | &usbphy0 { | |
548 | status = "okay"; | |
549 | }; | |
550 | ||
551 | &usbphy1 { | |
552 | status = "okay"; | |
553 | }; | |
554 | ||
555 | &iomuxc { | |
556 | pinctrl_adc0_ad5: adc0ad5grp { | |
557 | fsl,pins = < | |
558 | VF610_PAD_PTC30__ADC0_SE5 0x00a1 | |
559 | >; | |
560 | }; | |
561 | ||
562 | pinctrl_dspi0: dspi0grp { | |
563 | fsl,pins = < | |
564 | VF610_PAD_PTB18__DSPI0_CS1 0x1182 | |
565 | VF610_PAD_PTB19__DSPI0_CS0 0x1182 | |
566 | VF610_PAD_PTB20__DSPI0_SIN 0x1181 | |
567 | VF610_PAD_PTB21__DSPI0_SOUT 0x1182 | |
568 | VF610_PAD_PTB22__DSPI0_SCK 0x1182 | |
569 | >; | |
570 | }; | |
571 | ||
572 | pinctrl_dspi2: dspi2grp { | |
573 | fsl,pins = < | |
574 | VF610_PAD_PTD31__DSPI2_CS1 0x1182 | |
575 | VF610_PAD_PTD30__DSPI2_CS0 0x1182 | |
576 | VF610_PAD_PTD29__DSPI2_SIN 0x1181 | |
577 | VF610_PAD_PTD28__DSPI2_SOUT 0x1182 | |
578 | VF610_PAD_PTD27__DSPI2_SCK 0x1182 | |
579 | >; | |
580 | }; | |
581 | ||
582 | pinctrl_esdhc1: esdhc1grp { | |
583 | fsl,pins = < | |
584 | VF610_PAD_PTA24__ESDHC1_CLK 0x31ef | |
585 | VF610_PAD_PTA25__ESDHC1_CMD 0x31ef | |
586 | VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef | |
587 | VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef | |
588 | VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef | |
589 | VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef | |
590 | VF610_PAD_PTA7__GPIO_134 0x219d | |
591 | >; | |
592 | }; | |
593 | ||
594 | pinctrl_fec0: fec0grp { | |
595 | fsl,pins = < | |
596 | VF610_PAD_PTC0__ENET_RMII0_MDC 0x30d2 | |
597 | VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d3 | |
598 | VF610_PAD_PTC2__ENET_RMII0_CRS 0x30d1 | |
599 | VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1 | |
600 | VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1 | |
601 | VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1 | |
602 | VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2 | |
603 | VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2 | |
604 | VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2 | |
605 | >; | |
606 | }; | |
607 | ||
608 | pinctrl_fec1: fec1grp { | |
609 | fsl,pins = < | |
610 | VF610_PAD_PTA6__RMII_CLKIN 0x30d1 | |
611 | VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 | |
612 | VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3 | |
613 | VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1 | |
614 | VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1 | |
615 | VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1 | |
616 | VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1 | |
617 | VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2 | |
618 | VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2 | |
619 | VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2 | |
620 | >; | |
621 | }; | |
622 | ||
623 | pinctrl_gpio_e6185_eeprom_sel: pinctrl-gpio-e6185-eeprom-spi0 { | |
624 | fsl,pins = < | |
625 | VF610_PAD_PTE27__GPIO_132 0x33e2 | |
626 | >; | |
627 | }; | |
628 | ||
629 | pinctrl_gpio_spi0: pinctrl-gpio-spi0 { | |
630 | fsl,pins = < | |
631 | VF610_PAD_PTB22__GPIO_44 0x33e2 | |
632 | VF610_PAD_PTB21__GPIO_43 0x33e2 | |
633 | VF610_PAD_PTB20__GPIO_42 0x33e1 | |
634 | VF610_PAD_PTB19__GPIO_41 0x33e2 | |
635 | VF610_PAD_PTB18__GPIO_40 0x33e2 | |
636 | >; | |
637 | }; | |
638 | ||
639 | pinctrl_i2c_mux_reset: pinctrl-i2c-mux-reset { | |
640 | fsl,pins = < | |
641 | VF610_PAD_PTE14__GPIO_119 0x31c2 | |
642 | >; | |
643 | }; | |
644 | ||
645 | pinctrl_i2c0: i2c0grp { | |
646 | fsl,pins = < | |
647 | VF610_PAD_PTB14__I2C0_SCL 0x37ff | |
648 | VF610_PAD_PTB15__I2C0_SDA 0x37ff | |
649 | >; | |
650 | }; | |
651 | ||
652 | pinctrl_i2c1: i2c1grp { | |
653 | fsl,pins = < | |
654 | VF610_PAD_PTB16__I2C1_SCL 0x37ff | |
655 | VF610_PAD_PTB17__I2C1_SDA 0x37ff | |
656 | >; | |
657 | }; | |
658 | ||
659 | pinctrl_i2c2: i2c2grp { | |
660 | fsl,pins = < | |
661 | VF610_PAD_PTA22__I2C2_SCL 0x37ff | |
662 | VF610_PAD_PTA23__I2C2_SDA 0x37ff | |
663 | >; | |
664 | }; | |
665 | ||
666 | pinctrl_i2c3: i2c3grp { | |
667 | fsl,pins = < | |
668 | VF610_PAD_PTA30__I2C3_SCL 0x37ff | |
669 | VF610_PAD_PTA31__I2C3_SDA 0x37ff | |
670 | >; | |
671 | }; | |
672 | ||
673 | pinctrl_leds_debug: pinctrl-leds-debug { | |
674 | fsl,pins = < | |
675 | VF610_PAD_PTD20__GPIO_74 0x31c2 | |
676 | >; | |
677 | }; | |
678 | ||
679 | pinctrl_mdio_mux: pinctrl-mdio-mux { | |
680 | fsl,pins = < | |
681 | VF610_PAD_PTA18__GPIO_8 0x31c2 | |
682 | VF610_PAD_PTA19__GPIO_9 0x31c2 | |
683 | VF610_PAD_PTB2__GPIO_24 0x31c2 | |
684 | VF610_PAD_PTB3__GPIO_25 0x31c2 | |
685 | >; | |
686 | }; | |
687 | ||
688 | pinctrl_pca9554_22: pinctrl-pca95540-22 { | |
689 | fsl,pins = < | |
690 | VF610_PAD_PTB28__GPIO_98 0x219d | |
691 | >; | |
692 | }; | |
693 | ||
694 | pinctrl_pwm0: pwm0grp { | |
695 | fsl,pins = < | |
696 | VF610_PAD_PTB0__FTM0_CH0 0x1582 | |
697 | VF610_PAD_PTB1__FTM0_CH1 0x1582 | |
698 | VF610_PAD_PTB2__FTM0_CH2 0x1582 | |
699 | VF610_PAD_PTB3__FTM0_CH3 0x1582 | |
700 | >; | |
701 | }; | |
702 | ||
703 | pinctrl_qspi0: qspi0grp { | |
704 | fsl,pins = < | |
705 | VF610_PAD_PTD7__QSPI0_B_QSCK 0x31c3 | |
706 | VF610_PAD_PTD8__QSPI0_B_CS0 0x31ff | |
707 | VF610_PAD_PTD9__QSPI0_B_DATA3 0x31c3 | |
708 | VF610_PAD_PTD10__QSPI0_B_DATA2 0x31c3 | |
709 | VF610_PAD_PTD11__QSPI0_B_DATA1 0x31c3 | |
710 | VF610_PAD_PTD12__QSPI0_B_DATA0 0x31c3 | |
711 | >; | |
712 | }; | |
713 | ||
714 | pinctrl_uart0: uart0grp { | |
715 | fsl,pins = < | |
716 | VF610_PAD_PTB10__UART0_TX 0x21a2 | |
717 | VF610_PAD_PTB11__UART0_RX 0x21a1 | |
718 | >; | |
719 | }; | |
720 | ||
721 | pinctrl_uart1: uart1grp { | |
722 | fsl,pins = < | |
723 | VF610_PAD_PTB23__UART1_TX 0x21a2 | |
724 | VF610_PAD_PTB24__UART1_RX 0x21a1 | |
725 | >; | |
726 | }; | |
727 | ||
728 | pinctrl_uart2: uart2grp { | |
729 | fsl,pins = < | |
730 | VF610_PAD_PTD0__UART2_TX 0x21a2 | |
731 | VF610_PAD_PTD1__UART2_RX 0x21a1 | |
732 | >; | |
733 | }; | |
734 | ||
735 | pinctrl_usb_vbus: pinctrl-usb-vbus { | |
736 | fsl,pins = < | |
737 | VF610_PAD_PTA16__GPIO_6 0x31c2 | |
738 | >; | |
739 | }; | |
740 | ||
741 | pinctrl_usb0_host: usb0-host-grp { | |
742 | fsl,pins = < | |
743 | VF610_PAD_PTD6__GPIO_85 0x0062 | |
744 | >; | |
745 | }; | |
746 | }; |