[deliverable/linux.git] / arch / arm / boot / dts / vf610.dtsi

/*
 * Copyright 2013 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include "skeleton.dtsi"
#include "vf610-pinfunc.h"
#include <dt-bindings/clock/vf610-clock.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	aliases {
		can0 = &can0;
		can1 = &can1;
		serial0 = &uart0;
		serial1 = &uart1;
		serial2 = &uart2;
		serial3 = &uart3;
		serial4 = &uart4;
		serial5 = &uart5;
		gpio0 = &gpio1;
		gpio1 = &gpio2;
		gpio2 = &gpio3;
		gpio3 = &gpio4;
		gpio4 = &gpio5;
		usbphy0 = &usbphy0;
		usbphy1 = &usbphy1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,cortex-a5";
			device_type = "cpu";
			reg = <0x0>;
			next-level-cache = <&L2>;
		};
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <0>;

		sxosc {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <32768>;
		};

		fxosc {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <24000000>;
		};
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&intc>;
		ranges;

		aips0: aips-bus@40000000 {
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			interrupt-parent = <&intc>;
			reg = <0x40000000 0x70000>;
			ranges;

			intc: interrupt-controller@40002000 {
				compatible = "arm,cortex-a9-gic";
				#interrupt-cells = <3>;
				interrupt-controller;
				reg = <0x40003000 0x1000>,
				      <0x40002100 0x100>;
			};

			L2: l2-cache@40006000 {
				compatible = "arm,pl310-cache";
				reg = <0x40006000 0x1000>;
				cache-unified;
				cache-level = <2>;
				arm,data-latency = <1 1 1>;
				arm,tag-latency = <2 2 2>;
			};

			edma0: dma-controller@40018000 {
				#dma-cells = <2>;
				compatible = "fsl,vf610-edma";
				reg = <0x40018000 0x2000>,
					<0x40024000 0x1000>,
					<0x40025000 0x1000>;
				interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>,
						<0 9 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "edma-tx", "edma-err";
				dma-channels = <32>;
				clock-names = "dmamux0", "dmamux1";
				clocks = <&clks VF610_CLK_DMAMUX0>,
					<&clks VF610_CLK_DMAMUX1>;
			};

			can0: flexcan@40020000 {
				compatible = "fsl,vf610-flexcan";
				reg = <0x40020000 0x4000>;
				interrupts = <0 58 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_FLEXCAN0>,
					 <&clks VF610_CLK_FLEXCAN0>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart0: serial@40027000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40027000 0x1000>;
				interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART0>;
				clock-names = "ipg";
				dmas = <&edma0 0 2>,
					<&edma0 0 3>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			uart1: serial@40028000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40028000 0x1000>;
				interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART1>;
				clock-names = "ipg";
				dmas = <&edma0 0 4>,
					<&edma0 0 5>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			uart2: serial@40029000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40029000 0x1000>;
				interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART2>;
				clock-names = "ipg";
				dmas = <&edma0 0 6>,
					<&edma0 0 7>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			uart3: serial@4002a000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x4002a000 0x1000>;
				interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART3>;
				clock-names = "ipg";
				dmas = <&edma0 0 8>,
					<&edma0 0 9>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			dspi0: dspi0@4002c000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-dspi";
				reg = <0x4002c000 0x1000>;
				interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_DSPI0>;
				clock-names = "dspi";
				spi-num-chipselects = <5>;
				status = "disabled";
			};

			sai2: sai@40031000 {
				compatible = "fsl,vf610-sai";
				reg = <0x40031000 0x1000>;
				interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_SAI2>;
				clock-names = "sai";
				dma-names = "tx", "rx";
				dmas = <&edma0 0 21>,
					<&edma0 0 20>;
				status = "disabled";
			};

			pit: pit@40037000 {
				compatible = "fsl,vf610-pit";
				reg = <0x40037000 0x1000>;
				interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_PIT>;
				clock-names = "pit";
			};

			pwm0: pwm@40038000 {
				compatible = "fsl,vf610-ftm-pwm";
				#pwm-cells = <3>;
				reg = <0x40038000 0x1000>;
				clock-names = "ftm_sys", "ftm_ext",
					      "ftm_fix", "ftm_cnt_clk_en";
				clocks = <&clks VF610_CLK_FTM0>,
					<&clks VF610_CLK_FTM0_EXT_SEL>,
					<&clks VF610_CLK_FTM0_FIX_SEL>,
					<&clks VF610_CLK_FTM0_EXT_FIX_EN>;
				status = "disabled";
			};

			adc0: adc@4003b000 {
				compatible = "fsl,vf610-adc";
				reg = <0x4003b000 0x1000>;
				interrupts = <0 53 0x04>;
				clocks = <&clks VF610_CLK_ADC0>;
				clock-names = "adc";
				status = "disabled";
			};

			wdog@4003e000 {
				compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
				reg = <0x4003e000 0x1000>;
				clocks = <&clks VF610_CLK_WDT>;
				clock-names = "wdog";
			};

			qspi0: quadspi@40044000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-qspi";
				reg = <0x40044000 0x1000>;
				interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_QSPI0_EN>,
					<&clks VF610_CLK_QSPI0>;
				clock-names = "qspi_en", "qspi";
				status = "disabled";
			};

			iomuxc: iomuxc@40048000 {
				compatible = "fsl,vf610-iomuxc";
				reg = <0x40048000 0x1000>;
				#gpio-range-cells = <3>;
			};

			gpio1: gpio@40049000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x40049000 0x1000 0x400ff000 0x40>;
				interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 0 32>;
			};

			gpio2: gpio@4004a000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004a000 0x1000 0x400ff040 0x40>;
				interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 32 32>;
			};

			gpio3: gpio@4004b000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004b000 0x1000 0x400ff080 0x40>;
				interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 64 32>;
			};

			gpio4: gpio@4004c000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
				interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 96 32>;
			};

			gpio5: gpio@4004d000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004d000 0x1000 0x400ff100 0x40>;
				interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 128 7>;
			};

			anatop: anatop@40050000 {
				compatible = "fsl,vf610-anatop", "syscon";
				reg = <0x40050000 0x400>;
			};

			usbphy0: usbphy@40050800 {
				compatible = "fsl,vf610-usbphy";
				reg = <0x40050800 0x400>;
				interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBPHY0>;
				fsl,anatop = <&anatop>;
			};

			usbphy1: usbphy@40050c00 {
				compatible = "fsl,vf610-usbphy";
				reg = <0x40050c00 0x400>;
				interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBPHY1>;
				fsl,anatop = <&anatop>;
			};

			i2c0: i2c@40066000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-i2c";
				reg = <0x40066000 0x1000>;
				interrupts =<0 71 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_I2C0>;
				clock-names = "ipg";
				dmas = <&edma0 0 50>,
					<&edma0 0 51>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			clks: ccm@4006b000 {
				compatible = "fsl,vf610-ccm";
				reg = <0x4006b000 0x1000>;
				#clock-cells = <1>;
			};

			usbdev0: usb@40034000 {
				compatible = "fsl,vf610-usb", "fsl,imx27-usb";
				reg = <0x40034000 0x800>;
				interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBC0>;
				fsl,usbphy = <&usbphy0>;
				fsl,usbmisc = <&usbmisc0 0>;
				dr_mode = "peripheral";
				status = "disabled";
			};

			usbmisc0: usb@40034800 {
				#index-cells = <1>;
				compatible = "fsl,vf610-usbmisc";
				reg = <0x40034800 0x200>;
				clocks = <&clks VF610_CLK_USBC0>;
			};
		};

		aips1: aips-bus@40080000 {
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40080000 0x80000>;
			ranges;

			edma1: dma-controller@40098000 {
				#dma-cells = <2>;
				compatible = "fsl,vf610-edma";
				reg = <0x40098000 0x2000>,
					<0x400a1000 0x1000>,
					<0x400a2000 0x1000>;
				interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>,
						<0 11 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "edma-tx", "edma-err";
				dma-channels = <32>;
				clock-names = "dmamux0", "dmamux1";
				clocks = <&clks VF610_CLK_DMAMUX2>,
					<&clks VF610_CLK_DMAMUX3>;
			};

			uart4: serial@400a9000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x400a9000 0x1000>;
				interrupts = <0 65 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART4>;
				clock-names = "ipg";
				status = "disabled";
			};

			uart5: serial@400aa000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x400aa000 0x1000>;
				interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART5>;
				clock-names = "ipg";
				status = "disabled";
			};

			adc1: adc@400bb000 {
				compatible = "fsl,vf610-adc";
				reg = <0x400bb000 0x1000>;
				interrupts = <0 54 0x04>;
				clocks = <&clks VF610_CLK_ADC1>;
				clock-names = "adc";
				status = "disabled";
			};

			esdhc1: esdhc@400b2000 {
				compatible = "fsl,imx53-esdhc";
				reg = <0x400b2000 0x1000>;
				interrupts = <0 28 0x04>;
				clocks = <&clks VF610_CLK_IPG_BUS>,
					<&clks VF610_CLK_PLATFORM_BUS>,
					<&clks VF610_CLK_ESDHC1>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			usbh1: usb@400b4000 {
				compatible = "fsl,vf610-usb", "fsl,imx27-usb";
				reg = <0x400b4000 0x800>;
				interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBC1>;
				fsl,usbphy = <&usbphy1>;
				fsl,usbmisc = <&usbmisc1 0>;
				dr_mode = "host";
				status = "disabled";
			};

			usbmisc1: usb@400b4800 {
				#index-cells = <1>;
				compatible = "fsl,vf610-usbmisc";
				reg = <0x400b4800 0x200>;
				clocks = <&clks VF610_CLK_USBC1>;
			};

			ftm: ftm@400b8000 {
				compatible = "fsl,ftm-timer";
				reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
				interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
				clock-names = "ftm-evt", "ftm-src",
					"ftm-evt-counter-en", "ftm-src-counter-en";
				clocks = <&clks VF610_CLK_FTM2>,
					<&clks VF610_CLK_FTM3>,
					<&clks VF610_CLK_FTM2_EXT_FIX_EN>,
					<&clks VF610_CLK_FTM3_EXT_FIX_EN>;
				status = "disabled";
			};

			fec0: ethernet@400d0000 {
				compatible = "fsl,mvf600-fec";
				reg = <0x400d0000 0x1000>;
				interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_ENET0>,
					<&clks VF610_CLK_ENET0>,
					<&clks VF610_CLK_ENET>;
				clock-names = "ipg", "ahb", "ptp";
				status = "disabled";
			};

			fec1: ethernet@400d1000 {
				compatible = "fsl,mvf600-fec";
				reg = <0x400d1000 0x1000>;
				interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_ENET1>,
					<&clks VF610_CLK_ENET1>,
					<&clks VF610_CLK_ENET>;
				clock-names = "ipg", "ahb", "ptp";
				status = "disabled";
			};

			can1: flexcan@400d4000 {
				compatible = "fsl,vf610-flexcan";
				reg = <0x400d4000 0x4000>;
				interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_FLEXCAN1>,
					 <&clks VF610_CLK_FLEXCAN1>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

		};
	};
};
Commit	Line	Data
d02e1349 JL	1	/*
	2	* Copyright 2013 Freescale Semiconductor, Inc.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*/
	9
	10	#include "skeleton.dtsi"
	11	#include "vf610-pinfunc.h"
	12	#include <dt-bindings/clock/vf610-clock.h>
2bc88b1b	13	#include <dt-bindings/interrupt-controller/irq.h>
d02e1349 JL	14
	15	/ {
	16	aliases {
69603fbb SA	17	can0 = &can0;
69603fbb SA	18	can1 = &can1;
d02e1349 JL	19	serial0 = &uart0;
	20	serial1 = &uart1;
	21	serial2 = &uart2;
	22	serial3 = &uart3;
	23	serial4 = &uart4;
	24	serial5 = &uart5;
	25	gpio0 = &gpio1;
	26	gpio1 = &gpio2;
	27	gpio2 = &gpio3;
	28	gpio3 = &gpio4;
	29	gpio4 = &gpio5;
e34a68a3 SA	30	usbphy0 = &usbphy0;
e34a68a3 SA	31	usbphy1 = &usbphy1;
d02e1349 JL	32	};
	33
	34	cpus {
	35	#address-cells = <1>;
	36	#size-cells = <0>;
	37
	38	cpu@0 {
	39	compatible = "arm,cortex-a5";
	40	device_type = "cpu";
	41	reg = <0x0>;
	42	next-level-cache = <&L2>;
	43	};
	44	};
	45
	46	clocks {
	47	#address-cells = <1>;
	48	#size-cells = <0>;
	49
	50	sxosc {
	51	compatible = "fixed-clock";
4b2b4043	52	#clock-cells = <0>;
d02e1349 JL	53	clock-frequency = <32768>;
	54	};
	55
	56	fxosc {
	57	compatible = "fixed-clock";
4b2b4043	58	#clock-cells = <0>;
d02e1349 JL	59	clock-frequency = <24000000>;
	60	};
	61	};
	62
	63	soc {
	64	#address-cells = <1>;
	65	#size-cells = <1>;
	66	compatible = "simple-bus";
	67	interrupt-parent = <&intc>;
	68	ranges;
	69
	70	aips0: aips-bus@40000000 {
	71	compatible = "fsl,aips-bus", "simple-bus";
	72	#address-cells = <1>;
	73	#size-cells = <1>;
	74	interrupt-parent = <&intc>;
	75	reg = <0x40000000 0x70000>;
	76	ranges;
	77
	78	intc: interrupt-controller@40002000 {
	79	compatible = "arm,cortex-a9-gic";
	80	#interrupt-cells = <3>;
d02e1349 JL	81	interrupt-controller;
	82	reg = <0x40003000 0x1000>,
	83	<0x40002100 0x100>;
	84	};
	85
	86	L2: l2-cache@40006000 {
	87	compatible = "arm,pl310-cache";
	88	reg = <0x40006000 0x1000>;
	89	cache-unified;
	90	cache-level = <2>;
	91	arm,data-latency = <1 1 1>;
	92	arm,tag-latency = <2 2 2>;
	93	};
	94
b93293b9 JL	95	edma0: dma-controller@40018000 {
	96	#dma-cells = <2>;
	97	compatible = "fsl,vf610-edma";
	98	reg = <0x40018000 0x2000>,
	99	<0x40024000 0x1000>,
	100	<0x40025000 0x1000>;
	101	interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>,
	102	<0 9 IRQ_TYPE_LEVEL_HIGH>;
	103	interrupt-names = "edma-tx", "edma-err";
	104	dma-channels = <32>;
	105	clock-names = "dmamux0", "dmamux1";
	106	clocks = <&clks VF610_CLK_DMAMUX0>,
	107	<&clks VF610_CLK_DMAMUX1>;
	108	};
	109
69603fbb SA	110	can0: flexcan@40020000 {
	111	compatible = "fsl,vf610-flexcan";
	112	reg = <0x40020000 0x4000>;
	113	interrupts = <0 58 IRQ_TYPE_LEVEL_HIGH>;
	114	clocks = <&clks VF610_CLK_FLEXCAN0>,
	115	<&clks VF610_CLK_FLEXCAN0>;
	116	clock-names = "ipg", "per";
	117	status = "disabled";
	118	};
	119
d02e1349 JL	120	uart0: serial@40027000 {
	121	compatible = "fsl,vf610-lpuart";
	122	reg = <0x40027000 0x1000>;
2bc88b1b	123	interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	124	clocks = <&clks VF610_CLK_UART0>;
d02e1349 JL	125	clock-names = "ipg";
8fbc8c07 YY	126	dmas = <&edma0 0 2>,
	127	<&edma0 0 3>;
	128	dma-names = "rx","tx";
d02e1349 JL	129	status = "disabled";
	130	};
	131
	132	uart1: serial@40028000 {
	133	compatible = "fsl,vf610-lpuart";
	134	reg = <0x40028000 0x1000>;
2bc88b1b	135	interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	136	clocks = <&clks VF610_CLK_UART1>;
d02e1349 JL	137	clock-names = "ipg";
8fbc8c07 YY	138	dmas = <&edma0 0 4>,
	139	<&edma0 0 5>;
	140	dma-names = "rx","tx";
d02e1349 JL	141	status = "disabled";
	142	};
	143
	144	uart2: serial@40029000 {
	145	compatible = "fsl,vf610-lpuart";
	146	reg = <0x40029000 0x1000>;
2bc88b1b	147	interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	148	clocks = <&clks VF610_CLK_UART2>;
d02e1349 JL	149	clock-names = "ipg";
8fbc8c07 YY	150	dmas = <&edma0 0 6>,
	151	<&edma0 0 7>;
	152	dma-names = "rx","tx";
d02e1349 JL	153	status = "disabled";
	154	};
	155
	156	uart3: serial@4002a000 {
	157	compatible = "fsl,vf610-lpuart";
	158	reg = <0x4002a000 0x1000>;
2bc88b1b	159	interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	160	clocks = <&clks VF610_CLK_UART3>;
d02e1349 JL	161	clock-names = "ipg";
8fbc8c07 YY	162	dmas = <&edma0 0 8>,
	163	<&edma0 0 9>;
	164	dma-names = "rx","tx";
d02e1349 JL	165	status = "disabled";
	166	};
	167
d7a9d8e2 CF	168	dspi0: dspi0@4002c000 {
	169	#address-cells = <1>;
	170	#size-cells = <0>;
	171	compatible = "fsl,vf610-dspi";
	172	reg = <0x4002c000 0x1000>;
2bc88b1b	173	interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
d7a9d8e2 CF	174	clocks = <&clks VF610_CLK_DSPI0>;
	175	clock-names = "dspi";
	176	spi-num-chipselects = <5>;
	177	status = "disabled";
	178	};
	179
d02e1349 JL	180	sai2: sai@40031000 {
	181	compatible = "fsl,vf610-sai";
	182	reg = <0x40031000 0x1000>;
2bc88b1b	183	interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	184	clocks = <&clks VF610_CLK_SAI2>;
d02e1349 JL	185	clock-names = "sai";
1d412417 XL	186	dma-names = "tx", "rx";
	187	dmas = <&edma0 0 21>,
	188	<&edma0 0 20>;
d02e1349 JL	189	status = "disabled";
	190	};
	191
	192	pit: pit@40037000 {
	193	compatible = "fsl,vf610-pit";
	194	reg = <0x40037000 0x1000>;
2bc88b1b	195	interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	196	clocks = <&clks VF610_CLK_PIT>;
	197	clock-names = "pit";
	198	};
	199
7c978e0f XL	200	pwm0: pwm@40038000 {
	201	compatible = "fsl,vf610-ftm-pwm";
	202	#pwm-cells = <3>;
	203	reg = <0x40038000 0x1000>;
	204	clock-names = "ftm_sys", "ftm_ext",
	205	"ftm_fix", "ftm_cnt_clk_en";
	206	clocks = <&clks VF610_CLK_FTM0>,
	207	<&clks VF610_CLK_FTM0_EXT_SEL>,
	208	<&clks VF610_CLK_FTM0_FIX_SEL>,
	209	<&clks VF610_CLK_FTM0_EXT_FIX_EN>;
	210	status = "disabled";
	211	};
	212
64436ff6 FD	213	adc0: adc@4003b000 {
	214	compatible = "fsl,vf610-adc";
	215	reg = <0x4003b000 0x1000>;
	216	interrupts = <0 53 0x04>;
	217	clocks = <&clks VF610_CLK_ADC0>;
	218	clock-names = "adc";
	219	status = "disabled";
	220	};
	221
d02e1349 JL	222	wdog@4003e000 {
	223	compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
	224	reg = <0x4003e000 0x1000>;
	225	clocks = <&clks VF610_CLK_WDT>;
	226	clock-names = "wdog";
	227	};
	228
	229	qspi0: quadspi@40044000 {
	230	#address-cells = <1>;
	231	#size-cells = <0>;
	232	compatible = "fsl,vf610-qspi";
	233	reg = <0x40044000 0x1000>;
2bc88b1b	234	interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	235	clocks = <&clks VF610_CLK_QSPI0_EN>,
	236	<&clks VF610_CLK_QSPI0>;
	237	clock-names = "qspi_en", "qspi";
	238	status = "disabled";
	239	};
	240
	241	iomuxc: iomuxc@40048000 {
	242	compatible = "fsl,vf610-iomuxc";
	243	reg = <0x40048000 0x1000>;
36af8f3e	244	#gpio-range-cells = <3>;
d02e1349 JL	245	};
	246
	247	gpio1: gpio@40049000 {
	248	compatible = "fsl,vf610-gpio";
	249	reg = <0x40049000 0x1000 0x400ff000 0x40>;
2bc88b1b	250	interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	251	gpio-controller;
	252	#gpio-cells = <2>;
	253	interrupt-controller;
	254	#interrupt-cells = <2>;
36af8f3e	255	gpio-ranges = <&iomuxc 0 0 32>;
d02e1349 JL	256	};
	257
	258	gpio2: gpio@4004a000 {
	259	compatible = "fsl,vf610-gpio";
	260	reg = <0x4004a000 0x1000 0x400ff040 0x40>;
2bc88b1b	261	interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	262	gpio-controller;
	263	#gpio-cells = <2>;
	264	interrupt-controller;
	265	#interrupt-cells = <2>;
36af8f3e	266	gpio-ranges = <&iomuxc 0 32 32>;
d02e1349 JL	267	};
	268
	269	gpio3: gpio@4004b000 {
	270	compatible = "fsl,vf610-gpio";
	271	reg = <0x4004b000 0x1000 0x400ff080 0x40>;
2bc88b1b	272	interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	273	gpio-controller;
	274	#gpio-cells = <2>;
	275	interrupt-controller;
	276	#interrupt-cells = <2>;
36af8f3e	277	gpio-ranges = <&iomuxc 0 64 32>;
d02e1349 JL	278	};
	279
	280	gpio4: gpio@4004c000 {
	281	compatible = "fsl,vf610-gpio";
	282	reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
2bc88b1b	283	interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	284	gpio-controller;
	285	#gpio-cells = <2>;
	286	interrupt-controller;
	287	#interrupt-cells = <2>;
36af8f3e	288	gpio-ranges = <&iomuxc 0 96 32>;
d02e1349 JL	289	};
	290
	291	gpio5: gpio@4004d000 {
	292	compatible = "fsl,vf610-gpio";
	293	reg = <0x4004d000 0x1000 0x400ff100 0x40>;
2bc88b1b	294	interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	295	gpio-controller;
	296	#gpio-cells = <2>;
	297	interrupt-controller;
	298	#interrupt-cells = <2>;
36af8f3e	299	gpio-ranges = <&iomuxc 0 128 7>;
d02e1349 JL	300	};
d02e1349 JL	301
e34a68a3 SA	302	anatop: anatop@40050000 {
	303	compatible = "fsl,vf610-anatop", "syscon";
	304	reg = <0x40050000 0x400>;
	305	};
	306
	307	usbphy0: usbphy@40050800 {
	308	compatible = "fsl,vf610-usbphy";
	309	reg = <0x40050800 0x400>;
	310	interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
	311	clocks = <&clks VF610_CLK_USBPHY0>;
	312	fsl,anatop = <&anatop>;
	313	};
	314
	315	usbphy1: usbphy@40050c00 {
	316	compatible = "fsl,vf610-usbphy";
	317	reg = <0x40050c00 0x400>;
	318	interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
	319	clocks = <&clks VF610_CLK_USBPHY1>;
	320	fsl,anatop = <&anatop>;
d02e1349 JL	321	};
	322
	323	i2c0: i2c@40066000 {
	324	#address-cells = <1>;
	325	#size-cells = <0>;
	326	compatible = "fsl,vf610-i2c";
	327	reg = <0x40066000 0x1000>;
2bc88b1b	328	interrupts =<0 71 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	329	clocks = <&clks VF610_CLK_I2C0>;
d02e1349 JL	330	clock-names = "ipg";
b4e5e84d YY	331	dmas = <&edma0 0 50>,
	332	<&edma0 0 51>;
	333	dma-names = "rx","tx";
d02e1349 JL	334	status = "disabled";
	335	};
	336
	337	clks: ccm@4006b000 {
	338	compatible = "fsl,vf610-ccm";
	339	reg = <0x4006b000 0x1000>;
	340	#clock-cells = <1>;
	341	};
e34a68a3 SA	342
	343	usbdev0: usb@40034000 {
	344	compatible = "fsl,vf610-usb", "fsl,imx27-usb";
	345	reg = <0x40034000 0x800>;
	346	interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
	347	clocks = <&clks VF610_CLK_USBC0>;
	348	fsl,usbphy = <&usbphy0>;
763dab22	349	fsl,usbmisc = <&usbmisc0 0>;
e34a68a3 SA	350	dr_mode = "peripheral";
	351	status = "disabled";
	352	};
	353
763dab22 SA	354	usbmisc0: usb@40034800 {
	355	#index-cells = <1>;
	356	compatible = "fsl,vf610-usbmisc";
	357	reg = <0x40034800 0x200>;
	358	clocks = <&clks VF610_CLK_USBC0>;
	359	};
d02e1349 JL	360	};
	361
	362	aips1: aips-bus@40080000 {
	363	compatible = "fsl,aips-bus", "simple-bus";
	364	#address-cells = <1>;
	365	#size-cells = <1>;
	366	reg = <0x40080000 0x80000>;
	367	ranges;
	368
b93293b9 JL	369	edma1: dma-controller@40098000 {
	370	#dma-cells = <2>;
	371	compatible = "fsl,vf610-edma";
	372	reg = <0x40098000 0x2000>,
	373	<0x400a1000 0x1000>,
	374	<0x400a2000 0x1000>;
	375	interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>,
	376	<0 11 IRQ_TYPE_LEVEL_HIGH>;
	377	interrupt-names = "edma-tx", "edma-err";
	378	dma-channels = <32>;
	379	clock-names = "dmamux0", "dmamux1";
	380	clocks = <&clks VF610_CLK_DMAMUX2>,
	381	<&clks VF610_CLK_DMAMUX3>;
	382	};
	383
d02e1349 JL	384	uart4: serial@400a9000 {
	385	compatible = "fsl,vf610-lpuart";
	386	reg = <0x400a9000 0x1000>;
2bc88b1b	387	interrupts = <0 65 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	388	clocks = <&clks VF610_CLK_UART4>;
	389	clock-names = "ipg";
	390	status = "disabled";
	391	};
	392
	393	uart5: serial@400aa000 {
	394	compatible = "fsl,vf610-lpuart";
	395	reg = <0x400aa000 0x1000>;
2bc88b1b	396	interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	397	clocks = <&clks VF610_CLK_UART5>;
	398	clock-names = "ipg";
	399	status = "disabled";
	400	};
	401
64436ff6 FD	402	adc1: adc@400bb000 {
	403	compatible = "fsl,vf610-adc";
	404	reg = <0x400bb000 0x1000>;
	405	interrupts = <0 54 0x04>;
	406	clocks = <&clks VF610_CLK_ADC1>;
	407	clock-names = "adc";
	408	status = "disabled";
	409	};
	410
0517fe6a CS	411	esdhc1: esdhc@400b2000 {
0517fe6a CS	412	compatible = "fsl,imx53-esdhc";
e7779620	413	reg = <0x400b2000 0x1000>;
0517fe6a CS	414	interrupts = <0 28 0x04>;
	415	clocks = <&clks VF610_CLK_IPG_BUS>,
	416	<&clks VF610_CLK_PLATFORM_BUS>,
	417	<&clks VF610_CLK_ESDHC1>;
	418	clock-names = "ipg", "ahb", "per";
	419	status = "disabled";
	420	};
	421
e34a68a3 SA	422	usbh1: usb@400b4000 {
	423	compatible = "fsl,vf610-usb", "fsl,imx27-usb";
	424	reg = <0x400b4000 0x800>;
	425	interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
	426	clocks = <&clks VF610_CLK_USBC1>;
	427	fsl,usbphy = <&usbphy1>;
763dab22	428	fsl,usbmisc = <&usbmisc1 0>;
e34a68a3 SA	429	dr_mode = "host";
	430	status = "disabled";
	431	};
	432
763dab22 SA	433	usbmisc1: usb@400b4800 {
	434	#index-cells = <1>;
	435	compatible = "fsl,vf610-usbmisc";
	436	reg = <0x400b4800 0x200>;
	437	clocks = <&clks VF610_CLK_USBC1>;
	438	};
	439
07513e13 XL	440	ftm: ftm@400b8000 {
	441	compatible = "fsl,ftm-timer";
	442	reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
	443	interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
	444	clock-names = "ftm-evt", "ftm-src",
	445	"ftm-evt-counter-en", "ftm-src-counter-en";
	446	clocks = <&clks VF610_CLK_FTM2>,
	447	<&clks VF610_CLK_FTM3>,
	448	<&clks VF610_CLK_FTM2_EXT_FIX_EN>,
	449	<&clks VF610_CLK_FTM3_EXT_FIX_EN>;
	450	status = "disabled";
	451	};
	452
d02e1349 JL	453	fec0: ethernet@400d0000 {
	454	compatible = "fsl,mvf600-fec";
	455	reg = <0x400d0000 0x1000>;
2bc88b1b	456	interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
4f71612e SG	457	clocks = <&clks VF610_CLK_ENET0>,
4f71612e SG	458	<&clks VF610_CLK_ENET0>,
d02e1349 JL	459	<&clks VF610_CLK_ENET>;
	460	clock-names = "ipg", "ahb", "ptp";
	461	status = "disabled";
	462	};
	463
	464	fec1: ethernet@400d1000 {
	465	compatible = "fsl,mvf600-fec";
	466	reg = <0x400d1000 0x1000>;
2bc88b1b	467	interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
4f71612e SG	468	clocks = <&clks VF610_CLK_ENET1>,
4f71612e SG	469	<&clks VF610_CLK_ENET1>,
d02e1349 JL	470	<&clks VF610_CLK_ENET>;
	471	clock-names = "ipg", "ahb", "ptp";
	472	status = "disabled";
	473	};
69603fbb SA	474
	475	can1: flexcan@400d4000 {
	476	compatible = "fsl,vf610-flexcan";
	477	reg = <0x400d4000 0x4000>;
	478	interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;
	479	clocks = <&clks VF610_CLK_FLEXCAN1>,
	480	<&clks VF610_CLK_FLEXCAN1>;
	481	clock-names = "ipg", "per";
	482	status = "disabled";
	483	};
	484
d02e1349 JL	485	};
	486	};
	487	};