[deliverable/linux.git] / arch / arm / boot / dts / vf610.dtsi

/*
 * Copyright 2013 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include "skeleton.dtsi"
#include "vf610-pinfunc.h"
#include <dt-bindings/clock/vf610-clock.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	aliases {
		can0 = &can0;
		can1 = &can1;
		serial0 = &uart0;
		serial1 = &uart1;
		serial2 = &uart2;
		serial3 = &uart3;
		serial4 = &uart4;
		serial5 = &uart5;
		gpio0 = &gpio1;
		gpio1 = &gpio2;
		gpio2 = &gpio3;
		gpio3 = &gpio4;
		gpio4 = &gpio5;
		usbphy0 = &usbphy0;
		usbphy1 = &usbphy1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,cortex-a5";
			device_type = "cpu";
			reg = <0x0>;
			next-level-cache = <&L2>;
		};
	};

	fxosc: fxosc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24000000>;
	};

	sxosc: sxosc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <32768>;
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&intc>;
		ranges;

		aips0: aips-bus@40000000 {
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			interrupt-parent = <&intc>;
			reg = <0x40000000 0x70000>;
			ranges;

			intc: interrupt-controller@40002000 {
				compatible = "arm,cortex-a9-gic";
				#interrupt-cells = <3>;
				interrupt-controller;
				reg = <0x40003000 0x1000>,
				      <0x40002100 0x100>;
			};

			global_timer: timer@40002200 {
				compatible = "arm,cortex-a9-global-timer";
				reg = <0x40002200 0x20>;
				interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_PLATFORM_BUS>;
			};

			L2: l2-cache@40006000 {
				compatible = "arm,pl310-cache";
				reg = <0x40006000 0x1000>;
				cache-unified;
				cache-level = <2>;
				arm,data-latency = <1 1 1>;
				arm,tag-latency = <2 2 2>;
			};

			edma0: dma-controller@40018000 {
				#dma-cells = <2>;
				compatible = "fsl,vf610-edma";
				reg = <0x40018000 0x2000>,
					<0x40024000 0x1000>,
					<0x40025000 0x1000>;
				interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>,
						<0 9 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "edma-tx", "edma-err";
				dma-channels = <32>;
				clock-names = "dmamux0", "dmamux1";
				clocks = <&clks VF610_CLK_DMAMUX0>,
					<&clks VF610_CLK_DMAMUX1>;
			};

			can0: flexcan@40020000 {
				compatible = "fsl,vf610-flexcan";
				reg = <0x40020000 0x4000>;
				interrupts = <0 58 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_FLEXCAN0>,
					 <&clks VF610_CLK_FLEXCAN0>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart0: serial@40027000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40027000 0x1000>;
				interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART0>;
				clock-names = "ipg";
				dmas = <&edma0 0 2>,
					<&edma0 0 3>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			uart1: serial@40028000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40028000 0x1000>;
				interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART1>;
				clock-names = "ipg";
				dmas = <&edma0 0 4>,
					<&edma0 0 5>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			uart2: serial@40029000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40029000 0x1000>;
				interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART2>;
				clock-names = "ipg";
				dmas = <&edma0 0 6>,
					<&edma0 0 7>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			uart3: serial@4002a000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x4002a000 0x1000>;
				interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART3>;
				clock-names = "ipg";
				dmas = <&edma0 0 8>,
					<&edma0 0 9>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			dspi0: dspi0@4002c000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-dspi";
				reg = <0x4002c000 0x1000>;
				interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_DSPI0>;
				clock-names = "dspi";
				spi-num-chipselects = <5>;
				status = "disabled";
			};

			sai2: sai@40031000 {
				compatible = "fsl,vf610-sai";
				reg = <0x40031000 0x1000>;
				interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_SAI2>;
				clock-names = "sai";
				dma-names = "tx", "rx";
				dmas = <&edma0 0 21>,
					<&edma0 0 20>;
				status = "disabled";
			};

			pit: pit@40037000 {
				compatible = "fsl,vf610-pit";
				reg = <0x40037000 0x1000>;
				interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_PIT>;
				clock-names = "pit";
			};

			pwm0: pwm@40038000 {
				compatible = "fsl,vf610-ftm-pwm";
				#pwm-cells = <3>;
				reg = <0x40038000 0x1000>;
				clock-names = "ftm_sys", "ftm_ext",
					      "ftm_fix", "ftm_cnt_clk_en";
				clocks = <&clks VF610_CLK_FTM0>,
					<&clks VF610_CLK_FTM0_EXT_SEL>,
					<&clks VF610_CLK_FTM0_FIX_SEL>,
					<&clks VF610_CLK_FTM0_EXT_FIX_EN>;
				status = "disabled";
			};

			pwm1: pwm@40039000 {
				compatible = "fsl,vf610-ftm-pwm";
				#pwm-cells = <3>;
				reg = <0x40039000 0x1000>;
				clock-names = "ftm_sys", "ftm_ext",
					      "ftm_fix", "ftm_cnt_clk_en";
				clocks = <&clks VF610_CLK_FTM1>,
					<&clks VF610_CLK_FTM1_EXT_SEL>,
					<&clks VF610_CLK_FTM1_FIX_SEL>,
					<&clks VF610_CLK_FTM1_EXT_FIX_EN>;
				status = "disabled";
			};

			adc0: adc@4003b000 {
				compatible = "fsl,vf610-adc";
				reg = <0x4003b000 0x1000>;
				interrupts = <0 53 0x04>;
				clocks = <&clks VF610_CLK_ADC0>;
				clock-names = "adc";
				status = "disabled";
			};

			wdog@4003e000 {
				compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
				reg = <0x4003e000 0x1000>;
				clocks = <&clks VF610_CLK_WDT>;
				clock-names = "wdog";
			};

			qspi0: quadspi@40044000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-qspi";
				reg = <0x40044000 0x1000>;
				interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_QSPI0_EN>,
					<&clks VF610_CLK_QSPI0>;
				clock-names = "qspi_en", "qspi";
				status = "disabled";
			};

			iomuxc: iomuxc@40048000 {
				compatible = "fsl,vf610-iomuxc";
				reg = <0x40048000 0x1000>;
				#gpio-range-cells = <3>;
			};

			gpio1: gpio@40049000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x40049000 0x1000 0x400ff000 0x40>;
				interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 0 32>;
			};

			gpio2: gpio@4004a000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004a000 0x1000 0x400ff040 0x40>;
				interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 32 32>;
			};

			gpio3: gpio@4004b000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004b000 0x1000 0x400ff080 0x40>;
				interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 64 32>;
			};

			gpio4: gpio@4004c000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
				interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 96 32>;
			};

			gpio5: gpio@4004d000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004d000 0x1000 0x400ff100 0x40>;
				interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 128 7>;
			};

			anatop: anatop@40050000 {
				compatible = "fsl,vf610-anatop", "syscon";
				reg = <0x40050000 0x400>;
			};

			usbphy0: usbphy@40050800 {
				compatible = "fsl,vf610-usbphy";
				reg = <0x40050800 0x400>;
				interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBPHY0>;
				fsl,anatop = <&anatop>;
			};

			usbphy1: usbphy@40050c00 {
				compatible = "fsl,vf610-usbphy";
				reg = <0x40050c00 0x400>;
				interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBPHY1>;
				fsl,anatop = <&anatop>;
			};

			i2c0: i2c@40066000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-i2c";
				reg = <0x40066000 0x1000>;
				interrupts =<0 71 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_I2C0>;
				clock-names = "ipg";
				dmas = <&edma0 0 50>,
					<&edma0 0 51>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			clks: ccm@4006b000 {
				compatible = "fsl,vf610-ccm";
				reg = <0x4006b000 0x1000>;
				clocks = <&sxosc>, <&fxosc>;
				clock-names = "sxosc", "fxosc";
				#clock-cells = <1>;
			};

			usbdev0: usb@40034000 {
				compatible = "fsl,vf610-usb", "fsl,imx27-usb";
				reg = <0x40034000 0x800>;
				interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBC0>;
				fsl,usbphy = <&usbphy0>;
				fsl,usbmisc = <&usbmisc0 0>;
				dr_mode = "peripheral";
				status = "disabled";
			};

			usbmisc0: usb@40034800 {
				#index-cells = <1>;
				compatible = "fsl,vf610-usbmisc";
				reg = <0x40034800 0x200>;
				clocks = <&clks VF610_CLK_USBC0>;
			};
		};

		aips1: aips-bus@40080000 {
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40080000 0x80000>;
			ranges;

			edma1: dma-controller@40098000 {
				#dma-cells = <2>;
				compatible = "fsl,vf610-edma";
				reg = <0x40098000 0x2000>,
					<0x400a1000 0x1000>,
					<0x400a2000 0x1000>;
				interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>,
						<0 11 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "edma-tx", "edma-err";
				dma-channels = <32>;
				clock-names = "dmamux0", "dmamux1";
				clocks = <&clks VF610_CLK_DMAMUX2>,
					<&clks VF610_CLK_DMAMUX3>;
			};

			uart4: serial@400a9000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x400a9000 0x1000>;
				interrupts = <0 65 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART4>;
				clock-names = "ipg";
				status = "disabled";
			};

			uart5: serial@400aa000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x400aa000 0x1000>;
				interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART5>;
				clock-names = "ipg";
				status = "disabled";
			};

			adc1: adc@400bb000 {
				compatible = "fsl,vf610-adc";
				reg = <0x400bb000 0x1000>;
				interrupts = <0 54 0x04>;
				clocks = <&clks VF610_CLK_ADC1>;
				clock-names = "adc";
				status = "disabled";
			};

			esdhc1: esdhc@400b2000 {
				compatible = "fsl,imx53-esdhc";
				reg = <0x400b2000 0x1000>;
				interrupts = <0 28 0x04>;
				clocks = <&clks VF610_CLK_IPG_BUS>,
					<&clks VF610_CLK_PLATFORM_BUS>,
					<&clks VF610_CLK_ESDHC1>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			usbh1: usb@400b4000 {
				compatible = "fsl,vf610-usb", "fsl,imx27-usb";
				reg = <0x400b4000 0x800>;
				interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBC1>;
				fsl,usbphy = <&usbphy1>;
				fsl,usbmisc = <&usbmisc1 0>;
				dr_mode = "host";
				status = "disabled";
			};

			usbmisc1: usb@400b4800 {
				#index-cells = <1>;
				compatible = "fsl,vf610-usbmisc";
				reg = <0x400b4800 0x200>;
				clocks = <&clks VF610_CLK_USBC1>;
			};

			ftm: ftm@400b8000 {
				compatible = "fsl,ftm-timer";
				reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
				interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
				clock-names = "ftm-evt", "ftm-src",
					"ftm-evt-counter-en", "ftm-src-counter-en";
				clocks = <&clks VF610_CLK_FTM2>,
					<&clks VF610_CLK_FTM3>,
					<&clks VF610_CLK_FTM2_EXT_FIX_EN>,
					<&clks VF610_CLK_FTM3_EXT_FIX_EN>;
				status = "disabled";
			};

			fec0: ethernet@400d0000 {
				compatible = "fsl,mvf600-fec";
				reg = <0x400d0000 0x1000>;
				interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_ENET0>,
					<&clks VF610_CLK_ENET0>,
					<&clks VF610_CLK_ENET>;
				clock-names = "ipg", "ahb", "ptp";
				status = "disabled";
			};

			fec1: ethernet@400d1000 {
				compatible = "fsl,mvf600-fec";
				reg = <0x400d1000 0x1000>;
				interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_ENET1>,
					<&clks VF610_CLK_ENET1>,
					<&clks VF610_CLK_ENET>;
				clock-names = "ipg", "ahb", "ptp";
				status = "disabled";
			};

			can1: flexcan@400d4000 {
				compatible = "fsl,vf610-flexcan";
				reg = <0x400d4000 0x4000>;
				interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_FLEXCAN1>,
					 <&clks VF610_CLK_FLEXCAN1>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

		};
	};
};
Commit	Line	Data
d02e1349 JL	1	/*
	2	* Copyright 2013 Freescale Semiconductor, Inc.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*/
	9
	10	#include "skeleton.dtsi"
	11	#include "vf610-pinfunc.h"
	12	#include <dt-bindings/clock/vf610-clock.h>
2bc88b1b	13	#include <dt-bindings/interrupt-controller/irq.h>
81c48319	14	#include <dt-bindings/interrupt-controller/arm-gic.h>
d02e1349 JL	15
	16	/ {
	17	aliases {
69603fbb SA	18	can0 = &can0;
69603fbb SA	19	can1 = &can1;
d02e1349 JL	20	serial0 = &uart0;
	21	serial1 = &uart1;
	22	serial2 = &uart2;
	23	serial3 = &uart3;
	24	serial4 = &uart4;
	25	serial5 = &uart5;
	26	gpio0 = &gpio1;
	27	gpio1 = &gpio2;
	28	gpio2 = &gpio3;
	29	gpio3 = &gpio4;
	30	gpio4 = &gpio5;
e34a68a3 SA	31	usbphy0 = &usbphy0;
e34a68a3 SA	32	usbphy1 = &usbphy1;
d02e1349 JL	33	};
	34
	35	cpus {
	36	#address-cells = <1>;
	37	#size-cells = <0>;
	38
	39	cpu@0 {
	40	compatible = "arm,cortex-a5";
	41	device_type = "cpu";
	42	reg = <0x0>;
	43	next-level-cache = <&L2>;
	44	};
	45	};
	46
3f3ebfb8 SA	47	fxosc: fxosc {
	48	compatible = "fixed-clock";
	49	#clock-cells = <0>;
	50	clock-frequency = <24000000>;
	51	};
d02e1349	52
3f3ebfb8 SA	53	sxosc: sxosc {
	54	compatible = "fixed-clock";
	55	#clock-cells = <0>;
	56	clock-frequency = <32768>;
d02e1349 JL	57	};
	58
	59	soc {
	60	#address-cells = <1>;
	61	#size-cells = <1>;
	62	compatible = "simple-bus";
	63	interrupt-parent = <&intc>;
	64	ranges;
	65
	66	aips0: aips-bus@40000000 {
	67	compatible = "fsl,aips-bus", "simple-bus";
	68	#address-cells = <1>;
	69	#size-cells = <1>;
	70	interrupt-parent = <&intc>;
	71	reg = <0x40000000 0x70000>;
	72	ranges;
	73
	74	intc: interrupt-controller@40002000 {
	75	compatible = "arm,cortex-a9-gic";
	76	#interrupt-cells = <3>;
d02e1349 JL	77	interrupt-controller;
	78	reg = <0x40003000 0x1000>,
	79	<0x40002100 0x100>;
	80	};
	81
81c48319 SA	82	global_timer: timer@40002200 {
	83	compatible = "arm,cortex-a9-global-timer";
	84	reg = <0x40002200 0x20>;
	85	interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
	86	clocks = <&clks VF610_CLK_PLATFORM_BUS>;
	87	};
	88
d02e1349 JL	89	L2: l2-cache@40006000 {
	90	compatible = "arm,pl310-cache";
	91	reg = <0x40006000 0x1000>;
	92	cache-unified;
	93	cache-level = <2>;
	94	arm,data-latency = <1 1 1>;
	95	arm,tag-latency = <2 2 2>;
	96	};
	97
b93293b9 JL	98	edma0: dma-controller@40018000 {
	99	#dma-cells = <2>;
	100	compatible = "fsl,vf610-edma";
	101	reg = <0x40018000 0x2000>,
	102	<0x40024000 0x1000>,
	103	<0x40025000 0x1000>;
	104	interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>,
	105	<0 9 IRQ_TYPE_LEVEL_HIGH>;
	106	interrupt-names = "edma-tx", "edma-err";
	107	dma-channels = <32>;
	108	clock-names = "dmamux0", "dmamux1";
	109	clocks = <&clks VF610_CLK_DMAMUX0>,
	110	<&clks VF610_CLK_DMAMUX1>;
	111	};
	112
69603fbb SA	113	can0: flexcan@40020000 {
	114	compatible = "fsl,vf610-flexcan";
	115	reg = <0x40020000 0x4000>;
	116	interrupts = <0 58 IRQ_TYPE_LEVEL_HIGH>;
	117	clocks = <&clks VF610_CLK_FLEXCAN0>,
	118	<&clks VF610_CLK_FLEXCAN0>;
	119	clock-names = "ipg", "per";
	120	status = "disabled";
	121	};
	122
d02e1349 JL	123	uart0: serial@40027000 {
	124	compatible = "fsl,vf610-lpuart";
	125	reg = <0x40027000 0x1000>;
2bc88b1b	126	interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	127	clocks = <&clks VF610_CLK_UART0>;
d02e1349 JL	128	clock-names = "ipg";
8fbc8c07 YY	129	dmas = <&edma0 0 2>,
	130	<&edma0 0 3>;
	131	dma-names = "rx","tx";
d02e1349 JL	132	status = "disabled";
	133	};
	134
	135	uart1: serial@40028000 {
	136	compatible = "fsl,vf610-lpuart";
	137	reg = <0x40028000 0x1000>;
2bc88b1b	138	interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	139	clocks = <&clks VF610_CLK_UART1>;
d02e1349 JL	140	clock-names = "ipg";
8fbc8c07 YY	141	dmas = <&edma0 0 4>,
	142	<&edma0 0 5>;
	143	dma-names = "rx","tx";
d02e1349 JL	144	status = "disabled";
	145	};
	146
	147	uart2: serial@40029000 {
	148	compatible = "fsl,vf610-lpuart";
	149	reg = <0x40029000 0x1000>;
2bc88b1b	150	interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	151	clocks = <&clks VF610_CLK_UART2>;
d02e1349 JL	152	clock-names = "ipg";
8fbc8c07 YY	153	dmas = <&edma0 0 6>,
	154	<&edma0 0 7>;
	155	dma-names = "rx","tx";
d02e1349 JL	156	status = "disabled";
	157	};
	158
	159	uart3: serial@4002a000 {
	160	compatible = "fsl,vf610-lpuart";
	161	reg = <0x4002a000 0x1000>;
2bc88b1b	162	interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	163	clocks = <&clks VF610_CLK_UART3>;
d02e1349 JL	164	clock-names = "ipg";
8fbc8c07 YY	165	dmas = <&edma0 0 8>,
	166	<&edma0 0 9>;
	167	dma-names = "rx","tx";
d02e1349 JL	168	status = "disabled";
	169	};
	170
d7a9d8e2 CF	171	dspi0: dspi0@4002c000 {
	172	#address-cells = <1>;
	173	#size-cells = <0>;
	174	compatible = "fsl,vf610-dspi";
	175	reg = <0x4002c000 0x1000>;
2bc88b1b	176	interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
d7a9d8e2 CF	177	clocks = <&clks VF610_CLK_DSPI0>;
	178	clock-names = "dspi";
	179	spi-num-chipselects = <5>;
	180	status = "disabled";
	181	};
	182
d02e1349 JL	183	sai2: sai@40031000 {
	184	compatible = "fsl,vf610-sai";
	185	reg = <0x40031000 0x1000>;
2bc88b1b	186	interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	187	clocks = <&clks VF610_CLK_SAI2>;
d02e1349 JL	188	clock-names = "sai";
1d412417 XL	189	dma-names = "tx", "rx";
	190	dmas = <&edma0 0 21>,
	191	<&edma0 0 20>;
d02e1349 JL	192	status = "disabled";
	193	};
	194
	195	pit: pit@40037000 {
	196	compatible = "fsl,vf610-pit";
	197	reg = <0x40037000 0x1000>;
2bc88b1b	198	interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	199	clocks = <&clks VF610_CLK_PIT>;
	200	clock-names = "pit";
	201	};
	202
7c978e0f XL	203	pwm0: pwm@40038000 {
	204	compatible = "fsl,vf610-ftm-pwm";
	205	#pwm-cells = <3>;
	206	reg = <0x40038000 0x1000>;
	207	clock-names = "ftm_sys", "ftm_ext",
	208	"ftm_fix", "ftm_cnt_clk_en";
	209	clocks = <&clks VF610_CLK_FTM0>,
	210	<&clks VF610_CLK_FTM0_EXT_SEL>,
	211	<&clks VF610_CLK_FTM0_FIX_SEL>,
	212	<&clks VF610_CLK_FTM0_EXT_FIX_EN>;
	213	status = "disabled";
	214	};
	215
a1d00bc5 BD	216	pwm1: pwm@40039000 {
	217	compatible = "fsl,vf610-ftm-pwm";
	218	#pwm-cells = <3>;
	219	reg = <0x40039000 0x1000>;
	220	clock-names = "ftm_sys", "ftm_ext",
	221	"ftm_fix", "ftm_cnt_clk_en";
	222	clocks = <&clks VF610_CLK_FTM1>,
	223	<&clks VF610_CLK_FTM1_EXT_SEL>,
	224	<&clks VF610_CLK_FTM1_FIX_SEL>,
	225	<&clks VF610_CLK_FTM1_EXT_FIX_EN>;
	226	status = "disabled";
	227	};
	228
64436ff6 FD	229	adc0: adc@4003b000 {
	230	compatible = "fsl,vf610-adc";
	231	reg = <0x4003b000 0x1000>;
	232	interrupts = <0 53 0x04>;
	233	clocks = <&clks VF610_CLK_ADC0>;
	234	clock-names = "adc";
	235	status = "disabled";
	236	};
	237
d02e1349 JL	238	wdog@4003e000 {
	239	compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
	240	reg = <0x4003e000 0x1000>;
	241	clocks = <&clks VF610_CLK_WDT>;
	242	clock-names = "wdog";
	243	};
	244
	245	qspi0: quadspi@40044000 {
	246	#address-cells = <1>;
	247	#size-cells = <0>;
	248	compatible = "fsl,vf610-qspi";
	249	reg = <0x40044000 0x1000>;
2bc88b1b	250	interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	251	clocks = <&clks VF610_CLK_QSPI0_EN>,
	252	<&clks VF610_CLK_QSPI0>;
	253	clock-names = "qspi_en", "qspi";
	254	status = "disabled";
	255	};
	256
	257	iomuxc: iomuxc@40048000 {
	258	compatible = "fsl,vf610-iomuxc";
	259	reg = <0x40048000 0x1000>;
36af8f3e	260	#gpio-range-cells = <3>;
d02e1349 JL	261	};
	262
	263	gpio1: gpio@40049000 {
	264	compatible = "fsl,vf610-gpio";
	265	reg = <0x40049000 0x1000 0x400ff000 0x40>;
2bc88b1b	266	interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	267	gpio-controller;
	268	#gpio-cells = <2>;
	269	interrupt-controller;
	270	#interrupt-cells = <2>;
36af8f3e	271	gpio-ranges = <&iomuxc 0 0 32>;
d02e1349 JL	272	};
	273
	274	gpio2: gpio@4004a000 {
	275	compatible = "fsl,vf610-gpio";
	276	reg = <0x4004a000 0x1000 0x400ff040 0x40>;
2bc88b1b	277	interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	278	gpio-controller;
	279	#gpio-cells = <2>;
	280	interrupt-controller;
	281	#interrupt-cells = <2>;
36af8f3e	282	gpio-ranges = <&iomuxc 0 32 32>;
d02e1349 JL	283	};
	284
	285	gpio3: gpio@4004b000 {
	286	compatible = "fsl,vf610-gpio";
	287	reg = <0x4004b000 0x1000 0x400ff080 0x40>;
2bc88b1b	288	interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	289	gpio-controller;
	290	#gpio-cells = <2>;
	291	interrupt-controller;
	292	#interrupt-cells = <2>;
36af8f3e	293	gpio-ranges = <&iomuxc 0 64 32>;
d02e1349 JL	294	};
	295
	296	gpio4: gpio@4004c000 {
	297	compatible = "fsl,vf610-gpio";
	298	reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
2bc88b1b	299	interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	300	gpio-controller;
	301	#gpio-cells = <2>;
	302	interrupt-controller;
	303	#interrupt-cells = <2>;
36af8f3e	304	gpio-ranges = <&iomuxc 0 96 32>;
d02e1349 JL	305	};
	306
	307	gpio5: gpio@4004d000 {
	308	compatible = "fsl,vf610-gpio";
	309	reg = <0x4004d000 0x1000 0x400ff100 0x40>;
2bc88b1b	310	interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	311	gpio-controller;
	312	#gpio-cells = <2>;
	313	interrupt-controller;
	314	#interrupt-cells = <2>;
36af8f3e	315	gpio-ranges = <&iomuxc 0 128 7>;
d02e1349 JL	316	};
d02e1349 JL	317
e34a68a3 SA	318	anatop: anatop@40050000 {
	319	compatible = "fsl,vf610-anatop", "syscon";
	320	reg = <0x40050000 0x400>;
	321	};
	322
	323	usbphy0: usbphy@40050800 {
	324	compatible = "fsl,vf610-usbphy";
	325	reg = <0x40050800 0x400>;
	326	interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
	327	clocks = <&clks VF610_CLK_USBPHY0>;
	328	fsl,anatop = <&anatop>;
	329	};
	330
	331	usbphy1: usbphy@40050c00 {
	332	compatible = "fsl,vf610-usbphy";
	333	reg = <0x40050c00 0x400>;
	334	interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
	335	clocks = <&clks VF610_CLK_USBPHY1>;
	336	fsl,anatop = <&anatop>;
d02e1349 JL	337	};
	338
	339	i2c0: i2c@40066000 {
	340	#address-cells = <1>;
	341	#size-cells = <0>;
	342	compatible = "fsl,vf610-i2c";
	343	reg = <0x40066000 0x1000>;
2bc88b1b	344	interrupts =<0 71 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	345	clocks = <&clks VF610_CLK_I2C0>;
d02e1349 JL	346	clock-names = "ipg";
b4e5e84d YY	347	dmas = <&edma0 0 50>,
	348	<&edma0 0 51>;
	349	dma-names = "rx","tx";
d02e1349 JL	350	status = "disabled";
	351	};
	352
	353	clks: ccm@4006b000 {
	354	compatible = "fsl,vf610-ccm";
	355	reg = <0x4006b000 0x1000>;
3f3ebfb8 SA	356	clocks = <&sxosc>, <&fxosc>;
3f3ebfb8 SA	357	clock-names = "sxosc", "fxosc";
d02e1349 JL	358	#clock-cells = <1>;
d02e1349 JL	359	};
e34a68a3 SA	360
	361	usbdev0: usb@40034000 {
	362	compatible = "fsl,vf610-usb", "fsl,imx27-usb";
	363	reg = <0x40034000 0x800>;
	364	interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
	365	clocks = <&clks VF610_CLK_USBC0>;
	366	fsl,usbphy = <&usbphy0>;
763dab22	367	fsl,usbmisc = <&usbmisc0 0>;
e34a68a3 SA	368	dr_mode = "peripheral";
	369	status = "disabled";
	370	};
	371
763dab22 SA	372	usbmisc0: usb@40034800 {
	373	#index-cells = <1>;
	374	compatible = "fsl,vf610-usbmisc";
	375	reg = <0x40034800 0x200>;
	376	clocks = <&clks VF610_CLK_USBC0>;
	377	};
d02e1349 JL	378	};
	379
	380	aips1: aips-bus@40080000 {
	381	compatible = "fsl,aips-bus", "simple-bus";
	382	#address-cells = <1>;
	383	#size-cells = <1>;
	384	reg = <0x40080000 0x80000>;
	385	ranges;
	386
b93293b9 JL	387	edma1: dma-controller@40098000 {
	388	#dma-cells = <2>;
	389	compatible = "fsl,vf610-edma";
	390	reg = <0x40098000 0x2000>,
	391	<0x400a1000 0x1000>,
	392	<0x400a2000 0x1000>;
	393	interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>,
	394	<0 11 IRQ_TYPE_LEVEL_HIGH>;
	395	interrupt-names = "edma-tx", "edma-err";
	396	dma-channels = <32>;
	397	clock-names = "dmamux0", "dmamux1";
	398	clocks = <&clks VF610_CLK_DMAMUX2>,
	399	<&clks VF610_CLK_DMAMUX3>;
	400	};
	401
d02e1349 JL	402	uart4: serial@400a9000 {
	403	compatible = "fsl,vf610-lpuart";
	404	reg = <0x400a9000 0x1000>;
2bc88b1b	405	interrupts = <0 65 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	406	clocks = <&clks VF610_CLK_UART4>;
	407	clock-names = "ipg";
	408	status = "disabled";
	409	};
	410
	411	uart5: serial@400aa000 {
	412	compatible = "fsl,vf610-lpuart";
	413	reg = <0x400aa000 0x1000>;
2bc88b1b	414	interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>;
d02e1349 JL	415	clocks = <&clks VF610_CLK_UART5>;
	416	clock-names = "ipg";
	417	status = "disabled";
	418	};
	419
64436ff6 FD	420	adc1: adc@400bb000 {
	421	compatible = "fsl,vf610-adc";
	422	reg = <0x400bb000 0x1000>;
	423	interrupts = <0 54 0x04>;
	424	clocks = <&clks VF610_CLK_ADC1>;
	425	clock-names = "adc";
	426	status = "disabled";
	427	};
	428
0517fe6a CS	429	esdhc1: esdhc@400b2000 {
0517fe6a CS	430	compatible = "fsl,imx53-esdhc";
e7779620	431	reg = <0x400b2000 0x1000>;
0517fe6a CS	432	interrupts = <0 28 0x04>;
	433	clocks = <&clks VF610_CLK_IPG_BUS>,
	434	<&clks VF610_CLK_PLATFORM_BUS>,
	435	<&clks VF610_CLK_ESDHC1>;
	436	clock-names = "ipg", "ahb", "per";
	437	status = "disabled";
	438	};
	439
e34a68a3 SA	440	usbh1: usb@400b4000 {
	441	compatible = "fsl,vf610-usb", "fsl,imx27-usb";
	442	reg = <0x400b4000 0x800>;
	443	interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
	444	clocks = <&clks VF610_CLK_USBC1>;
	445	fsl,usbphy = <&usbphy1>;
763dab22	446	fsl,usbmisc = <&usbmisc1 0>;
e34a68a3 SA	447	dr_mode = "host";
	448	status = "disabled";
	449	};
	450
763dab22 SA	451	usbmisc1: usb@400b4800 {
	452	#index-cells = <1>;
	453	compatible = "fsl,vf610-usbmisc";
	454	reg = <0x400b4800 0x200>;
	455	clocks = <&clks VF610_CLK_USBC1>;
	456	};
	457
07513e13 XL	458	ftm: ftm@400b8000 {
	459	compatible = "fsl,ftm-timer";
	460	reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
	461	interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
	462	clock-names = "ftm-evt", "ftm-src",
	463	"ftm-evt-counter-en", "ftm-src-counter-en";
	464	clocks = <&clks VF610_CLK_FTM2>,
	465	<&clks VF610_CLK_FTM3>,
	466	<&clks VF610_CLK_FTM2_EXT_FIX_EN>,
	467	<&clks VF610_CLK_FTM3_EXT_FIX_EN>;
	468	status = "disabled";
	469	};
	470
d02e1349 JL	471	fec0: ethernet@400d0000 {
	472	compatible = "fsl,mvf600-fec";
	473	reg = <0x400d0000 0x1000>;
2bc88b1b	474	interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
4f71612e SG	475	clocks = <&clks VF610_CLK_ENET0>,
4f71612e SG	476	<&clks VF610_CLK_ENET0>,
d02e1349 JL	477	<&clks VF610_CLK_ENET>;
	478	clock-names = "ipg", "ahb", "ptp";
	479	status = "disabled";
	480	};
	481
	482	fec1: ethernet@400d1000 {
	483	compatible = "fsl,mvf600-fec";
	484	reg = <0x400d1000 0x1000>;
2bc88b1b	485	interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
4f71612e SG	486	clocks = <&clks VF610_CLK_ENET1>,
4f71612e SG	487	<&clks VF610_CLK_ENET1>,
d02e1349 JL	488	<&clks VF610_CLK_ENET>;
	489	clock-names = "ipg", "ahb", "ptp";
	490	status = "disabled";
	491	};
69603fbb SA	492
	493	can1: flexcan@400d4000 {
	494	compatible = "fsl,vf610-flexcan";
	495	reg = <0x400d4000 0x4000>;
	496	interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;
	497	clocks = <&clks VF610_CLK_FLEXCAN1>,
	498	<&clks VF610_CLK_FLEXCAN1>;
	499	clock-names = "ipg", "per";
	500	status = "disabled";
	501	};
	502
d02e1349 JL	503	};
	504	};
	505	};