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efb45b30 SA |
1 | /* |
2 | * Copyright 2013 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | */ | |
9 | ||
10 | #include "vf610-pinfunc.h" | |
11 | #include <dt-bindings/clock/vf610-clock.h> | |
12 | #include <dt-bindings/interrupt-controller/irq.h> | |
2b36bda3 | 13 | #include <dt-bindings/gpio/gpio.h> |
efb45b30 SA |
14 | |
15 | / { | |
16 | aliases { | |
17 | can0 = &can0; | |
18 | can1 = &can1; | |
19 | serial0 = &uart0; | |
20 | serial1 = &uart1; | |
21 | serial2 = &uart2; | |
22 | serial3 = &uart3; | |
23 | serial4 = &uart4; | |
24 | serial5 = &uart5; | |
76713954 SA |
25 | gpio0 = &gpio0; |
26 | gpio1 = &gpio1; | |
27 | gpio2 = &gpio2; | |
28 | gpio3 = &gpio3; | |
29 | gpio4 = &gpio4; | |
efb45b30 SA |
30 | usbphy0 = &usbphy0; |
31 | usbphy1 = &usbphy1; | |
32 | }; | |
33 | ||
34 | fxosc: fxosc { | |
35 | compatible = "fixed-clock"; | |
36 | #clock-cells = <0>; | |
37 | clock-frequency = <24000000>; | |
38 | }; | |
39 | ||
40 | sxosc: sxosc { | |
41 | compatible = "fixed-clock"; | |
42 | #clock-cells = <0>; | |
43 | clock-frequency = <32768>; | |
44 | }; | |
45 | ||
0d018d73 SA |
46 | reboot: syscon-reboot { |
47 | compatible = "syscon-reboot"; | |
48 | regmap = <&src>; | |
49 | offset = <0x0>; | |
50 | mask = <0x1000>; | |
51 | }; | |
52 | ||
efb45b30 SA |
53 | soc { |
54 | #address-cells = <1>; | |
55 | #size-cells = <1>; | |
56 | compatible = "simple-bus"; | |
c09d0f7c | 57 | interrupt-parent = <&mscm_ir>; |
efb45b30 SA |
58 | ranges; |
59 | ||
60 | aips0: aips-bus@40000000 { | |
61 | compatible = "fsl,aips-bus", "simple-bus"; | |
62 | #address-cells = <1>; | |
63 | #size-cells = <1>; | |
64 | ranges; | |
65 | ||
c09d0f7c SA |
66 | mscm_cpucfg: cpucfg@40001000 { |
67 | compatible = "fsl,vf610-mscm-cpucfg", "syscon"; | |
68 | reg = <0x40001000 0x800>; | |
69 | }; | |
70 | ||
71 | mscm_ir: interrupt-controller@40001800 { | |
72 | compatible = "fsl,vf610-mscm-ir"; | |
73 | reg = <0x40001800 0x400>; | |
74 | fsl,cpucfg = <&mscm_cpucfg>; | |
75 | interrupt-controller; | |
76 | #interrupt-cells = <2>; | |
77 | }; | |
78 | ||
efb45b30 SA |
79 | edma0: dma-controller@40018000 { |
80 | #dma-cells = <2>; | |
81 | compatible = "fsl,vf610-edma"; | |
82 | reg = <0x40018000 0x2000>, | |
83 | <0x40024000 0x1000>, | |
84 | <0x40025000 0x1000>; | |
85 | dma-channels = <32>; | |
c09d0f7c SA |
86 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH>, |
87 | <9 IRQ_TYPE_LEVEL_HIGH>; | |
88 | interrupt-names = "edma-tx", "edma-err"; | |
efb45b30 SA |
89 | clock-names = "dmamux0", "dmamux1"; |
90 | clocks = <&clks VF610_CLK_DMAMUX0>, | |
91 | <&clks VF610_CLK_DMAMUX1>; | |
92 | status = "disabled"; | |
93 | }; | |
94 | ||
95 | can0: flexcan@40020000 { | |
96 | compatible = "fsl,vf610-flexcan"; | |
97 | reg = <0x40020000 0x4000>; | |
c09d0f7c | 98 | interrupts = <58 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
99 | clocks = <&clks VF610_CLK_FLEXCAN0>, |
100 | <&clks VF610_CLK_FLEXCAN0>; | |
101 | clock-names = "ipg", "per"; | |
102 | status = "disabled"; | |
103 | }; | |
104 | ||
105 | uart0: serial@40027000 { | |
106 | compatible = "fsl,vf610-lpuart"; | |
107 | reg = <0x40027000 0x1000>; | |
c09d0f7c | 108 | interrupts = <61 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
109 | clocks = <&clks VF610_CLK_UART0>; |
110 | clock-names = "ipg"; | |
111 | dmas = <&edma0 0 2>, | |
112 | <&edma0 0 3>; | |
113 | dma-names = "rx","tx"; | |
114 | status = "disabled"; | |
115 | }; | |
116 | ||
117 | uart1: serial@40028000 { | |
118 | compatible = "fsl,vf610-lpuart"; | |
119 | reg = <0x40028000 0x1000>; | |
c09d0f7c | 120 | interrupts = <62 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
121 | clocks = <&clks VF610_CLK_UART1>; |
122 | clock-names = "ipg"; | |
123 | dmas = <&edma0 0 4>, | |
124 | <&edma0 0 5>; | |
125 | dma-names = "rx","tx"; | |
126 | status = "disabled"; | |
127 | }; | |
128 | ||
129 | uart2: serial@40029000 { | |
130 | compatible = "fsl,vf610-lpuart"; | |
131 | reg = <0x40029000 0x1000>; | |
c09d0f7c | 132 | interrupts = <63 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
133 | clocks = <&clks VF610_CLK_UART2>; |
134 | clock-names = "ipg"; | |
135 | dmas = <&edma0 0 6>, | |
136 | <&edma0 0 7>; | |
137 | dma-names = "rx","tx"; | |
138 | status = "disabled"; | |
139 | }; | |
140 | ||
141 | uart3: serial@4002a000 { | |
142 | compatible = "fsl,vf610-lpuart"; | |
143 | reg = <0x4002a000 0x1000>; | |
c09d0f7c | 144 | interrupts = <64 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
145 | clocks = <&clks VF610_CLK_UART3>; |
146 | clock-names = "ipg"; | |
147 | dmas = <&edma0 0 8>, | |
148 | <&edma0 0 9>; | |
149 | dma-names = "rx","tx"; | |
150 | status = "disabled"; | |
151 | }; | |
152 | ||
153 | dspi0: dspi0@4002c000 { | |
154 | #address-cells = <1>; | |
155 | #size-cells = <0>; | |
156 | compatible = "fsl,vf610-dspi"; | |
157 | reg = <0x4002c000 0x1000>; | |
c09d0f7c | 158 | interrupts = <67 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
159 | clocks = <&clks VF610_CLK_DSPI0>; |
160 | clock-names = "dspi"; | |
161 | spi-num-chipselects = <5>; | |
162 | status = "disabled"; | |
163 | }; | |
164 | ||
1b545c17 BD |
165 | dspi1: dspi1@4002d000 { |
166 | #address-cells = <1>; | |
167 | #size-cells = <0>; | |
168 | compatible = "fsl,vf610-dspi"; | |
169 | reg = <0x4002d000 0x1000>; | |
c09d0f7c | 170 | interrupts = <68 IRQ_TYPE_LEVEL_HIGH>; |
1b545c17 BD |
171 | clocks = <&clks VF610_CLK_DSPI1>; |
172 | clock-names = "dspi"; | |
173 | spi-num-chipselects = <5>; | |
174 | status = "disabled"; | |
175 | }; | |
176 | ||
efb45b30 SA |
177 | sai2: sai@40031000 { |
178 | compatible = "fsl,vf610-sai"; | |
179 | reg = <0x40031000 0x1000>; | |
c09d0f7c | 180 | interrupts = <86 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
181 | clocks = <&clks VF610_CLK_SAI2>; |
182 | clock-names = "sai"; | |
183 | dma-names = "tx", "rx"; | |
184 | dmas = <&edma0 0 21>, | |
185 | <&edma0 0 20>; | |
186 | status = "disabled"; | |
187 | }; | |
188 | ||
189 | pit: pit@40037000 { | |
190 | compatible = "fsl,vf610-pit"; | |
191 | reg = <0x40037000 0x1000>; | |
c09d0f7c | 192 | interrupts = <39 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
193 | clocks = <&clks VF610_CLK_PIT>; |
194 | clock-names = "pit"; | |
195 | }; | |
196 | ||
197 | pwm0: pwm@40038000 { | |
198 | compatible = "fsl,vf610-ftm-pwm"; | |
199 | #pwm-cells = <3>; | |
200 | reg = <0x40038000 0x1000>; | |
201 | clock-names = "ftm_sys", "ftm_ext", | |
202 | "ftm_fix", "ftm_cnt_clk_en"; | |
203 | clocks = <&clks VF610_CLK_FTM0>, | |
204 | <&clks VF610_CLK_FTM0_EXT_SEL>, | |
205 | <&clks VF610_CLK_FTM0_FIX_SEL>, | |
206 | <&clks VF610_CLK_FTM0_EXT_FIX_EN>; | |
207 | status = "disabled"; | |
208 | }; | |
209 | ||
210 | pwm1: pwm@40039000 { | |
211 | compatible = "fsl,vf610-ftm-pwm"; | |
212 | #pwm-cells = <3>; | |
213 | reg = <0x40039000 0x1000>; | |
214 | clock-names = "ftm_sys", "ftm_ext", | |
215 | "ftm_fix", "ftm_cnt_clk_en"; | |
216 | clocks = <&clks VF610_CLK_FTM1>, | |
217 | <&clks VF610_CLK_FTM1_EXT_SEL>, | |
218 | <&clks VF610_CLK_FTM1_FIX_SEL>, | |
219 | <&clks VF610_CLK_FTM1_EXT_FIX_EN>; | |
220 | status = "disabled"; | |
221 | }; | |
222 | ||
223 | adc0: adc@4003b000 { | |
224 | compatible = "fsl,vf610-adc"; | |
225 | reg = <0x4003b000 0x1000>; | |
c09d0f7c | 226 | interrupts = <53 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
227 | clocks = <&clks VF610_CLK_ADC0>; |
228 | clock-names = "adc"; | |
9b1793af | 229 | #io-channel-cells = <1>; |
efb45b30 | 230 | status = "disabled"; |
def0641e SA |
231 | fsl,adck-max-frequency = <30000000>, <40000000>, |
232 | <20000000>; | |
efb45b30 SA |
233 | }; |
234 | ||
c134e09f | 235 | wdoga5: wdog@4003e000 { |
efb45b30 SA |
236 | compatible = "fsl,vf610-wdt", "fsl,imx21-wdt"; |
237 | reg = <0x4003e000 0x1000>; | |
c09d0f7c | 238 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
239 | clocks = <&clks VF610_CLK_WDT>; |
240 | clock-names = "wdog"; | |
241 | status = "disabled"; | |
242 | }; | |
243 | ||
244 | qspi0: quadspi@40044000 { | |
245 | #address-cells = <1>; | |
246 | #size-cells = <0>; | |
247 | compatible = "fsl,vf610-qspi"; | |
f4b89232 CT |
248 | reg = <0x40044000 0x1000>, <0x20000000 0x10000000>; |
249 | reg-names = "QuadSPI", "QuadSPI-memory"; | |
c09d0f7c | 250 | interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
251 | clocks = <&clks VF610_CLK_QSPI0_EN>, |
252 | <&clks VF610_CLK_QSPI0>; | |
253 | clock-names = "qspi_en", "qspi"; | |
254 | status = "disabled"; | |
255 | }; | |
256 | ||
257 | iomuxc: iomuxc@40048000 { | |
258 | compatible = "fsl,vf610-iomuxc"; | |
259 | reg = <0x40048000 0x1000>; | |
efb45b30 SA |
260 | }; |
261 | ||
76713954 | 262 | gpio0: gpio@40049000 { |
efb45b30 SA |
263 | compatible = "fsl,vf610-gpio"; |
264 | reg = <0x40049000 0x1000 0x400ff000 0x40>; | |
265 | gpio-controller; | |
266 | #gpio-cells = <2>; | |
c09d0f7c | 267 | interrupts = <107 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
268 | interrupt-controller; |
269 | #interrupt-cells = <2>; | |
270 | gpio-ranges = <&iomuxc 0 0 32>; | |
271 | }; | |
272 | ||
76713954 | 273 | gpio1: gpio@4004a000 { |
efb45b30 SA |
274 | compatible = "fsl,vf610-gpio"; |
275 | reg = <0x4004a000 0x1000 0x400ff040 0x40>; | |
276 | gpio-controller; | |
277 | #gpio-cells = <2>; | |
c09d0f7c | 278 | interrupts = <108 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
279 | interrupt-controller; |
280 | #interrupt-cells = <2>; | |
281 | gpio-ranges = <&iomuxc 0 32 32>; | |
282 | }; | |
283 | ||
76713954 | 284 | gpio2: gpio@4004b000 { |
efb45b30 SA |
285 | compatible = "fsl,vf610-gpio"; |
286 | reg = <0x4004b000 0x1000 0x400ff080 0x40>; | |
287 | gpio-controller; | |
288 | #gpio-cells = <2>; | |
c09d0f7c | 289 | interrupts = <109 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
290 | interrupt-controller; |
291 | #interrupt-cells = <2>; | |
292 | gpio-ranges = <&iomuxc 0 64 32>; | |
293 | }; | |
294 | ||
76713954 | 295 | gpio3: gpio@4004c000 { |
efb45b30 SA |
296 | compatible = "fsl,vf610-gpio"; |
297 | reg = <0x4004c000 0x1000 0x400ff0c0 0x40>; | |
298 | gpio-controller; | |
299 | #gpio-cells = <2>; | |
c09d0f7c | 300 | interrupts = <110 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
301 | interrupt-controller; |
302 | #interrupt-cells = <2>; | |
303 | gpio-ranges = <&iomuxc 0 96 32>; | |
304 | }; | |
305 | ||
76713954 | 306 | gpio4: gpio@4004d000 { |
efb45b30 SA |
307 | compatible = "fsl,vf610-gpio"; |
308 | reg = <0x4004d000 0x1000 0x400ff100 0x40>; | |
309 | gpio-controller; | |
310 | #gpio-cells = <2>; | |
c09d0f7c | 311 | interrupts = <111 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
312 | interrupt-controller; |
313 | #interrupt-cells = <2>; | |
314 | gpio-ranges = <&iomuxc 0 128 7>; | |
315 | }; | |
316 | ||
317 | anatop: anatop@40050000 { | |
318 | compatible = "fsl,vf610-anatop", "syscon"; | |
319 | reg = <0x40050000 0x400>; | |
320 | }; | |
321 | ||
322 | usbphy0: usbphy@40050800 { | |
323 | compatible = "fsl,vf610-usbphy"; | |
324 | reg = <0x40050800 0x400>; | |
c09d0f7c | 325 | interrupts = <50 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
326 | clocks = <&clks VF610_CLK_USBPHY0>; |
327 | fsl,anatop = <&anatop>; | |
328 | status = "disabled"; | |
329 | }; | |
330 | ||
331 | usbphy1: usbphy@40050c00 { | |
332 | compatible = "fsl,vf610-usbphy"; | |
333 | reg = <0x40050c00 0x400>; | |
c09d0f7c | 334 | interrupts = <51 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
335 | clocks = <&clks VF610_CLK_USBPHY1>; |
336 | fsl,anatop = <&anatop>; | |
337 | status = "disabled"; | |
338 | }; | |
339 | ||
340 | i2c0: i2c@40066000 { | |
341 | #address-cells = <1>; | |
342 | #size-cells = <0>; | |
343 | compatible = "fsl,vf610-i2c"; | |
344 | reg = <0x40066000 0x1000>; | |
c09d0f7c | 345 | interrupts = <71 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
346 | clocks = <&clks VF610_CLK_I2C0>; |
347 | clock-names = "ipg"; | |
348 | dmas = <&edma0 0 50>, | |
349 | <&edma0 0 51>; | |
350 | dma-names = "rx","tx"; | |
351 | status = "disabled"; | |
352 | }; | |
353 | ||
2d4e4a62 CT |
354 | i2c1: i2c@40067000 { |
355 | #address-cells = <1>; | |
356 | #size-cells = <0>; | |
357 | compatible = "fsl,vf610-i2c"; | |
358 | reg = <0x40067000 0x1000>; | |
359 | interrupts = <72 IRQ_TYPE_LEVEL_HIGH>; | |
360 | clocks = <&clks VF610_CLK_I2C1>; | |
361 | clock-names = "ipg"; | |
362 | dmas = <&edma0 0 52>, | |
363 | <&edma0 0 53>; | |
364 | dma-names = "rx","tx"; | |
365 | status = "disabled"; | |
366 | }; | |
367 | ||
efb45b30 SA |
368 | clks: ccm@4006b000 { |
369 | compatible = "fsl,vf610-ccm"; | |
370 | reg = <0x4006b000 0x1000>; | |
371 | clocks = <&sxosc>, <&fxosc>; | |
372 | clock-names = "sxosc", "fxosc"; | |
373 | #clock-cells = <1>; | |
374 | }; | |
375 | ||
376 | usbdev0: usb@40034000 { | |
377 | compatible = "fsl,vf610-usb", "fsl,imx27-usb"; | |
378 | reg = <0x40034000 0x800>; | |
c09d0f7c | 379 | interrupts = <75 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
380 | clocks = <&clks VF610_CLK_USBC0>; |
381 | fsl,usbphy = <&usbphy0>; | |
382 | fsl,usbmisc = <&usbmisc0 0>; | |
383 | dr_mode = "peripheral"; | |
384 | status = "disabled"; | |
385 | }; | |
386 | ||
387 | usbmisc0: usb@40034800 { | |
388 | #index-cells = <1>; | |
389 | compatible = "fsl,vf610-usbmisc"; | |
390 | reg = <0x40034800 0x200>; | |
391 | clocks = <&clks VF610_CLK_USBC0>; | |
392 | status = "disabled"; | |
393 | }; | |
0d018d73 SA |
394 | |
395 | src: src@4006e000 { | |
396 | compatible = "fsl,vf610-src", "syscon"; | |
397 | reg = <0x4006e000 0x1000>; | |
53f643d2 | 398 | interrupts = <96 IRQ_TYPE_LEVEL_HIGH>; |
0d018d73 | 399 | }; |
efb45b30 SA |
400 | }; |
401 | ||
402 | aips1: aips-bus@40080000 { | |
403 | compatible = "fsl,aips-bus", "simple-bus"; | |
404 | #address-cells = <1>; | |
405 | #size-cells = <1>; | |
406 | ranges; | |
407 | ||
408 | edma1: dma-controller@40098000 { | |
409 | #dma-cells = <2>; | |
410 | compatible = "fsl,vf610-edma"; | |
411 | reg = <0x40098000 0x2000>, | |
412 | <0x400a1000 0x1000>, | |
413 | <0x400a2000 0x1000>; | |
414 | dma-channels = <32>; | |
c09d0f7c SA |
415 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH>, |
416 | <11 IRQ_TYPE_LEVEL_HIGH>; | |
417 | interrupt-names = "edma-tx", "edma-err"; | |
efb45b30 SA |
418 | clock-names = "dmamux0", "dmamux1"; |
419 | clocks = <&clks VF610_CLK_DMAMUX2>, | |
420 | <&clks VF610_CLK_DMAMUX3>; | |
421 | status = "disabled"; | |
422 | }; | |
423 | ||
8455dd0d | 424 | snvs0: snvs@400a7000 { |
95d739b5 FL |
425 | compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; |
426 | reg = <0x400a7000 0x2000>; | |
8455dd0d | 427 | |
95d739b5 | 428 | snvsrtc: snvs-rtc-lp { |
8455dd0d | 429 | compatible = "fsl,sec-v4.0-mon-rtc-lp"; |
95d739b5 FL |
430 | regmap = <&snvs0>; |
431 | offset = <0x34>; | |
53f643d2 | 432 | interrupts = <100 IRQ_TYPE_LEVEL_HIGH>; |
8455dd0d SM |
433 | clocks = <&clks VF610_CLK_SNVS>; |
434 | clock-names = "snvs-rtc"; | |
435 | }; | |
436 | }; | |
437 | ||
efb45b30 SA |
438 | uart4: serial@400a9000 { |
439 | compatible = "fsl,vf610-lpuart"; | |
440 | reg = <0x400a9000 0x1000>; | |
c09d0f7c | 441 | interrupts = <65 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
442 | clocks = <&clks VF610_CLK_UART4>; |
443 | clock-names = "ipg"; | |
444 | status = "disabled"; | |
445 | }; | |
446 | ||
447 | uart5: serial@400aa000 { | |
448 | compatible = "fsl,vf610-lpuart"; | |
449 | reg = <0x400aa000 0x1000>; | |
c09d0f7c | 450 | interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
451 | clocks = <&clks VF610_CLK_UART5>; |
452 | clock-names = "ipg"; | |
453 | status = "disabled"; | |
454 | }; | |
455 | ||
456 | adc1: adc@400bb000 { | |
457 | compatible = "fsl,vf610-adc"; | |
458 | reg = <0x400bb000 0x1000>; | |
c09d0f7c | 459 | interrupts = <54 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
460 | clocks = <&clks VF610_CLK_ADC1>; |
461 | clock-names = "adc"; | |
9b1793af | 462 | #io-channel-cells = <1>; |
efb45b30 SA |
463 | status = "disabled"; |
464 | }; | |
465 | ||
3b7816ba CT |
466 | esdhc0: esdhc@400b1000 { |
467 | compatible = "fsl,imx53-esdhc"; | |
468 | reg = <0x400b1000 0x1000>; | |
469 | interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; | |
470 | clocks = <&clks VF610_CLK_IPG_BUS>, | |
471 | <&clks VF610_CLK_PLATFORM_BUS>, | |
472 | <&clks VF610_CLK_ESDHC0>; | |
473 | clock-names = "ipg", "ahb", "per"; | |
474 | status = "disabled"; | |
def0641e SA |
475 | fsl,adck-max-frequency = <30000000>, <40000000>, |
476 | <20000000>; | |
3b7816ba CT |
477 | }; |
478 | ||
efb45b30 SA |
479 | esdhc1: esdhc@400b2000 { |
480 | compatible = "fsl,imx53-esdhc"; | |
481 | reg = <0x400b2000 0x1000>; | |
c09d0f7c | 482 | interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
483 | clocks = <&clks VF610_CLK_IPG_BUS>, |
484 | <&clks VF610_CLK_PLATFORM_BUS>, | |
485 | <&clks VF610_CLK_ESDHC1>; | |
486 | clock-names = "ipg", "ahb", "per"; | |
487 | status = "disabled"; | |
488 | }; | |
489 | ||
490 | usbh1: usb@400b4000 { | |
491 | compatible = "fsl,vf610-usb", "fsl,imx27-usb"; | |
492 | reg = <0x400b4000 0x800>; | |
c09d0f7c | 493 | interrupts = <76 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
494 | clocks = <&clks VF610_CLK_USBC1>; |
495 | fsl,usbphy = <&usbphy1>; | |
496 | fsl,usbmisc = <&usbmisc1 0>; | |
497 | dr_mode = "host"; | |
498 | status = "disabled"; | |
499 | }; | |
500 | ||
501 | usbmisc1: usb@400b4800 { | |
502 | #index-cells = <1>; | |
503 | compatible = "fsl,vf610-usbmisc"; | |
504 | reg = <0x400b4800 0x200>; | |
505 | clocks = <&clks VF610_CLK_USBC1>; | |
506 | status = "disabled"; | |
507 | }; | |
508 | ||
509 | ftm: ftm@400b8000 { | |
510 | compatible = "fsl,ftm-timer"; | |
511 | reg = <0x400b8000 0x1000 0x400b9000 0x1000>; | |
c09d0f7c | 512 | interrupts = <44 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
513 | clock-names = "ftm-evt", "ftm-src", |
514 | "ftm-evt-counter-en", "ftm-src-counter-en"; | |
515 | clocks = <&clks VF610_CLK_FTM2>, | |
516 | <&clks VF610_CLK_FTM3>, | |
517 | <&clks VF610_CLK_FTM2_EXT_FIX_EN>, | |
518 | <&clks VF610_CLK_FTM3_EXT_FIX_EN>; | |
519 | status = "disabled"; | |
520 | }; | |
521 | ||
6f5e6967 CT |
522 | qspi1: quadspi@400c4000 { |
523 | #address-cells = <1>; | |
524 | #size-cells = <0>; | |
525 | compatible = "fsl,vf610-qspi"; | |
526 | reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>; | |
527 | reg-names = "QuadSPI", "QuadSPI-memory"; | |
528 | interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; | |
529 | clocks = <&clks VF610_CLK_QSPI1_EN>, | |
530 | <&clks VF610_CLK_QSPI1>; | |
531 | clock-names = "qspi_en", "qspi"; | |
532 | status = "disabled"; | |
533 | }; | |
534 | ||
efb45b30 SA |
535 | fec0: ethernet@400d0000 { |
536 | compatible = "fsl,mvf600-fec"; | |
537 | reg = <0x400d0000 0x1000>; | |
c09d0f7c | 538 | interrupts = <78 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
539 | clocks = <&clks VF610_CLK_ENET0>, |
540 | <&clks VF610_CLK_ENET0>, | |
541 | <&clks VF610_CLK_ENET>; | |
542 | clock-names = "ipg", "ahb", "ptp"; | |
543 | status = "disabled"; | |
544 | }; | |
545 | ||
546 | fec1: ethernet@400d1000 { | |
547 | compatible = "fsl,mvf600-fec"; | |
548 | reg = <0x400d1000 0x1000>; | |
c09d0f7c | 549 | interrupts = <79 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
550 | clocks = <&clks VF610_CLK_ENET1>, |
551 | <&clks VF610_CLK_ENET1>, | |
552 | <&clks VF610_CLK_ENET>; | |
553 | clock-names = "ipg", "ahb", "ptp"; | |
554 | status = "disabled"; | |
555 | }; | |
556 | ||
557 | can1: flexcan@400d4000 { | |
558 | compatible = "fsl,vf610-flexcan"; | |
559 | reg = <0x400d4000 0x4000>; | |
c09d0f7c | 560 | interrupts = <59 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
561 | clocks = <&clks VF610_CLK_FLEXCAN1>, |
562 | <&clks VF610_CLK_FLEXCAN1>; | |
563 | clock-names = "ipg", "per"; | |
564 | status = "disabled"; | |
565 | }; | |
566 | ||
baeeb541 SA |
567 | nfc: nand@400e0000 { |
568 | #address-cells = <1>; | |
569 | #size-cells = <0>; | |
570 | compatible = "fsl,vf610-nfc"; | |
571 | reg = <0x400e0000 0x4000>; | |
572 | interrupts = <83 IRQ_TYPE_LEVEL_HIGH>; | |
573 | clocks = <&clks VF610_CLK_NFC>; | |
574 | clock-names = "nfc"; | |
575 | status = "disabled"; | |
576 | }; | |
577 | ||
2d4e4a62 CT |
578 | i2c2: i2c@400e6000 { |
579 | #address-cells = <1>; | |
580 | #size-cells = <0>; | |
581 | compatible = "fsl,vf610-i2c"; | |
582 | reg = <0x400e6000 0x1000>; | |
583 | interrupts = <73 IRQ_TYPE_LEVEL_HIGH>; | |
584 | clocks = <&clks VF610_CLK_I2C2>; | |
585 | clock-names = "ipg"; | |
586 | dmas = <&edma0 1 36>, | |
587 | <&edma0 1 37>; | |
588 | dma-names = "rx","tx"; | |
589 | status = "disabled"; | |
590 | }; | |
591 | ||
592 | i2c3: i2c@400e7000 { | |
593 | #address-cells = <1>; | |
594 | #size-cells = <0>; | |
595 | compatible = "fsl,vf610-i2c"; | |
596 | reg = <0x400e7000 0x1000>; | |
597 | interrupts = <74 IRQ_TYPE_LEVEL_HIGH>; | |
598 | clocks = <&clks VF610_CLK_I2C3>; | |
599 | clock-names = "ipg"; | |
600 | dmas = <&edma0 1 38>, | |
601 | <&edma0 1 39>; | |
602 | dma-names = "rx","tx"; | |
603 | status = "disabled"; | |
604 | }; | |
efb45b30 SA |
605 | }; |
606 | }; | |
607 | }; |