[deliverable/linux.git] / arch / arm / boot / dts / vfxxx.dtsi

/*
 * Copyright 2013 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include "vf610-pinfunc.h"
#include <dt-bindings/clock/vf610-clock.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>

/ {
	aliases {
		can0 = &can0;
		can1 = &can1;
		serial0 = &uart0;
		serial1 = &uart1;
		serial2 = &uart2;
		serial3 = &uart3;
		serial4 = &uart4;
		serial5 = &uart5;
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		gpio3 = &gpio3;
		gpio4 = &gpio4;
		usbphy0 = &usbphy0;
		usbphy1 = &usbphy1;
	};

	fxosc: fxosc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24000000>;
	};

	sxosc: sxosc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <32768>;
	};

	reboot: syscon-reboot {
		compatible = "syscon-reboot";
		regmap = <&src>;
		offset = <0x0>;
		mask = <0x1000>;
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&mscm_ir>;
		ranges;

		aips0: aips-bus@40000000 {
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			mscm_cpucfg: cpucfg@40001000 {
				compatible = "fsl,vf610-mscm-cpucfg", "syscon";
				reg = <0x40001000 0x800>;
			};

			mscm_ir: interrupt-controller@40001800 {
				compatible = "fsl,vf610-mscm-ir";
				reg = <0x40001800 0x400>;
				fsl,cpucfg = <&mscm_cpucfg>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			edma0: dma-controller@40018000 {
				#dma-cells = <2>;
				compatible = "fsl,vf610-edma";
				reg = <0x40018000 0x2000>,
					<0x40024000 0x1000>,
					<0x40025000 0x1000>;
				dma-channels = <32>;
				interrupts = <8 IRQ_TYPE_LEVEL_HIGH>,
						<9 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "edma-tx", "edma-err";
				clock-names = "dmamux0", "dmamux1";
				clocks = <&clks VF610_CLK_DMAMUX0>,
					<&clks VF610_CLK_DMAMUX1>;
				status = "disabled";
			};

			can0: flexcan@40020000 {
				compatible = "fsl,vf610-flexcan";
				reg = <0x40020000 0x4000>;
				interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_FLEXCAN0>,
					 <&clks VF610_CLK_FLEXCAN0>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart0: serial@40027000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40027000 0x1000>;
				interrupts = <61 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART0>;
				clock-names = "ipg";
				dmas = <&edma0 0 2>,
					<&edma0 0 3>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			uart1: serial@40028000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40028000 0x1000>;
				interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART1>;
				clock-names = "ipg";
				dmas = <&edma0 0 4>,
					<&edma0 0 5>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			uart2: serial@40029000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40029000 0x1000>;
				interrupts = <63 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART2>;
				clock-names = "ipg";
				dmas = <&edma0 0 6>,
					<&edma0 0 7>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			uart3: serial@4002a000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x4002a000 0x1000>;
				interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART3>;
				clock-names = "ipg";
				dmas = <&edma0 0 8>,
					<&edma0 0 9>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			dspi0: dspi0@4002c000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-dspi";
				reg = <0x4002c000 0x1000>;
				interrupts = <67 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_DSPI0>;
				clock-names = "dspi";
				spi-num-chipselects = <6>;
				status = "disabled";
			};

			dspi1: dspi1@4002d000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-dspi";
				reg = <0x4002d000 0x1000>;
				interrupts = <68 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_DSPI1>;
				clock-names = "dspi";
				spi-num-chipselects = <4>;
				status = "disabled";
			};

			sai0: sai@4002f000 {
				compatible = "fsl,vf610-sai";
				reg = <0x4002f000 0x1000>;
				interrupts = <84 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_SAI0>,
					<&clks VF610_CLK_SAI0_DIV>,
					<&clks 0>, <&clks 0>;
				clock-names = "bus", "mclk1", "mclk2", "mclk3";
				dma-names = "tx", "rx";
				dmas = <&edma0 0 17>,
					<&edma0 0 16>;
				status = "disabled";
			};

			sai1: sai@40030000 {
				compatible = "fsl,vf610-sai";
				reg = <0x40030000 0x1000>;
				interrupts = <85 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_SAI1>,
					<&clks VF610_CLK_SAI1_DIV>,
					<&clks 0>, <&clks 0>;
				clock-names = "bus", "mclk1", "mclk2", "mclk3";
				dma-names = "tx", "rx";
				dmas = <&edma0 0 19>,
					<&edma0 0 18>;
				status = "disabled";
			};

			sai2: sai@40031000 {
				compatible = "fsl,vf610-sai";
				reg = <0x40031000 0x1000>;
				interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_SAI2>,
					<&clks VF610_CLK_SAI2_DIV>,
					<&clks 0>, <&clks 0>;
				clock-names = "bus", "mclk1", "mclk2", "mclk3";
				dma-names = "tx", "rx";
				dmas = <&edma0 0 21>,
					<&edma0 0 20>;
				status = "disabled";
			};

			sai3: sai@40032000 {
				compatible = "fsl,vf610-sai";
				reg = <0x40032000 0x1000>;
				interrupts = <87 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_SAI3>,
					<&clks VF610_CLK_SAI3_DIV>,
					<&clks 0>, <&clks 0>;
				clock-names = "bus", "mclk1", "mclk2", "mclk3";
				dma-names = "tx", "rx";
				dmas = <&edma0 1 9>,
					<&edma0 1 8>;
				status = "disabled";
			};

			pit: pit@40037000 {
				compatible = "fsl,vf610-pit";
				reg = <0x40037000 0x1000>;
				interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_PIT>;
				clock-names = "pit";
			};

			pwm0: pwm@40038000 {
				compatible = "fsl,vf610-ftm-pwm";
				#pwm-cells = <3>;
				reg = <0x40038000 0x1000>;
				clock-names = "ftm_sys", "ftm_ext",
					      "ftm_fix", "ftm_cnt_clk_en";
				clocks = <&clks VF610_CLK_FTM0>,
					<&clks VF610_CLK_FTM0_EXT_SEL>,
					<&clks VF610_CLK_FTM0_FIX_SEL>,
					<&clks VF610_CLK_FTM0_EXT_FIX_EN>;
				status = "disabled";
			};

			pwm1: pwm@40039000 {
				compatible = "fsl,vf610-ftm-pwm";
				#pwm-cells = <3>;
				reg = <0x40039000 0x1000>;
				clock-names = "ftm_sys", "ftm_ext",
					      "ftm_fix", "ftm_cnt_clk_en";
				clocks = <&clks VF610_CLK_FTM1>,
					<&clks VF610_CLK_FTM1_EXT_SEL>,
					<&clks VF610_CLK_FTM1_FIX_SEL>,
					<&clks VF610_CLK_FTM1_EXT_FIX_EN>;
				status = "disabled";
			};

			adc0: adc@4003b000 {
				compatible = "fsl,vf610-adc";
				reg = <0x4003b000 0x1000>;
				interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_ADC0>;
				clock-names = "adc";
				#io-channel-cells = <1>;
				status = "disabled";
				fsl,adck-max-frequency = <30000000>, <40000000>,
							<20000000>;
			};

			wdoga5: wdog@4003e000 {
				compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
				reg = <0x4003e000 0x1000>;
				interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_WDT>;
				clock-names = "wdog";
				status = "disabled";
			};

			qspi0: quadspi@40044000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-qspi";
				reg = <0x40044000 0x1000>, <0x20000000 0x10000000>;
				reg-names = "QuadSPI", "QuadSPI-memory";
				interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_QSPI0_EN>,
					<&clks VF610_CLK_QSPI0>;
				clock-names = "qspi_en", "qspi";
				status = "disabled";
			};

			iomuxc: iomuxc@40048000 {
				compatible = "fsl,vf610-iomuxc";
				reg = <0x40048000 0x1000>;
			};

			gpio0: gpio@40049000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x40049000 0x1000 0x400ff000 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 0 32>;
			};

			gpio1: gpio@4004a000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004a000 0x1000 0x400ff040 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 32 32>;
			};

			gpio2: gpio@4004b000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004b000 0x1000 0x400ff080 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 64 32>;
			};

			gpio3: gpio@4004c000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupts = <110 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 96 32>;
			};

			gpio4: gpio@4004d000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004d000 0x1000 0x400ff100 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupts = <111 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 128 7>;
			};

			anatop: anatop@40050000 {
				compatible = "fsl,vf610-anatop", "syscon";
				reg = <0x40050000 0x400>;
			};

			usbphy0: usbphy@40050800 {
				compatible = "fsl,vf610-usbphy";
				reg = <0x40050800 0x400>;
				interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBPHY0>;
				fsl,anatop = <&anatop>;
				status = "disabled";
			};

			usbphy1: usbphy@40050c00 {
				compatible = "fsl,vf610-usbphy";
				reg = <0x40050c00 0x400>;
				interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBPHY1>;
				fsl,anatop = <&anatop>;
				status = "disabled";
			};

			i2c0: i2c@40066000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-i2c";
				reg = <0x40066000 0x1000>;
				interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_I2C0>;
				clock-names = "ipg";
				dmas = <&edma0 0 50>,
					<&edma0 0 51>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			i2c1: i2c@40067000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-i2c";
				reg = <0x40067000 0x1000>;
				interrupts = <72 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_I2C1>;
				clock-names = "ipg";
				dmas = <&edma0 0 52>,
					<&edma0 0 53>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			clks: ccm@4006b000 {
				compatible = "fsl,vf610-ccm";
				reg = <0x4006b000 0x1000>;
				clocks = <&sxosc>, <&fxosc>;
				clock-names = "sxosc", "fxosc";
				#clock-cells = <1>;
			};

			usbdev0: usb@40034000 {
				compatible = "fsl,vf610-usb", "fsl,imx27-usb";
				reg = <0x40034000 0x800>;
				interrupts = <75 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBC0>;
				fsl,usbphy = <&usbphy0>;
				fsl,usbmisc = <&usbmisc0 0>;
				dr_mode = "peripheral";
				status = "disabled";
			};

			usbmisc0: usb@40034800 {
				#index-cells = <1>;
				compatible = "fsl,vf610-usbmisc";
				reg = <0x40034800 0x200>;
				clocks = <&clks VF610_CLK_USBC0>;
				status = "disabled";
			};

			src: src@4006e000 {
				compatible = "fsl,vf610-src", "syscon";
				reg = <0x4006e000 0x1000>;
				interrupts = <96 IRQ_TYPE_LEVEL_HIGH>;
			};
		};

		aips1: aips-bus@40080000 {
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			edma1: dma-controller@40098000 {
				#dma-cells = <2>;
				compatible = "fsl,vf610-edma";
				reg = <0x40098000 0x2000>,
					<0x400a1000 0x1000>,
					<0x400a2000 0x1000>;
				dma-channels = <32>;
				interrupts = <10 IRQ_TYPE_LEVEL_HIGH>,
						<11 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "edma-tx", "edma-err";
				clock-names = "dmamux0", "dmamux1";
				clocks = <&clks VF610_CLK_DMAMUX2>,
					<&clks VF610_CLK_DMAMUX3>;
				status = "disabled";
			};

			snvs0: snvs@400a7000 {
			    compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
				reg = <0x400a7000 0x2000>;

				snvsrtc: snvs-rtc-lp {
					compatible = "fsl,sec-v4.0-mon-rtc-lp";
					regmap = <&snvs0>;
					offset = <0x34>;
					interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
					clocks = <&clks VF610_CLK_SNVS>;
					clock-names = "snvs-rtc";
				};
			};

			uart4: serial@400a9000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x400a9000 0x1000>;
				interrupts = <65 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART4>;
				clock-names = "ipg";
				status = "disabled";
			};

			uart5: serial@400aa000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x400aa000 0x1000>;
				interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART5>;
				clock-names = "ipg";
				status = "disabled";
			};

			dspi2: dspi2@400ac000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-dspi";
				reg = <0x400ac000 0x1000>;
				interrupts = <69 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_DSPI2>;
				clock-names = "dspi";
				spi-num-chipselects = <2>;
				status = "disabled";
			};

			dspi3: dspi3@400ad000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-dspi";
				reg = <0x400ad000 0x1000>;
				interrupts = <70 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_DSPI3>;
				clock-names = "dspi";
				spi-num-chipselects = <2>;
				status = "disabled";
			};

			adc1: adc@400bb000 {
				compatible = "fsl,vf610-adc";
				reg = <0x400bb000 0x1000>;
				interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_ADC1>;
				clock-names = "adc";
				#io-channel-cells = <1>;
				status = "disabled";
				fsl,adck-max-frequency = <30000000>, <40000000>,
							<20000000>;
			};

			esdhc0: esdhc@400b1000 {
				compatible = "fsl,imx53-esdhc";
				reg = <0x400b1000 0x1000>;
				interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_IPG_BUS>,
					<&clks VF610_CLK_PLATFORM_BUS>,
					<&clks VF610_CLK_ESDHC0>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			esdhc1: esdhc@400b2000 {
				compatible = "fsl,imx53-esdhc";
				reg = <0x400b2000 0x1000>;
				interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_IPG_BUS>,
					<&clks VF610_CLK_PLATFORM_BUS>,
					<&clks VF610_CLK_ESDHC1>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			usbh1: usb@400b4000 {
				compatible = "fsl,vf610-usb", "fsl,imx27-usb";
				reg = <0x400b4000 0x800>;
				interrupts = <76 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBC1>;
				fsl,usbphy = <&usbphy1>;
				fsl,usbmisc = <&usbmisc1 0>;
				dr_mode = "host";
				status = "disabled";
			};

			usbmisc1: usb@400b4800 {
				#index-cells = <1>;
				compatible = "fsl,vf610-usbmisc";
				reg = <0x400b4800 0x200>;
				clocks = <&clks VF610_CLK_USBC1>;
				status = "disabled";
			};

			ftm: ftm@400b8000 {
				compatible = "fsl,ftm-timer";
				reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
				interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
				clock-names = "ftm-evt", "ftm-src",
					"ftm-evt-counter-en", "ftm-src-counter-en";
				clocks = <&clks VF610_CLK_FTM2>,
					<&clks VF610_CLK_FTM3>,
					<&clks VF610_CLK_FTM2_EXT_FIX_EN>,
					<&clks VF610_CLK_FTM3_EXT_FIX_EN>;
				status = "disabled";
			};

			qspi1: quadspi@400c4000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-qspi";
				reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>;
				reg-names = "QuadSPI", "QuadSPI-memory";
				interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_QSPI1_EN>,
					<&clks VF610_CLK_QSPI1>;
				clock-names = "qspi_en", "qspi";
				status = "disabled";
			};

			fec0: ethernet@400d0000 {
				compatible = "fsl,mvf600-fec";
				reg = <0x400d0000 0x1000>;
				interrupts = <78 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_ENET0>,
					<&clks VF610_CLK_ENET0>,
					<&clks VF610_CLK_ENET>;
				clock-names = "ipg", "ahb", "ptp";
				status = "disabled";
			};

			fec1: ethernet@400d1000 {
				compatible = "fsl,mvf600-fec";
				reg = <0x400d1000 0x1000>;
				interrupts = <79 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_ENET1>,
					<&clks VF610_CLK_ENET1>,
					<&clks VF610_CLK_ENET>;
				clock-names = "ipg", "ahb", "ptp";
				status = "disabled";
			};

			can1: flexcan@400d4000 {
				compatible = "fsl,vf610-flexcan";
				reg = <0x400d4000 0x4000>;
				interrupts = <59 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_FLEXCAN1>,
					 <&clks VF610_CLK_FLEXCAN1>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			nfc: nand@400e0000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-nfc";
				reg = <0x400e0000 0x4000>;
				interrupts = <83 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_NFC>;
				clock-names = "nfc";
				status = "disabled";
			};

			i2c2: i2c@400e6000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-i2c";
				reg = <0x400e6000 0x1000>;
				interrupts = <73 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_I2C2>;
				clock-names = "ipg";
				dmas = <&edma0 1 36>,
					<&edma0 1 37>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			i2c3: i2c@400e7000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-i2c";
				reg = <0x400e7000 0x1000>;
				interrupts = <74 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_I2C3>;
				clock-names = "ipg";
				dmas = <&edma0 1 38>,
					<&edma0 1 39>;
				dma-names = "rx","tx";
				status = "disabled";
			};
		};
	};
};
Commit	Line	Data
efb45b30 SA	1	/*
	2	* Copyright 2013 Freescale Semiconductor, Inc.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*/
	9
	10	#include "vf610-pinfunc.h"
	11	#include <dt-bindings/clock/vf610-clock.h>
	12	#include <dt-bindings/interrupt-controller/irq.h>
2b36bda3	13	#include <dt-bindings/gpio/gpio.h>
efb45b30 SA	14
	15	/ {
	16	aliases {
	17	can0 = &can0;
	18	can1 = &can1;
	19	serial0 = &uart0;
	20	serial1 = &uart1;
	21	serial2 = &uart2;
	22	serial3 = &uart3;
	23	serial4 = &uart4;
	24	serial5 = &uart5;
76713954 SA	25	gpio0 = &gpio0;
	26	gpio1 = &gpio1;
	27	gpio2 = &gpio2;
	28	gpio3 = &gpio3;
	29	gpio4 = &gpio4;
efb45b30 SA	30	usbphy0 = &usbphy0;
	31	usbphy1 = &usbphy1;
	32	};
	33
	34	fxosc: fxosc {
	35	compatible = "fixed-clock";
	36	#clock-cells = <0>;
	37	clock-frequency = <24000000>;
	38	};
	39
	40	sxosc: sxosc {
	41	compatible = "fixed-clock";
	42	#clock-cells = <0>;
	43	clock-frequency = <32768>;
	44	};
	45
0d018d73 SA	46	reboot: syscon-reboot {
	47	compatible = "syscon-reboot";
	48	regmap = <&src>;
	49	offset = <0x0>;
	50	mask = <0x1000>;
	51	};
	52
efb45b30 SA	53	soc {
	54	#address-cells = <1>;
	55	#size-cells = <1>;
	56	compatible = "simple-bus";
c09d0f7c	57	interrupt-parent = <&mscm_ir>;
efb45b30 SA	58	ranges;
	59
	60	aips0: aips-bus@40000000 {
	61	compatible = "fsl,aips-bus", "simple-bus";
	62	#address-cells = <1>;
	63	#size-cells = <1>;
	64	ranges;
	65
c09d0f7c SA	66	mscm_cpucfg: cpucfg@40001000 {
	67	compatible = "fsl,vf610-mscm-cpucfg", "syscon";
	68	reg = <0x40001000 0x800>;
	69	};
	70
	71	mscm_ir: interrupt-controller@40001800 {
	72	compatible = "fsl,vf610-mscm-ir";
	73	reg = <0x40001800 0x400>;
	74	fsl,cpucfg = <&mscm_cpucfg>;
	75	interrupt-controller;
	76	#interrupt-cells = <2>;
	77	};
	78
efb45b30 SA	79	edma0: dma-controller@40018000 {
	80	#dma-cells = <2>;
	81	compatible = "fsl,vf610-edma";
	82	reg = <0x40018000 0x2000>,
	83	<0x40024000 0x1000>,
	84	<0x40025000 0x1000>;
	85	dma-channels = <32>;
c09d0f7c SA	86	interrupts = <8 IRQ_TYPE_LEVEL_HIGH>,
	87	<9 IRQ_TYPE_LEVEL_HIGH>;
	88	interrupt-names = "edma-tx", "edma-err";
efb45b30 SA	89	clock-names = "dmamux0", "dmamux1";
	90	clocks = <&clks VF610_CLK_DMAMUX0>,
	91	<&clks VF610_CLK_DMAMUX1>;
	92	status = "disabled";
	93	};
	94
	95	can0: flexcan@40020000 {
	96	compatible = "fsl,vf610-flexcan";
	97	reg = <0x40020000 0x4000>;
c09d0f7c	98	interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	99	clocks = <&clks VF610_CLK_FLEXCAN0>,
	100	<&clks VF610_CLK_FLEXCAN0>;
	101	clock-names = "ipg", "per";
	102	status = "disabled";
	103	};
	104
	105	uart0: serial@40027000 {
	106	compatible = "fsl,vf610-lpuart";
	107	reg = <0x40027000 0x1000>;
c09d0f7c	108	interrupts = <61 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	109	clocks = <&clks VF610_CLK_UART0>;
	110	clock-names = "ipg";
	111	dmas = <&edma0 0 2>,
	112	<&edma0 0 3>;
	113	dma-names = "rx","tx";
	114	status = "disabled";
	115	};
	116
	117	uart1: serial@40028000 {
	118	compatible = "fsl,vf610-lpuart";
	119	reg = <0x40028000 0x1000>;
c09d0f7c	120	interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	121	clocks = <&clks VF610_CLK_UART1>;
	122	clock-names = "ipg";
	123	dmas = <&edma0 0 4>,
	124	<&edma0 0 5>;
	125	dma-names = "rx","tx";
	126	status = "disabled";
	127	};
	128
	129	uart2: serial@40029000 {
	130	compatible = "fsl,vf610-lpuart";
	131	reg = <0x40029000 0x1000>;
c09d0f7c	132	interrupts = <63 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	133	clocks = <&clks VF610_CLK_UART2>;
	134	clock-names = "ipg";
	135	dmas = <&edma0 0 6>,
	136	<&edma0 0 7>;
	137	dma-names = "rx","tx";
	138	status = "disabled";
	139	};
	140
	141	uart3: serial@4002a000 {
	142	compatible = "fsl,vf610-lpuart";
	143	reg = <0x4002a000 0x1000>;
c09d0f7c	144	interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	145	clocks = <&clks VF610_CLK_UART3>;
	146	clock-names = "ipg";
	147	dmas = <&edma0 0 8>,
	148	<&edma0 0 9>;
	149	dma-names = "rx","tx";
	150	status = "disabled";
	151	};
	152
	153	dspi0: dspi0@4002c000 {
	154	#address-cells = <1>;
	155	#size-cells = <0>;
	156	compatible = "fsl,vf610-dspi";
	157	reg = <0x4002c000 0x1000>;
c09d0f7c	158	interrupts = <67 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	159	clocks = <&clks VF610_CLK_DSPI0>;
efb45b30 SA	160	clock-names = "dspi";
897ed0ca	161	spi-num-chipselects = <6>;
efb45b30 SA	162	status = "disabled";
	163	};
	164
1b545c17 BD	165	dspi1: dspi1@4002d000 {
	166	#address-cells = <1>;
	167	#size-cells = <0>;
	168	compatible = "fsl,vf610-dspi";
	169	reg = <0x4002d000 0x1000>;
c09d0f7c	170	interrupts = <68 IRQ_TYPE_LEVEL_HIGH>;
1b545c17 BD	171	clocks = <&clks VF610_CLK_DSPI1>;
1b545c17 BD	172	clock-names = "dspi";
897ed0ca	173	spi-num-chipselects = <4>;
1b545c17 BD	174	status = "disabled";
	175	};
	176
26a91d89 SA	177	sai0: sai@4002f000 {
	178	compatible = "fsl,vf610-sai";
	179	reg = <0x4002f000 0x1000>;
	180	interrupts = <84 IRQ_TYPE_LEVEL_HIGH>;
	181	clocks = <&clks VF610_CLK_SAI0>,
	182	<&clks VF610_CLK_SAI0_DIV>,
	183	<&clks 0>, <&clks 0>;
	184	clock-names = "bus", "mclk1", "mclk2", "mclk3";
	185	dma-names = "tx", "rx";
	186	dmas = <&edma0 0 17>,
	187	<&edma0 0 16>;
	188	status = "disabled";
	189	};
	190
	191	sai1: sai@40030000 {
	192	compatible = "fsl,vf610-sai";
	193	reg = <0x40030000 0x1000>;
	194	interrupts = <85 IRQ_TYPE_LEVEL_HIGH>;
	195	clocks = <&clks VF610_CLK_SAI1>,
	196	<&clks VF610_CLK_SAI1_DIV>,
	197	<&clks 0>, <&clks 0>;
	198	clock-names = "bus", "mclk1", "mclk2", "mclk3";
	199	dma-names = "tx", "rx";
	200	dmas = <&edma0 0 19>,
	201	<&edma0 0 18>;
	202	status = "disabled";
	203	};
	204
efb45b30 SA	205	sai2: sai@40031000 {
	206	compatible = "fsl,vf610-sai";
	207	reg = <0x40031000 0x1000>;
c09d0f7c	208	interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
531ee1f4 SA	209	clocks = <&clks VF610_CLK_SAI2>,
	210	<&clks VF610_CLK_SAI2_DIV>,
	211	<&clks 0>, <&clks 0>;
	212	clock-names = "bus", "mclk1", "mclk2", "mclk3";
efb45b30 SA	213	dma-names = "tx", "rx";
	214	dmas = <&edma0 0 21>,
	215	<&edma0 0 20>;
	216	status = "disabled";
	217	};
	218
26a91d89 SA	219	sai3: sai@40032000 {
	220	compatible = "fsl,vf610-sai";
	221	reg = <0x40032000 0x1000>;
	222	interrupts = <87 IRQ_TYPE_LEVEL_HIGH>;
	223	clocks = <&clks VF610_CLK_SAI3>,
	224	<&clks VF610_CLK_SAI3_DIV>,
	225	<&clks 0>, <&clks 0>;
	226	clock-names = "bus", "mclk1", "mclk2", "mclk3";
	227	dma-names = "tx", "rx";
	228	dmas = <&edma0 1 9>,
	229	<&edma0 1 8>;
	230	status = "disabled";
	231	};
	232
efb45b30 SA	233	pit: pit@40037000 {
	234	compatible = "fsl,vf610-pit";
	235	reg = <0x40037000 0x1000>;
c09d0f7c	236	interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	237	clocks = <&clks VF610_CLK_PIT>;
	238	clock-names = "pit";
	239	};
	240
	241	pwm0: pwm@40038000 {
	242	compatible = "fsl,vf610-ftm-pwm";
	243	#pwm-cells = <3>;
	244	reg = <0x40038000 0x1000>;
	245	clock-names = "ftm_sys", "ftm_ext",
	246	"ftm_fix", "ftm_cnt_clk_en";
	247	clocks = <&clks VF610_CLK_FTM0>,
	248	<&clks VF610_CLK_FTM0_EXT_SEL>,
	249	<&clks VF610_CLK_FTM0_FIX_SEL>,
	250	<&clks VF610_CLK_FTM0_EXT_FIX_EN>;
	251	status = "disabled";
	252	};
	253
	254	pwm1: pwm@40039000 {
	255	compatible = "fsl,vf610-ftm-pwm";
	256	#pwm-cells = <3>;
	257	reg = <0x40039000 0x1000>;
	258	clock-names = "ftm_sys", "ftm_ext",
	259	"ftm_fix", "ftm_cnt_clk_en";
	260	clocks = <&clks VF610_CLK_FTM1>,
	261	<&clks VF610_CLK_FTM1_EXT_SEL>,
	262	<&clks VF610_CLK_FTM1_FIX_SEL>,
	263	<&clks VF610_CLK_FTM1_EXT_FIX_EN>;
	264	status = "disabled";
	265	};
	266
	267	adc0: adc@4003b000 {
	268	compatible = "fsl,vf610-adc";
	269	reg = <0x4003b000 0x1000>;
c09d0f7c	270	interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	271	clocks = <&clks VF610_CLK_ADC0>;
efb45b30 SA	272	clock-names = "adc";
9b1793af	273	#io-channel-cells = <1>;
efb45b30	274	status = "disabled";
def0641e SA	275	fsl,adck-max-frequency = <30000000>, <40000000>,
def0641e SA	276	<20000000>;
efb45b30 SA	277	};
efb45b30 SA	278
c134e09f	279	wdoga5: wdog@4003e000 {
efb45b30 SA	280	compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
efb45b30 SA	281	reg = <0x4003e000 0x1000>;
c09d0f7c	282	interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	283	clocks = <&clks VF610_CLK_WDT>;
	284	clock-names = "wdog";
	285	status = "disabled";
	286	};
	287
	288	qspi0: quadspi@40044000 {
	289	#address-cells = <1>;
	290	#size-cells = <0>;
	291	compatible = "fsl,vf610-qspi";
f4b89232 CT	292	reg = <0x40044000 0x1000>, <0x20000000 0x10000000>;
f4b89232 CT	293	reg-names = "QuadSPI", "QuadSPI-memory";
c09d0f7c	294	interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	295	clocks = <&clks VF610_CLK_QSPI0_EN>,
	296	<&clks VF610_CLK_QSPI0>;
	297	clock-names = "qspi_en", "qspi";
	298	status = "disabled";
	299	};
	300
	301	iomuxc: iomuxc@40048000 {
	302	compatible = "fsl,vf610-iomuxc";
	303	reg = <0x40048000 0x1000>;
efb45b30 SA	304	};
efb45b30 SA	305
76713954	306	gpio0: gpio@40049000 {
efb45b30 SA	307	compatible = "fsl,vf610-gpio";
	308	reg = <0x40049000 0x1000 0x400ff000 0x40>;
	309	gpio-controller;
	310	#gpio-cells = <2>;
c09d0f7c	311	interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	312	interrupt-controller;
	313	#interrupt-cells = <2>;
	314	gpio-ranges = <&iomuxc 0 0 32>;
	315	};
	316
76713954	317	gpio1: gpio@4004a000 {
efb45b30 SA	318	compatible = "fsl,vf610-gpio";
	319	reg = <0x4004a000 0x1000 0x400ff040 0x40>;
	320	gpio-controller;
	321	#gpio-cells = <2>;
c09d0f7c	322	interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	323	interrupt-controller;
	324	#interrupt-cells = <2>;
	325	gpio-ranges = <&iomuxc 0 32 32>;
	326	};
	327
76713954	328	gpio2: gpio@4004b000 {
efb45b30 SA	329	compatible = "fsl,vf610-gpio";
	330	reg = <0x4004b000 0x1000 0x400ff080 0x40>;
	331	gpio-controller;
	332	#gpio-cells = <2>;
c09d0f7c	333	interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	334	interrupt-controller;
	335	#interrupt-cells = <2>;
	336	gpio-ranges = <&iomuxc 0 64 32>;
	337	};
	338
76713954	339	gpio3: gpio@4004c000 {
efb45b30 SA	340	compatible = "fsl,vf610-gpio";
	341	reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
	342	gpio-controller;
	343	#gpio-cells = <2>;
c09d0f7c	344	interrupts = <110 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	345	interrupt-controller;
	346	#interrupt-cells = <2>;
	347	gpio-ranges = <&iomuxc 0 96 32>;
	348	};
	349
76713954	350	gpio4: gpio@4004d000 {
efb45b30 SA	351	compatible = "fsl,vf610-gpio";
	352	reg = <0x4004d000 0x1000 0x400ff100 0x40>;
	353	gpio-controller;
	354	#gpio-cells = <2>;
c09d0f7c	355	interrupts = <111 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	356	interrupt-controller;
	357	#interrupt-cells = <2>;
	358	gpio-ranges = <&iomuxc 0 128 7>;
	359	};
	360
	361	anatop: anatop@40050000 {
	362	compatible = "fsl,vf610-anatop", "syscon";
	363	reg = <0x40050000 0x400>;
	364	};
	365
	366	usbphy0: usbphy@40050800 {
	367	compatible = "fsl,vf610-usbphy";
	368	reg = <0x40050800 0x400>;
c09d0f7c	369	interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	370	clocks = <&clks VF610_CLK_USBPHY0>;
	371	fsl,anatop = <&anatop>;
	372	status = "disabled";
	373	};
	374
	375	usbphy1: usbphy@40050c00 {
	376	compatible = "fsl,vf610-usbphy";
	377	reg = <0x40050c00 0x400>;
c09d0f7c	378	interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	379	clocks = <&clks VF610_CLK_USBPHY1>;
	380	fsl,anatop = <&anatop>;
	381	status = "disabled";
	382	};
	383
	384	i2c0: i2c@40066000 {
	385	#address-cells = <1>;
	386	#size-cells = <0>;
	387	compatible = "fsl,vf610-i2c";
	388	reg = <0x40066000 0x1000>;
c09d0f7c	389	interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	390	clocks = <&clks VF610_CLK_I2C0>;
	391	clock-names = "ipg";
	392	dmas = <&edma0 0 50>,
	393	<&edma0 0 51>;
	394	dma-names = "rx","tx";
	395	status = "disabled";
	396	};
	397
2d4e4a62 CT	398	i2c1: i2c@40067000 {
	399	#address-cells = <1>;
	400	#size-cells = <0>;
	401	compatible = "fsl,vf610-i2c";
	402	reg = <0x40067000 0x1000>;
	403	interrupts = <72 IRQ_TYPE_LEVEL_HIGH>;
	404	clocks = <&clks VF610_CLK_I2C1>;
	405	clock-names = "ipg";
	406	dmas = <&edma0 0 52>,
	407	<&edma0 0 53>;
	408	dma-names = "rx","tx";
	409	status = "disabled";
	410	};
	411
efb45b30 SA	412	clks: ccm@4006b000 {
	413	compatible = "fsl,vf610-ccm";
	414	reg = <0x4006b000 0x1000>;
	415	clocks = <&sxosc>, <&fxosc>;
	416	clock-names = "sxosc", "fxosc";
	417	#clock-cells = <1>;
	418	};
	419
	420	usbdev0: usb@40034000 {
	421	compatible = "fsl,vf610-usb", "fsl,imx27-usb";
	422	reg = <0x40034000 0x800>;
c09d0f7c	423	interrupts = <75 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	424	clocks = <&clks VF610_CLK_USBC0>;
	425	fsl,usbphy = <&usbphy0>;
	426	fsl,usbmisc = <&usbmisc0 0>;
	427	dr_mode = "peripheral";
	428	status = "disabled";
	429	};
	430
	431	usbmisc0: usb@40034800 {
	432	#index-cells = <1>;
	433	compatible = "fsl,vf610-usbmisc";
	434	reg = <0x40034800 0x200>;
	435	clocks = <&clks VF610_CLK_USBC0>;
	436	status = "disabled";
	437	};
0d018d73 SA	438
	439	src: src@4006e000 {
	440	compatible = "fsl,vf610-src", "syscon";
	441	reg = <0x4006e000 0x1000>;
53f643d2	442	interrupts = <96 IRQ_TYPE_LEVEL_HIGH>;
0d018d73	443	};
efb45b30 SA	444	};
	445
	446	aips1: aips-bus@40080000 {
	447	compatible = "fsl,aips-bus", "simple-bus";
	448	#address-cells = <1>;
	449	#size-cells = <1>;
	450	ranges;
	451
	452	edma1: dma-controller@40098000 {
	453	#dma-cells = <2>;
	454	compatible = "fsl,vf610-edma";
	455	reg = <0x40098000 0x2000>,
	456	<0x400a1000 0x1000>,
	457	<0x400a2000 0x1000>;
	458	dma-channels = <32>;
c09d0f7c SA	459	interrupts = <10 IRQ_TYPE_LEVEL_HIGH>,
	460	<11 IRQ_TYPE_LEVEL_HIGH>;
	461	interrupt-names = "edma-tx", "edma-err";
efb45b30 SA	462	clock-names = "dmamux0", "dmamux1";
	463	clocks = <&clks VF610_CLK_DMAMUX2>,
	464	<&clks VF610_CLK_DMAMUX3>;
	465	status = "disabled";
	466	};
	467
8455dd0d	468	snvs0: snvs@400a7000 {
95d739b5 FL	469	compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
95d739b5 FL	470	reg = <0x400a7000 0x2000>;
8455dd0d	471
95d739b5	472	snvsrtc: snvs-rtc-lp {
8455dd0d	473	compatible = "fsl,sec-v4.0-mon-rtc-lp";
95d739b5 FL	474	regmap = <&snvs0>;
95d739b5 FL	475	offset = <0x34>;
53f643d2	476	interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
8455dd0d SM	477	clocks = <&clks VF610_CLK_SNVS>;
	478	clock-names = "snvs-rtc";
	479	};
	480	};
	481
efb45b30 SA	482	uart4: serial@400a9000 {
	483	compatible = "fsl,vf610-lpuart";
	484	reg = <0x400a9000 0x1000>;
c09d0f7c	485	interrupts = <65 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	486	clocks = <&clks VF610_CLK_UART4>;
	487	clock-names = "ipg";
	488	status = "disabled";
	489	};
	490
	491	uart5: serial@400aa000 {
	492	compatible = "fsl,vf610-lpuart";
	493	reg = <0x400aa000 0x1000>;
c09d0f7c	494	interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	495	clocks = <&clks VF610_CLK_UART5>;
	496	clock-names = "ipg";
	497	status = "disabled";
	498	};
	499
5f060c71 CT	500	dspi2: dspi2@400ac000 {
	501	#address-cells = <1>;
	502	#size-cells = <0>;
	503	compatible = "fsl,vf610-dspi";
	504	reg = <0x400ac000 0x1000>;
	505	interrupts = <69 IRQ_TYPE_LEVEL_HIGH>;
	506	clocks = <&clks VF610_CLK_DSPI2>;
	507	clock-names = "dspi";
	508	spi-num-chipselects = <2>;
	509	status = "disabled";
	510	};
	511
	512	dspi3: dspi3@400ad000 {
	513	#address-cells = <1>;
	514	#size-cells = <0>;
	515	compatible = "fsl,vf610-dspi";
	516	reg = <0x400ad000 0x1000>;
	517	interrupts = <70 IRQ_TYPE_LEVEL_HIGH>;
	518	clocks = <&clks VF610_CLK_DSPI3>;
	519	clock-names = "dspi";
	520	spi-num-chipselects = <2>;
	521	status = "disabled";
	522	};
	523
efb45b30 SA	524	adc1: adc@400bb000 {
	525	compatible = "fsl,vf610-adc";
	526	reg = <0x400bb000 0x1000>;
c09d0f7c	527	interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	528	clocks = <&clks VF610_CLK_ADC1>;
efb45b30 SA	529	clock-names = "adc";
9b1793af	530	#io-channel-cells = <1>;
efb45b30	531	status = "disabled";
3fa2f949 SM	532	fsl,adck-max-frequency = <30000000>, <40000000>,
3fa2f949 SM	533	<20000000>;
efb45b30 SA	534	};
efb45b30 SA	535
3b7816ba CT	536	esdhc0: esdhc@400b1000 {
	537	compatible = "fsl,imx53-esdhc";
	538	reg = <0x400b1000 0x1000>;
	539	interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
	540	clocks = <&clks VF610_CLK_IPG_BUS>,
	541	<&clks VF610_CLK_PLATFORM_BUS>,
	542	<&clks VF610_CLK_ESDHC0>;
	543	clock-names = "ipg", "ahb", "per";
	544	status = "disabled";
	545	};
	546
efb45b30 SA	547	esdhc1: esdhc@400b2000 {
	548	compatible = "fsl,imx53-esdhc";
	549	reg = <0x400b2000 0x1000>;
c09d0f7c	550	interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	551	clocks = <&clks VF610_CLK_IPG_BUS>,
	552	<&clks VF610_CLK_PLATFORM_BUS>,
	553	<&clks VF610_CLK_ESDHC1>;
	554	clock-names = "ipg", "ahb", "per";
	555	status = "disabled";
	556	};
	557
	558	usbh1: usb@400b4000 {
	559	compatible = "fsl,vf610-usb", "fsl,imx27-usb";
	560	reg = <0x400b4000 0x800>;
c09d0f7c	561	interrupts = <76 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	562	clocks = <&clks VF610_CLK_USBC1>;
	563	fsl,usbphy = <&usbphy1>;
	564	fsl,usbmisc = <&usbmisc1 0>;
	565	dr_mode = "host";
	566	status = "disabled";
	567	};
	568
	569	usbmisc1: usb@400b4800 {
	570	#index-cells = <1>;
	571	compatible = "fsl,vf610-usbmisc";
	572	reg = <0x400b4800 0x200>;
	573	clocks = <&clks VF610_CLK_USBC1>;
	574	status = "disabled";
	575	};
	576
	577	ftm: ftm@400b8000 {
	578	compatible = "fsl,ftm-timer";
	579	reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
c09d0f7c	580	interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	581	clock-names = "ftm-evt", "ftm-src",
	582	"ftm-evt-counter-en", "ftm-src-counter-en";
	583	clocks = <&clks VF610_CLK_FTM2>,
	584	<&clks VF610_CLK_FTM3>,
	585	<&clks VF610_CLK_FTM2_EXT_FIX_EN>,
	586	<&clks VF610_CLK_FTM3_EXT_FIX_EN>;
	587	status = "disabled";
	588	};
	589
6f5e6967 CT	590	qspi1: quadspi@400c4000 {
	591	#address-cells = <1>;
	592	#size-cells = <0>;
	593	compatible = "fsl,vf610-qspi";
	594	reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>;
	595	reg-names = "QuadSPI", "QuadSPI-memory";
	596	interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
	597	clocks = <&clks VF610_CLK_QSPI1_EN>,
	598	<&clks VF610_CLK_QSPI1>;
	599	clock-names = "qspi_en", "qspi";
	600	status = "disabled";
	601	};
	602
efb45b30 SA	603	fec0: ethernet@400d0000 {
	604	compatible = "fsl,mvf600-fec";
	605	reg = <0x400d0000 0x1000>;
c09d0f7c	606	interrupts = <78 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	607	clocks = <&clks VF610_CLK_ENET0>,
	608	<&clks VF610_CLK_ENET0>,
	609	<&clks VF610_CLK_ENET>;
	610	clock-names = "ipg", "ahb", "ptp";
	611	status = "disabled";
	612	};
	613
	614	fec1: ethernet@400d1000 {
	615	compatible = "fsl,mvf600-fec";
	616	reg = <0x400d1000 0x1000>;
c09d0f7c	617	interrupts = <79 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	618	clocks = <&clks VF610_CLK_ENET1>,
	619	<&clks VF610_CLK_ENET1>,
	620	<&clks VF610_CLK_ENET>;
	621	clock-names = "ipg", "ahb", "ptp";
	622	status = "disabled";
	623	};
	624
	625	can1: flexcan@400d4000 {
	626	compatible = "fsl,vf610-flexcan";
	627	reg = <0x400d4000 0x4000>;
c09d0f7c	628	interrupts = <59 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	629	clocks = <&clks VF610_CLK_FLEXCAN1>,
	630	<&clks VF610_CLK_FLEXCAN1>;
	631	clock-names = "ipg", "per";
	632	status = "disabled";
	633	};
	634
baeeb541 SA	635	nfc: nand@400e0000 {
	636	#address-cells = <1>;
	637	#size-cells = <0>;
	638	compatible = "fsl,vf610-nfc";
	639	reg = <0x400e0000 0x4000>;
	640	interrupts = <83 IRQ_TYPE_LEVEL_HIGH>;
	641	clocks = <&clks VF610_CLK_NFC>;
	642	clock-names = "nfc";
	643	status = "disabled";
	644	};
	645
2d4e4a62 CT	646	i2c2: i2c@400e6000 {
	647	#address-cells = <1>;
	648	#size-cells = <0>;
	649	compatible = "fsl,vf610-i2c";
	650	reg = <0x400e6000 0x1000>;
	651	interrupts = <73 IRQ_TYPE_LEVEL_HIGH>;
	652	clocks = <&clks VF610_CLK_I2C2>;
	653	clock-names = "ipg";
	654	dmas = <&edma0 1 36>,
	655	<&edma0 1 37>;
	656	dma-names = "rx","tx";
	657	status = "disabled";
	658	};
	659
	660	i2c3: i2c@400e7000 {
	661	#address-cells = <1>;
	662	#size-cells = <0>;
	663	compatible = "fsl,vf610-i2c";
	664	reg = <0x400e7000 0x1000>;
	665	interrupts = <74 IRQ_TYPE_LEVEL_HIGH>;
	666	clocks = <&clks VF610_CLK_I2C3>;
	667	clock-names = "ipg";
	668	dmas = <&edma0 1 38>,
	669	<&edma0 1 39>;
	670	dma-names = "rx","tx";
	671	status = "disabled";
	672	};
efb45b30 SA	673	};
	674	};
	675	};