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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/common/icst307.c | |
3 | * | |
4 | * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * Support functions for calculating clocks/divisors for the ICST307 | |
50a23e6e | 11 | * clock generators. See http://www.idt.com/ for more information |
1da177e4 LT |
12 | * on these devices. |
13 | * | |
14 | * This is an almost identical implementation to the ICST525 clock generator. | |
15 | * The s2div and idx2s files are different | |
16 | */ | |
17 | #include <linux/module.h> | |
18 | #include <linux/kernel.h> | |
19 | ||
c5a0adb5 | 20 | #include <asm/hardware/icst.h> |
1da177e4 LT |
21 | |
22 | /* | |
23 | * Divisors for each OD setting. | |
24 | */ | |
232eaf7f | 25 | const unsigned char icst307_s2div[8] = { 10, 2, 8, 4, 5, 7, 3, 6 }; |
c5a0adb5 | 26 | const unsigned char icst525_s2div[8] = { 10, 2, 8, 4, 5, 7, 9, 6 }; |
232eaf7f | 27 | EXPORT_SYMBOL(icst307_s2div); |
c5a0adb5 | 28 | EXPORT_SYMBOL(icst525_s2div); |
1da177e4 | 29 | |
c5a0adb5 | 30 | unsigned long icst_hz(const struct icst_params *p, struct icst_vco vco) |
1da177e4 | 31 | { |
232eaf7f | 32 | return p->ref * 2 * (vco.v + 8) / ((vco.r + 2) * p->s2div[vco.s]); |
1da177e4 LT |
33 | } |
34 | ||
c5a0adb5 | 35 | EXPORT_SYMBOL(icst_hz); |
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36 | |
37 | /* | |
38 | * Ascending divisor S values. | |
39 | */ | |
232eaf7f | 40 | const unsigned char icst307_idx2s[8] = { 1, 6, 3, 4, 7, 5, 2, 0 }; |
c5a0adb5 | 41 | const unsigned char icst525_idx2s[8] = { 1, 3, 4, 7, 5, 2, 6, 0 }; |
232eaf7f | 42 | EXPORT_SYMBOL(icst307_idx2s); |
c5a0adb5 | 43 | EXPORT_SYMBOL(icst525_idx2s); |
1da177e4 | 44 | |
39c0cb02 | 45 | struct icst_vco |
c5a0adb5 | 46 | icst_hz_to_vco(const struct icst_params *p, unsigned long freq) |
1da177e4 | 47 | { |
39c0cb02 | 48 | struct icst_vco vco = { .s = 1, .v = p->vd_max, .r = p->rd_max }; |
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49 | unsigned long f; |
50 | unsigned int i = 0, rd, best = (unsigned int)-1; | |
51 | ||
52 | /* | |
53 | * First, find the PLL output divisor such | |
54 | * that the PLL output is within spec. | |
55 | */ | |
56 | do { | |
232eaf7f | 57 | f = freq * p->s2div[p->idx2s[i]]; |
1da177e4 | 58 | |
e73a46a3 | 59 | if (f > p->vco_min && f <= p->vco_max) |
1da177e4 | 60 | break; |
232eaf7f | 61 | } while (i < 8); |
1da177e4 | 62 | |
232eaf7f | 63 | if (i >= 8) |
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64 | return vco; |
65 | ||
232eaf7f | 66 | vco.s = p->idx2s[i]; |
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67 | |
68 | /* | |
69 | * Now find the closest divisor combination | |
70 | * which gives a PLL output of 'f'. | |
71 | */ | |
72 | for (rd = p->rd_min; rd <= p->rd_max; rd++) { | |
73 | unsigned long fref_div, f_pll; | |
74 | unsigned int vd; | |
75 | int f_diff; | |
76 | ||
77 | fref_div = (2 * p->ref) / rd; | |
78 | ||
79 | vd = (f + fref_div / 2) / fref_div; | |
80 | if (vd < p->vd_min || vd > p->vd_max) | |
81 | continue; | |
82 | ||
83 | f_pll = fref_div * vd; | |
84 | f_diff = f_pll - f; | |
85 | if (f_diff < 0) | |
86 | f_diff = -f_diff; | |
87 | ||
88 | if ((unsigned)f_diff < best) { | |
89 | vco.v = vd - 8; | |
90 | vco.r = rd - 2; | |
91 | if (f_diff == 0) | |
92 | break; | |
93 | best = f_diff; | |
94 | } | |
95 | } | |
96 | ||
97 | return vco; | |
98 | } | |
99 | ||
c5a0adb5 | 100 | EXPORT_SYMBOL(icst_hz_to_vco); |