projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 652ccae5 AB |
1 | |
| 2 | menuconfig ARM_CRYPTO | |
| 3 | bool "ARM Accelerated Cryptographic Algorithms" | |
| 4 | depends on ARM | |
| 5 | help | |
| 6 | Say Y here to choose from a selection of cryptographic algorithms | |
| 7 | implemented using ARM specific CPU features or instructions. | |
| 8 | ||
| 9 | if ARM_CRYPTO | |
| 10 | ||
| 11 | config CRYPTO_SHA1_ARM | |
| 12 | tristate "SHA1 digest algorithm (ARM-asm)" | |
| 13 | select CRYPTO_SHA1 | |
| 14 | select CRYPTO_HASH | |
| 15 | help | |
| 16 | SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented | |
| 17 | using optimized ARM assembler. | |
| 18 | ||
| 19 | config CRYPTO_SHA1_ARM_NEON | |
| 20 | tristate "SHA1 digest algorithm (ARM NEON)" | |
| 21 | depends on KERNEL_MODE_NEON | |
| 22 | select CRYPTO_SHA1_ARM | |
| 23 | select CRYPTO_SHA1 | |
| 24 | select CRYPTO_HASH | |
| 25 | help | |
| 26 | SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented | |
| 27 | using optimized ARM NEON assembly, when NEON instructions are | |
| 28 | available. | |
| 29 | ||
| 864cbeed AB |
30 | config CRYPTO_SHA1_ARM_CE |
| 31 | tristate "SHA1 digest algorithm (ARM v8 Crypto Extensions)" | |
| 32 | depends on KERNEL_MODE_NEON | |
| 33 | select CRYPTO_SHA1_ARM | |
| 34 | select CRYPTO_SHA1 | |
| 35 | select CRYPTO_HASH | |
| 36 | help | |
| 37 | SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented | |
| 38 | using special ARMv8 Crypto Extensions. | |
| 006d0624 AB |
39 | |
| 40 | config CRYPTO_SHA2_ARM_CE | |
| 41 | tristate "SHA-224/256 digest algorithm (ARM v8 Crypto Extensions)" | |
| 42 | depends on KERNEL_MODE_NEON | |
| 43 | select CRYPTO_SHA256 | |
| 44 | select CRYPTO_HASH | |
| 45 | help | |
| 46 | SHA-256 secure hash standard (DFIPS 180-2) implemented | |
| 47 | using special ARMv8 Crypto Extensions. | |
| 864cbeed | 48 | |
| 652ccae5 AB |
49 | config CRYPTO_SHA512_ARM_NEON |
| 50 | tristate "SHA384 and SHA512 digest algorithm (ARM NEON)" | |
| 51 | depends on KERNEL_MODE_NEON | |
| 52 | select CRYPTO_SHA512 | |
| 53 | select CRYPTO_HASH | |
| 54 | help | |
| 55 | SHA-512 secure hash standard (DFIPS 180-2) implemented | |
| 56 | using ARM NEON instructions, when available. | |
| 57 | ||
| 58 | This version of SHA implements a 512 bit hash with 256 bits of | |
| 59 | security against collision attacks. | |
| 60 | ||
| 61 | This code also includes SHA-384, a 384 bit hash with 192 bits | |
| 62 | of security against collision attacks. | |
| 63 | ||
| 64 | config CRYPTO_AES_ARM | |
| 65 | tristate "AES cipher algorithms (ARM-asm)" | |
| 66 | depends on ARM | |
| 67 | select CRYPTO_ALGAPI | |
| 68 | select CRYPTO_AES | |
| 69 | help | |
| 70 | Use optimized AES assembler routines for ARM platforms. | |
| 71 | ||
| 72 | AES cipher algorithms (FIPS-197). AES uses the Rijndael | |
| 73 | algorithm. | |
| 74 | ||
| 75 | Rijndael appears to be consistently a very good performer in | |
| 76 | both hardware and software across a wide range of computing | |
| 77 | environments regardless of its use in feedback or non-feedback | |
| 78 | modes. Its key setup time is excellent, and its key agility is | |
| 79 | good. Rijndael's very low memory requirements make it very well | |
| 80 | suited for restricted-space environments, in which it also | |
| 81 | demonstrates excellent performance. Rijndael's operations are | |
| 82 | among the easiest to defend against power and timing attacks. | |
| 83 | ||
| 84 | The AES specifies three key sizes: 128, 192 and 256 bits | |
| 85 | ||
| 86 | See <http://csrc.nist.gov/encryption/aes/> for more information. | |
| 87 | ||
| 88 | config CRYPTO_AES_ARM_BS | |
| 89 | tristate "Bit sliced AES using NEON instructions" | |
| 90 | depends on KERNEL_MODE_NEON | |
| 91 | select CRYPTO_ALGAPI | |
| 92 | select CRYPTO_AES_ARM | |
| 93 | select CRYPTO_ABLK_HELPER | |
| 94 | help | |
| 95 | Use a faster and more secure NEON based implementation of AES in CBC, | |
| 96 | CTR and XTS modes | |
| 97 | ||
| 98 | Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode | |
| 99 | and for XTS mode encryption, CBC and XTS mode decryption speedup is | |
| 100 | around 25%. (CBC encryption speed is not affected by this driver.) | |
| 101 | This implementation does not rely on any lookup tables so it is | |
| 102 | believed to be invulnerable to cache timing attacks. | |
| 103 | ||
| 104 | endif |