Commit | Line | Data |
---|---|---|
652ccae5 AB |
1 | |
2 | menuconfig ARM_CRYPTO | |
3 | bool "ARM Accelerated Cryptographic Algorithms" | |
4 | depends on ARM | |
5 | help | |
6 | Say Y here to choose from a selection of cryptographic algorithms | |
7 | implemented using ARM specific CPU features or instructions. | |
8 | ||
9 | if ARM_CRYPTO | |
10 | ||
11 | config CRYPTO_SHA1_ARM | |
12 | tristate "SHA1 digest algorithm (ARM-asm)" | |
13 | select CRYPTO_SHA1 | |
14 | select CRYPTO_HASH | |
15 | help | |
16 | SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented | |
17 | using optimized ARM assembler. | |
18 | ||
19 | config CRYPTO_SHA1_ARM_NEON | |
20 | tristate "SHA1 digest algorithm (ARM NEON)" | |
21 | depends on KERNEL_MODE_NEON | |
22 | select CRYPTO_SHA1_ARM | |
23 | select CRYPTO_SHA1 | |
24 | select CRYPTO_HASH | |
25 | help | |
26 | SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented | |
27 | using optimized ARM NEON assembly, when NEON instructions are | |
28 | available. | |
29 | ||
864cbeed AB |
30 | config CRYPTO_SHA1_ARM_CE |
31 | tristate "SHA1 digest algorithm (ARM v8 Crypto Extensions)" | |
32 | depends on KERNEL_MODE_NEON | |
33 | select CRYPTO_SHA1_ARM | |
864cbeed AB |
34 | select CRYPTO_HASH |
35 | help | |
36 | SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented | |
37 | using special ARMv8 Crypto Extensions. | |
006d0624 AB |
38 | |
39 | config CRYPTO_SHA2_ARM_CE | |
40 | tristate "SHA-224/256 digest algorithm (ARM v8 Crypto Extensions)" | |
41 | depends on KERNEL_MODE_NEON | |
9205b949 | 42 | select CRYPTO_SHA256_ARM |
006d0624 AB |
43 | select CRYPTO_HASH |
44 | help | |
45 | SHA-256 secure hash standard (DFIPS 180-2) implemented | |
46 | using special ARMv8 Crypto Extensions. | |
864cbeed | 47 | |
f2f770d7 ST |
48 | config CRYPTO_SHA256_ARM |
49 | tristate "SHA-224/256 digest algorithm (ARM-asm and NEON)" | |
50 | select CRYPTO_HASH | |
b48321de | 51 | depends on !CPU_V7M |
f2f770d7 ST |
52 | help |
53 | SHA-256 secure hash standard (DFIPS 180-2) implemented | |
54 | using optimized ARM assembler and NEON, when available. | |
55 | ||
652ccae5 AB |
56 | config CRYPTO_SHA512_ARM_NEON |
57 | tristate "SHA384 and SHA512 digest algorithm (ARM NEON)" | |
58 | depends on KERNEL_MODE_NEON | |
59 | select CRYPTO_SHA512 | |
60 | select CRYPTO_HASH | |
61 | help | |
62 | SHA-512 secure hash standard (DFIPS 180-2) implemented | |
63 | using ARM NEON instructions, when available. | |
64 | ||
65 | This version of SHA implements a 512 bit hash with 256 bits of | |
66 | security against collision attacks. | |
67 | ||
68 | This code also includes SHA-384, a 384 bit hash with 192 bits | |
69 | of security against collision attacks. | |
70 | ||
71 | config CRYPTO_AES_ARM | |
72 | tristate "AES cipher algorithms (ARM-asm)" | |
73 | depends on ARM | |
74 | select CRYPTO_ALGAPI | |
75 | select CRYPTO_AES | |
76 | help | |
77 | Use optimized AES assembler routines for ARM platforms. | |
78 | ||
79 | AES cipher algorithms (FIPS-197). AES uses the Rijndael | |
80 | algorithm. | |
81 | ||
82 | Rijndael appears to be consistently a very good performer in | |
83 | both hardware and software across a wide range of computing | |
84 | environments regardless of its use in feedback or non-feedback | |
85 | modes. Its key setup time is excellent, and its key agility is | |
86 | good. Rijndael's very low memory requirements make it very well | |
87 | suited for restricted-space environments, in which it also | |
88 | demonstrates excellent performance. Rijndael's operations are | |
89 | among the easiest to defend against power and timing attacks. | |
90 | ||
91 | The AES specifies three key sizes: 128, 192 and 256 bits | |
92 | ||
93 | See <http://csrc.nist.gov/encryption/aes/> for more information. | |
94 | ||
95 | config CRYPTO_AES_ARM_BS | |
96 | tristate "Bit sliced AES using NEON instructions" | |
97 | depends on KERNEL_MODE_NEON | |
98 | select CRYPTO_ALGAPI | |
99 | select CRYPTO_AES_ARM | |
100 | select CRYPTO_ABLK_HELPER | |
101 | help | |
102 | Use a faster and more secure NEON based implementation of AES in CBC, | |
103 | CTR and XTS modes | |
104 | ||
105 | Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode | |
106 | and for XTS mode encryption, CBC and XTS mode decryption speedup is | |
107 | around 25%. (CBC encryption speed is not affected by this driver.) | |
108 | This implementation does not rely on any lookup tables so it is | |
109 | believed to be invulnerable to cache timing attacks. | |
110 | ||
86464859 AB |
111 | config CRYPTO_AES_ARM_CE |
112 | tristate "Accelerated AES using ARMv8 Crypto Extensions" | |
113 | depends on KERNEL_MODE_NEON | |
114 | select CRYPTO_ALGAPI | |
115 | select CRYPTO_ABLK_HELPER | |
116 | help | |
117 | Use an implementation of AES in CBC, CTR and XTS modes that uses | |
118 | ARMv8 Crypto Extensions | |
119 | ||
f1e866b1 AB |
120 | config CRYPTO_GHASH_ARM_CE |
121 | tristate "PMULL-accelerated GHASH using ARMv8 Crypto Extensions" | |
122 | depends on KERNEL_MODE_NEON | |
123 | select CRYPTO_HASH | |
124 | select CRYPTO_CRYPTD | |
125 | help | |
126 | Use an implementation of GHASH (used by the GCM AEAD chaining mode) | |
127 | that uses the 64x64 to 128 bit polynomial multiplication (vmull.p64) | |
128 | that is part of the ARMv8 Crypto Extensions | |
129 | ||
652ccae5 | 130 | endif |