projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 9f97da78 DH |
1 | #ifndef __ASM_BARRIER_H |
| 2 | #define __ASM_BARRIER_H | |
| 3 | ||
| 4 | #ifndef __ASSEMBLY__ | |
| 5 | ||
| 6 | #define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t"); | |
| 7 | ||
| 8 | #if __LINUX_ARM_ARCH__ >= 7 || \ | |
| 9 | (__LINUX_ARM_ARCH__ == 6 && defined(CONFIG_CPU_32v6K)) | |
| 10 | #define sev() __asm__ __volatile__ ("sev" : : : "memory") | |
| 11 | #define wfe() __asm__ __volatile__ ("wfe" : : : "memory") | |
| 12 | #define wfi() __asm__ __volatile__ ("wfi" : : : "memory") | |
| 13 | #endif | |
| 14 | ||
| 15 | #if __LINUX_ARM_ARCH__ >= 7 | |
| 3ea12806 WD |
16 | #define isb(option) __asm__ __volatile__ ("isb " #option : : : "memory") |
| 17 | #define dsb(option) __asm__ __volatile__ ("dsb " #option : : : "memory") | |
| 18 | #define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory") | |
| 9f97da78 | 19 | #elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6 |
| 3ea12806 | 20 | #define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ |
| 9f97da78 | 21 | : : "r" (0) : "memory") |
| 3ea12806 | 22 | #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ |
| 9f97da78 | 23 | : : "r" (0) : "memory") |
| 3ea12806 | 24 | #define dmb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \ |
| 9f97da78 DH |
25 | : : "r" (0) : "memory") |
| 26 | #elif defined(CONFIG_CPU_FA526) | |
| 3ea12806 | 27 | #define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ |
| 9f97da78 | 28 | : : "r" (0) : "memory") |
| 3ea12806 | 29 | #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ |
| 9f97da78 | 30 | : : "r" (0) : "memory") |
| 3ea12806 | 31 | #define dmb(x) __asm__ __volatile__ ("" : : : "memory") |
| 9f97da78 | 32 | #else |
| 3ea12806 WD |
33 | #define isb(x) __asm__ __volatile__ ("" : : : "memory") |
| 34 | #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ | |
| 9f97da78 | 35 | : : "r" (0) : "memory") |
| 3ea12806 | 36 | #define dmb(x) __asm__ __volatile__ ("" : : : "memory") |
| 9f97da78 DH |
37 | #endif |
| 38 | ||
| f8130906 | 39 | #ifdef CONFIG_ARM_HEAVY_MB |
| 4e1f8a6f | 40 | extern void (*soc_mb)(void); |
| f8130906 RK |
41 | extern void arm_heavy_mb(void); |
| 42 | #define __arm_heavy_mb(x...) do { dsb(x); arm_heavy_mb(); } while (0) | |
| 43 | #else | |
| 44 | #define __arm_heavy_mb(x...) dsb(x) | |
| 45 | #endif | |
| 46 | ||
| 9f97da78 DH |
47 | #ifdef CONFIG_ARCH_HAS_BARRIERS |
| 48 | #include <mach/barriers.h> | |
| 49 | #elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP) | |
| f8130906 | 50 | #define mb() __arm_heavy_mb() |
| 9f97da78 | 51 | #define rmb() dsb() |
| f8130906 | 52 | #define wmb() __arm_heavy_mb(st) |
| 1077fa36 AD |
53 | #define dma_rmb() dmb(osh) |
| 54 | #define dma_wmb() dmb(oshst) | |
| 9f97da78 | 55 | #else |
| 48aa820f RH |
56 | #define mb() barrier() |
| 57 | #define rmb() barrier() | |
| 58 | #define wmb() barrier() | |
| 1077fa36 AD |
59 | #define dma_rmb() barrier() |
| 60 | #define dma_wmb() barrier() | |
| 9f97da78 DH |
61 | #endif |
| 62 | ||
| 2b1f3de1 MT |
63 | #define __smp_mb() dmb(ish) |
| 64 | #define __smp_rmb() __smp_mb() | |
| 65 | #define __smp_wmb() dmb(ishst) | |
| 9f97da78 | 66 | |
| 335390d6 | 67 | #include <asm-generic/barrier.h> |
| 030d0178 | 68 | |
| 9f97da78 DH |
69 | #endif /* !__ASSEMBLY__ */ |
| 70 | #endif /* __ASM_BARRIER_H */ |