Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
[deliverable/linux.git] / arch / arm / include / asm / dma-mapping.h
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1da177e4
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1#ifndef ASMARM_DMA_MAPPING_H
2#define ASMARM_DMA_MAPPING_H
3
4#ifdef __KERNEL__
5
98ed7d4b 6#include <linux/mm_types.h>
dee9ba82 7#include <linux/scatterlist.h>
f99d6034 8#include <linux/dma-attrs.h>
24056f52 9#include <linux/dma-debug.h>
1da177e4 10
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11#include <asm/memory.h>
12
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13#include <xen/xen.h>
14#include <asm/xen/hypervisor.h>
15
96231b26 16#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
2dc6a016 17extern struct dma_map_ops arm_dma_ops;
dd37e940 18extern struct dma_map_ops arm_coherent_dma_ops;
2dc6a016 19
c7e9bc54 20static inline struct dma_map_ops *__generic_dma_ops(struct device *dev)
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21{
22 if (dev && dev->archdata.dma_ops)
23 return dev->archdata.dma_ops;
24 return &arm_dma_ops;
25}
26
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27static inline struct dma_map_ops *get_dma_ops(struct device *dev)
28{
29 if (xen_initial_domain())
30 return xen_dma_ops;
31 else
32 return __generic_dma_ops(dev);
33}
34
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35static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
36{
37 BUG_ON(!dev);
38 dev->archdata.dma_ops = ops;
39}
40
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41#define HAVE_ARCH_DMA_SUPPORTED 1
42extern int dma_supported(struct device *dev, u64 mask);
43
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44#ifdef __arch_page_to_dma
45#error Please update to __arch_pfn_to_dma
46#endif
47
98ed7d4b 48/*
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49 * dma_to_pfn/pfn_to_dma/dma_to_virt/virt_to_dma are architecture private
50 * functions used internally by the DMA-mapping API to provide DMA
51 * addresses. They must not be used by drivers.
98ed7d4b 52 */
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53#ifndef __arch_pfn_to_dma
54static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
58edb515 55{
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56 if (dev)
57 pfn -= dev->dma_pfn_offset;
9eedd963 58 return (dma_addr_t)__pfn_to_bus(pfn);
58edb515 59}
98ed7d4b 60
9eedd963 61static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
ef1baed8 62{
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63 unsigned long pfn = __bus_to_pfn(addr);
64
65 if (dev)
66 pfn += dev->dma_pfn_offset;
67
68 return pfn;
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69}
70
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71static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
72{
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73 if (dev) {
74 unsigned long pfn = dma_to_pfn(dev, addr);
75
76 return phys_to_virt(__pfn_to_phys(pfn));
77 }
78
01f461a3 79 return (void *)__bus_to_virt((unsigned long)addr);
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80}
81
82static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
83{
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84 if (dev)
85 return pfn_to_dma(dev, virt_to_pfn(addr));
86
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87 return (dma_addr_t)__virt_to_bus((unsigned long)(addr));
88}
26ba47b1 89
98ed7d4b 90#else
9eedd963 91static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
98ed7d4b 92{
9eedd963 93 return __arch_pfn_to_dma(dev, pfn);
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94}
95
9eedd963 96static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
ef1baed8 97{
9eedd963 98 return __arch_dma_to_pfn(dev, addr);
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99}
100
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101static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
102{
103 return __arch_dma_to_virt(dev, addr);
104}
105
106static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
107{
108 return __arch_virt_to_dma(dev, addr);
109}
110#endif
1fe53268 111
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112/* The ARM override for dma_max_pfn() */
113static inline unsigned long dma_max_pfn(struct device *dev)
114{
115 return PHYS_PFN_OFFSET + dma_to_pfn(dev, *dev->dma_mask);
116}
117#define dma_max_pfn(dev) dma_max_pfn(dev)
118
a3a60f81 119#define arch_setup_dma_ops arch_setup_dma_ops
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120extern void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
121 struct iommu_ops *iommu, bool coherent);
122
123#define arch_teardown_dma_ops arch_teardown_dma_ops
124extern void arch_teardown_dma_ops(struct device *dev);
812b99e4 125
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126/* do not use this function in a driver */
127static inline bool is_device_dma_coherent(struct device *dev)
128{
129 return dev->archdata.dma_coherent;
130}
131
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132static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
133{
134 unsigned int offset = paddr & ~PAGE_MASK;
135 return pfn_to_dma(dev, __phys_to_pfn(paddr)) + offset;
136}
137
138static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr)
139{
140 unsigned int offset = dev_addr & ~PAGE_MASK;
141 return __pfn_to_phys(dma_to_pfn(dev, dev_addr)) + offset;
142}
143
144static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
145{
146 u64 limit, mask;
147
148 if (!dev->dma_mask)
149 return 0;
150
151 mask = *dev->dma_mask;
152
153 limit = (mask + 1) & ~mask;
154 if (limit && size > limit)
155 return 0;
156
157 if ((addr | (addr + size - 1)) & ~mask)
158 return 0;
159
160 return 1;
161}
162
163static inline void dma_mark_clean(void *addr, size_t size) { }
164
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165extern int arm_dma_set_mask(struct device *dev, u64 dma_mask);
166
1da177e4 167/**
f99d6034 168 * arm_dma_alloc - allocate consistent memory for DMA
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169 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
170 * @size: required memory size
171 * @handle: bus-specific DMA address
f99d6034 172 * @attrs: optinal attributes that specific mapping properties
1da177e4 173 *
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174 * Allocate some memory for a device for performing DMA. This function
175 * allocates pages, and will return the CPU-viewed address, and sets @handle
176 * to be the device-viewed address.
1da177e4 177 */
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178extern void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
179 gfp_t gfp, struct dma_attrs *attrs);
180
1da177e4 181/**
f99d6034 182 * arm_dma_free - free memory allocated by arm_dma_alloc
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183 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
184 * @size: size of memory originally requested in dma_alloc_coherent
185 * @cpu_addr: CPU-view address returned from dma_alloc_coherent
186 * @handle: device-view address returned from dma_alloc_coherent
f99d6034 187 * @attrs: optinal attributes that specific mapping properties
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188 *
189 * Free (and unmap) a DMA buffer previously allocated by
f99d6034 190 * arm_dma_alloc().
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191 *
192 * References to memory and mappings associated with cpu_addr/handle
193 * during and after this call executing are illegal.
194 */
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195extern void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
196 dma_addr_t handle, struct dma_attrs *attrs);
197
1da177e4 198/**
f99d6034 199 * arm_dma_mmap - map a coherent DMA allocation into user space
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200 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
201 * @vma: vm_area_struct describing requested user mapping
202 * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
203 * @handle: device-view address returned from dma_alloc_coherent
204 * @size: size of memory originally requested in dma_alloc_coherent
f99d6034 205 * @attrs: optinal attributes that specific mapping properties
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206 *
207 * Map a coherent DMA buffer previously allocated by dma_alloc_coherent
208 * into user space. The coherent DMA buffer must not be freed by the
209 * driver until the user space mapping has been released.
210 */
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211extern int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
212 void *cpu_addr, dma_addr_t dma_addr, size_t size,
213 struct dma_attrs *attrs);
1da177e4 214
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215/*
216 * This can be called during early boot to increase the size of the atomic
217 * coherent DMA pool above the default value of 256KiB. It must be called
218 * before postcore_initcall.
219 */
220extern void __init init_dma_coherent_pool_size(unsigned long size);
221
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222/*
223 * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
224 * and utilize bounce buffers as needed to work around limited DMA windows.
225 *
226 * On the SA-1111, a bug limits DMA to only certain regions of RAM.
227 * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
228 * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
229 *
230 * The following are helper functions used by the dmabounce subystem
231 *
232 */
233
234/**
235 * dmabounce_register_dev
236 *
237 * @dev: valid struct device pointer
238 * @small_buf_size: size of buffers to use with small buffer pool
239 * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
0703ed2a 240 * @needs_bounce_fn: called to determine whether buffer needs bouncing
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241 *
242 * This function should be called by low-level platform code to register
243 * a device as requireing DMA buffer bouncing. The function will allocate
244 * appropriate DMA pools for the device.
8c8a0ec5 245 */
3216a97b 246extern int dmabounce_register_dev(struct device *, unsigned long,
0703ed2a 247 unsigned long, int (*)(struct device *, dma_addr_t, size_t));
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248
249/**
250 * dmabounce_unregister_dev
251 *
252 * @dev: valid struct device pointer
253 *
254 * This function should be called by low-level platform code when device
255 * that was previously registered with dmabounce_register_dev is removed
256 * from the system.
257 *
258 */
259extern void dmabounce_unregister_dev(struct device *);
260
8c8a0ec5 261
24056f52 262
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263/*
264 * The scatter list versions of the above methods.
1da177e4 265 */
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266extern int arm_dma_map_sg(struct device *, struct scatterlist *, int,
267 enum dma_data_direction, struct dma_attrs *attrs);
268extern void arm_dma_unmap_sg(struct device *, struct scatterlist *, int,
269 enum dma_data_direction, struct dma_attrs *attrs);
270extern void arm_dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,
3216a97b 271 enum dma_data_direction);
2dc6a016 272extern void arm_dma_sync_sg_for_device(struct device *, struct scatterlist *, int,
3216a97b 273 enum dma_data_direction);
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274extern int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
275 void *cpu_addr, dma_addr_t dma_addr, size_t size,
276 struct dma_attrs *attrs);
1da177e4 277
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278#endif /* __KERNEL__ */
279#endif
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