Disintegrate asm/system.h for ARM
[deliverable/linux.git] / arch / arm / include / asm / dma.h
CommitLineData
1da177e4
LT
1#ifndef __ASM_ARM_DMA_H
2#define __ASM_ARM_DMA_H
3
d4c6fc99
RK
4/*
5 * This is the maximum virtual address which can be DMA'd from.
6 */
65032018
NP
7#ifndef CONFIG_ZONE_DMA
8#define MAX_DMA_ADDRESS 0xffffffffUL
2fb3ec5c 9#else
65032018
NP
10#define MAX_DMA_ADDRESS ({ \
11 extern unsigned long arm_dma_zone_size; \
12 arm_dma_zone_size ? \
13 (PAGE_OFFSET + arm_dma_zone_size) : 0xffffffffUL; })
d4c6fc99
RK
14#endif
15
dcea83ad
RK
16#ifdef CONFIG_ISA_DMA_API
17/*
18 * This is used to support drivers written for the x86 ISA DMA API.
19 * It should not be re-used except for that purpose.
20 */
21#include <linux/spinlock.h>
dcea83ad
RK
22#include <asm/scatterlist.h>
23
f40b121d 24#include <mach/isa-dma.h>
dcea83ad 25
bc6447b8
RK
26/*
27 * The DMA modes reflect the settings for the ISA DMA controller
28 */
29#define DMA_MODE_MASK 0xcc
1da177e4 30
bc6447b8
RK
31#define DMA_MODE_READ 0x44
32#define DMA_MODE_WRITE 0x48
33#define DMA_MODE_CASCADE 0xc0
34#define DMA_AUTOINIT 0x10
1da177e4 35
bd31b859 36extern raw_spinlock_t dma_spin_lock;
1da177e4
LT
37
38static inline unsigned long claim_dma_lock(void)
39{
40 unsigned long flags;
bd31b859 41 raw_spin_lock_irqsave(&dma_spin_lock, flags);
1da177e4
LT
42 return flags;
43}
44
45static inline void release_dma_lock(unsigned long flags)
46{
bd31b859 47 raw_spin_unlock_irqrestore(&dma_spin_lock, flags);
1da177e4
LT
48}
49
50/* Clear the 'DMA Pointer Flip Flop'.
51 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
52 */
1df81302 53#define clear_dma_ff(chan)
1da177e4
LT
54
55/* Set only the page register bits of the transfer address.
56 *
57 * NOTE: This is an architecture specific function, and should
58 * be hidden from the drivers
59 */
1df81302 60extern void set_dma_page(unsigned int chan, char pagenr);
1da177e4
LT
61
62/* Request a DMA channel
63 *
64 * Some architectures may need to do allocate an interrupt
65 */
1df81302 66extern int request_dma(unsigned int chan, const char * device_id);
1da177e4
LT
67
68/* Free a DMA channel
69 *
70 * Some architectures may need to do free an interrupt
71 */
1df81302 72extern void free_dma(unsigned int chan);
1da177e4
LT
73
74/* Enable DMA for this channel
75 *
76 * On some architectures, this may have other side effects like
77 * enabling an interrupt and setting the DMA registers.
78 */
1df81302 79extern void enable_dma(unsigned int chan);
1da177e4
LT
80
81/* Disable DMA for this channel
82 *
83 * On some architectures, this may have other side effects like
84 * disabling an interrupt or whatever.
85 */
1df81302 86extern void disable_dma(unsigned int chan);
1da177e4
LT
87
88/* Test whether the specified channel has an active DMA transfer
89 */
1df81302 90extern int dma_channel_active(unsigned int chan);
1da177e4
LT
91
92/* Set the DMA scatter gather list for this channel
93 *
94 * This should not be called if a DMA channel is enabled,
95 * especially since some DMA architectures don't update the
96 * DMA address immediately, but defer it to the enable_dma().
97 */
1df81302 98extern void set_dma_sg(unsigned int chan, struct scatterlist *sg, int nr_sg);
1da177e4
LT
99
100/* Set the DMA address for this channel
101 *
102 * This should not be called if a DMA channel is enabled,
103 * especially since some DMA architectures don't update the
104 * DMA address immediately, but defer it to the enable_dma().
105 */
1df81302
RK
106extern void __set_dma_addr(unsigned int chan, void *addr);
107#define set_dma_addr(chan, addr) \
108 __set_dma_addr(chan, bus_to_virt(addr))
1da177e4
LT
109
110/* Set the DMA byte count for this channel
111 *
112 * This should not be called if a DMA channel is enabled,
113 * especially since some DMA architectures don't update the
114 * DMA count immediately, but defer it to the enable_dma().
115 */
1df81302 116extern void set_dma_count(unsigned int chan, unsigned long count);
1da177e4
LT
117
118/* Set the transfer direction for this channel
119 *
120 * This should not be called if a DMA channel is enabled,
121 * especially since some DMA architectures don't update the
122 * DMA transfer direction immediately, but defer it to the
123 * enable_dma().
124 */
f0ffc816 125extern void set_dma_mode(unsigned int chan, unsigned int mode);
1da177e4
LT
126
127/* Set the transfer speed for this channel
128 */
1df81302 129extern void set_dma_speed(unsigned int chan, int cycle_ns);
1da177e4
LT
130
131/* Get DMA residue count. After a DMA transfer, this
132 * should return zero. Reading this while a DMA transfer is
133 * still in progress will return unpredictable results.
134 * If called before the channel has been used, it may return 1.
135 * Otherwise, it returns the number of _bytes_ left to transfer.
136 */
1df81302 137extern int get_dma_residue(unsigned int chan);
1da177e4
LT
138
139#ifndef NO_DMA
140#define NO_DMA 255
141#endif
142
f892027c
PH
143#endif /* CONFIG_ISA_DMA_API */
144
1da177e4
LT
145#ifdef CONFIG_PCI
146extern int isa_dma_bridge_buggy;
147#else
148#define isa_dma_bridge_buggy (0)
149#endif
150
dcea83ad 151#endif /* __ASM_ARM_DMA_H */
This page took 0.523056 seconds and 5 git commands to generate.