Commit | Line | Data |
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1da177e4 | 1 | /* |
4baa9922 | 2 | * arch/arm/include/asm/domain.h |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 1999 Russell King. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | #ifndef __ASM_PROC_DOMAIN_H | |
11 | #define __ASM_PROC_DOMAIN_H | |
12 | ||
9f97da78 DH |
13 | #ifndef __ASSEMBLY__ |
14 | #include <asm/barrier.h> | |
6e8f580d | 15 | #include <asm/thread_info.h> |
9f97da78 DH |
16 | #endif |
17 | ||
1da177e4 LT |
18 | /* |
19 | * Domain numbers | |
20 | * | |
21 | * DOMAIN_IO - domain 2 includes all IO only | |
22 | * DOMAIN_USER - domain 1 includes all user memory only | |
23 | * DOMAIN_KERNEL - domain 0 includes all kernel memory only | |
23bdf86a LB |
24 | * |
25 | * The domain numbering depends on whether we support 36 physical | |
26 | * address for I/O or not. Addresses above the 32 bit boundary can | |
27 | * only be mapped using supersections and supersections can only | |
28 | * be set for domain 0. We could just default to DOMAIN_IO as zero, | |
29 | * but there may be systems with supersection support and no 36-bit | |
30 | * addressing. In such cases, we want to map system memory with | |
31 | * supersections to reduce TLB misses and footprint. | |
32 | * | |
33 | * 36-bit addressing and supersections are only available on | |
34 | * CPUs based on ARMv6+ or the Intel XSC3 core. | |
1da177e4 | 35 | */ |
23bdf86a | 36 | #ifndef CONFIG_IO_36 |
1da177e4 | 37 | #define DOMAIN_KERNEL 0 |
1da177e4 LT |
38 | #define DOMAIN_USER 1 |
39 | #define DOMAIN_IO 2 | |
23bdf86a LB |
40 | #else |
41 | #define DOMAIN_KERNEL 2 | |
23bdf86a LB |
42 | #define DOMAIN_USER 1 |
43 | #define DOMAIN_IO 0 | |
44 | #endif | |
a02d8dfd | 45 | #define DOMAIN_VECTORS 3 |
1da177e4 LT |
46 | |
47 | /* | |
48 | * Domain types | |
49 | */ | |
50 | #define DOMAIN_NOACCESS 0 | |
51 | #define DOMAIN_CLIENT 1 | |
247055aa | 52 | #ifdef CONFIG_CPU_USE_DOMAINS |
1da177e4 | 53 | #define DOMAIN_MANAGER 3 |
247055aa CM |
54 | #else |
55 | #define DOMAIN_MANAGER 1 | |
56 | #endif | |
1da177e4 | 57 | |
8e798706 RK |
58 | #define domain_mask(dom) ((3) << (2 * (dom))) |
59 | #define domain_val(dom,type) ((type) << (2 * (dom))) | |
1da177e4 | 60 | |
a5e090ac RK |
61 | #ifdef CONFIG_CPU_SW_DOMAIN_PAN |
62 | #define DACR_INIT \ | |
63 | (domain_val(DOMAIN_USER, DOMAIN_NOACCESS) | \ | |
64 | domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \ | |
65 | domain_val(DOMAIN_IO, DOMAIN_CLIENT) | \ | |
66 | domain_val(DOMAIN_VECTORS, DOMAIN_CLIENT)) | |
67 | #else | |
0171356a | 68 | #define DACR_INIT \ |
3c2aed5b | 69 | (domain_val(DOMAIN_USER, DOMAIN_CLIENT) | \ |
0171356a | 70 | domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \ |
a02d8dfd RK |
71 | domain_val(DOMAIN_IO, DOMAIN_CLIENT) | \ |
72 | domain_val(DOMAIN_VECTORS, DOMAIN_CLIENT)) | |
a5e090ac RK |
73 | #endif |
74 | ||
75 | #define __DACR_DEFAULT \ | |
76 | domain_val(DOMAIN_KERNEL, DOMAIN_CLIENT) | \ | |
77 | domain_val(DOMAIN_IO, DOMAIN_CLIENT) | \ | |
78 | domain_val(DOMAIN_VECTORS, DOMAIN_CLIENT) | |
79 | ||
80 | #define DACR_UACCESS_DISABLE \ | |
81 | (__DACR_DEFAULT | domain_val(DOMAIN_USER, DOMAIN_NOACCESS)) | |
82 | #define DACR_UACCESS_ENABLE \ | |
83 | (__DACR_DEFAULT | domain_val(DOMAIN_USER, DOMAIN_CLIENT)) | |
0171356a | 84 | |
1da177e4 | 85 | #ifndef __ASSEMBLY__ |
002547b4 | 86 | |
1eef5d2f RK |
87 | static inline unsigned int get_domain(void) |
88 | { | |
89 | unsigned int domain; | |
90 | ||
91 | asm( | |
92 | "mrc p15, 0, %0, c3, c0 @ get domain" | |
6e8f580d RK |
93 | : "=r" (domain) |
94 | : "m" (current_thread_info()->cpu_domain)); | |
1eef5d2f RK |
95 | |
96 | return domain; | |
97 | } | |
98 | ||
82401bf1 RK |
99 | static inline void set_domain(unsigned val) |
100 | { | |
101 | asm volatile( | |
102 | "mcr p15, 0, %0, c3, c0 @ set domain" | |
6e8f580d | 103 | : : "r" (val) : "memory"); |
82401bf1 RK |
104 | isb(); |
105 | } | |
1da177e4 | 106 | |
a5e090ac | 107 | #ifdef CONFIG_CPU_USE_DOMAINS |
1da177e4 LT |
108 | #define modify_domain(dom,type) \ |
109 | do { \ | |
1eef5d2f | 110 | unsigned int domain = get_domain(); \ |
8e798706 | 111 | domain &= ~domain_mask(dom); \ |
1eef5d2f RK |
112 | domain = domain | domain_val(dom, type); \ |
113 | set_domain(domain); \ | |
1da177e4 LT |
114 | } while (0) |
115 | ||
002547b4 | 116 | #else |
82401bf1 | 117 | static inline void modify_domain(unsigned dom, unsigned type) { } |
002547b4 RK |
118 | #endif |
119 | ||
247055aa CM |
120 | /* |
121 | * Generate the T (user) versions of the LDR/STR and related | |
122 | * instructions (inline assembly) | |
123 | */ | |
124 | #ifdef CONFIG_CPU_USE_DOMAINS | |
4e7682d0 | 125 | #define TUSER(instr) #instr "t" |
247055aa | 126 | #else |
4e7682d0 | 127 | #define TUSER(instr) #instr |
1da177e4 | 128 | #endif |
247055aa CM |
129 | |
130 | #else /* __ASSEMBLY__ */ | |
131 | ||
132 | /* | |
133 | * Generate the T (user) versions of the LDR/STR and related | |
134 | * instructions | |
135 | */ | |
136 | #ifdef CONFIG_CPU_USE_DOMAINS | |
4e7682d0 | 137 | #define TUSER(instr) instr ## t |
247055aa | 138 | #else |
4e7682d0 | 139 | #define TUSER(instr) instr |
247055aa CM |
140 | #endif |
141 | ||
142 | #endif /* __ASSEMBLY__ */ | |
143 | ||
144 | #endif /* !__ASM_PROC_DOMAIN_H */ |