ARM: clps711x: Using a single definition for the PHYS and VIRT registers offset
[deliverable/linux.git] / arch / arm / include / asm / hardware / ep7212.h
CommitLineData
1da177e4 1/*
4baa9922 2 * arch/arm/include/asm/hardware/ep7212.h
1da177e4
LT
3 *
4 * This file contains the hardware definitions of the EP7212 internal
5 * registers.
6 *
7 * Copyright (C) 2000 Deep Blue Solutions Ltd.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23#ifndef __ASM_HARDWARE_EP7212_H
24#define __ASM_HARDWARE_EP7212_H
25
1da177e4
LT
26/*
27 * These registers are specific to the EP7212 only
28 */
29#define DAIR 0x2000
30#define DAIR0 0x2040
31#define DAIDR1 0x2080
32#define DAIDR2 0x20c0
33#define DAISR 0x2100
34#define SYSCON3 0x2200
35#define INTSR3 0x2240
36#define INTMR3 0x2280
37#define LEDFLSH 0x22c0
38
39#define DAIR_DAIEN (1 << 16)
40#define DAIR_ECS (1 << 17)
41#define DAIR_LCTM (1 << 19)
42#define DAIR_LCRM (1 << 20)
43#define DAIR_RCTM (1 << 21)
44#define DAIR_RCRM (1 << 22)
45#define DAIR_LBM (1 << 23)
46
47#define DAIDR2_FIFOEN (1 << 15)
48#define DAIDR2_FIFOLEFT (0x0d << 16)
49#define DAIDR2_FIFORIGHT (0x11 << 16)
50
51#define DAISR_RCTS (1 << 0)
52#define DAISR_RCRS (1 << 1)
53#define DAISR_LCTS (1 << 2)
54#define DAISR_LCRS (1 << 3)
55#define DAISR_RCTU (1 << 4)
56#define DAISR_RCRO (1 << 5)
57#define DAISR_LCTU (1 << 6)
58#define DAISR_LCRO (1 << 7)
59#define DAISR_RCNF (1 << 8)
60#define DAISR_RCNE (1 << 9)
61#define DAISR_LCNF (1 << 10)
62#define DAISR_LCNE (1 << 11)
63#define DAISR_FIFO (1 << 12)
64
65#define SYSCON3_ADCCON (1 << 0)
66#define SYSCON3_DAISEL (1 << 3)
67#define SYSCON3_ADCCKNSEN (1 << 4)
68#define SYSCON3_FASTWAKE (1 << 8)
69#define SYSCON3_DAIEN (1 << 9)
70
71#endif /* __ASM_HARDWARE_EP7212_H */
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