Merge tag 'pci-v3.15-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaa...
[deliverable/linux.git] / arch / arm / include / asm / memory.h
CommitLineData
1da177e4 1/*
4baa9922 2 * arch/arm/include/asm/memory.h
1da177e4
LT
3 *
4 * Copyright (C) 2000-2002 Russell King
002547b4 5 * modification for nommu, Hyok S. Choi, 2004
1da177e4
LT
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Note: this file should not be included by non-asm/.h files
12 */
13#ifndef __ASM_ARM_MEMORY_H
14#define __ASM_ARM_MEMORY_H
15
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LB
16#include <linux/compiler.h>
17#include <linux/const.h>
3a6b1676 18#include <linux/types.h>
158e8bfe 19#include <linux/sizes.h>
8d5796d2 20
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CC
21#include <asm/cache.h>
22
0cdc8b92 23#ifdef CONFIG_NEED_MACH_MEMORY_H
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NP
24#include <mach/memory.h>
25#endif
26
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NP
27/*
28 * Allow for constants defined here to be used from assembly code
29 * by prepending the UL suffix only with actual C code compilation.
30 */
8d5796d2 31#define UL(x) _AC(x, UL)
1da177e4 32
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33/* PAGE_OFFSET - the virtual address of the start of the kernel image */
34#define PAGE_OFFSET UL(CONFIG_PAGE_OFFSET)
35
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36#ifdef CONFIG_MMU
37
1da177e4
LT
38/*
39 * TASK_SIZE - the maximum size of a user space task.
40 * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area
41 */
5d1c20bc 42#define TASK_SIZE (UL(CONFIG_PAGE_OFFSET) - UL(SZ_16M))
79d1f5c9 43#define TASK_UNMAPPED_BASE ALIGN(TASK_SIZE / 3, SZ_16M)
1da177e4
LT
44
45/*
46 * The maximum size of a 26-bit user space task.
47 */
5d1c20bc 48#define TASK_SIZE_26 (UL(1) << 26)
1da177e4 49
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50/*
51 * The module space lives between the addresses given by TASK_SIZE
52 * and PAGE_OFFSET - it must be within 32MB of the kernel text.
53 */
adca6dc2 54#ifndef CONFIG_THUMB2_KERNEL
5d1c20bc 55#define MODULES_VADDR (PAGE_OFFSET - SZ_16M)
adca6dc2
CM
56#else
57/* smaller range for Thumb-2 symbols relocation (2^24)*/
5d1c20bc 58#define MODULES_VADDR (PAGE_OFFSET - SZ_8M)
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CM
59#endif
60
ab4f2ee1 61#if TASK_SIZE > MODULES_VADDR
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62#error Top of user space clashes with start of module space
63#endif
64
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65/*
66 * The highmem pkmap virtual space shares the end of the module area.
67 */
68#ifdef CONFIG_HIGHMEM
69#define MODULES_END (PAGE_OFFSET - PMD_SIZE)
70#else
71#define MODULES_END (PAGE_OFFSET)
72#endif
73
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74/*
75 * The XIP kernel gets mapped at the bottom of the module vm area.
76 * Since we use sections to map it, this macro replaces the physical address
77 * with its virtual address while keeping offset from the base section.
78 */
ab4f2ee1 79#define XIP_VIRT_ADDR(physaddr) (MODULES_VADDR + ((physaddr) & 0x000fffff))
002547b4 80
ff0daca5 81/*
a069c896 82 * Allow 16MB-aligned ioremap pages
ff0daca5 83 */
a069c896 84#define IOREMAP_MAX_ORDER 24
ff0daca5 85
a7bd08c8 86#define CONSISTENT_END (0xffe00000UL)
a7bd08c8 87
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88#else /* CONFIG_MMU */
89
90/*
91 * The limitation of user task size can grow up to the end of free ram region.
92 * It is difficult to define and perhaps will never meet the original meaning
93 * of this define that was meant to.
94 * Fortunately, there is no reference for this in noMMU mode, for now.
95 */
96#ifndef TASK_SIZE
97#define TASK_SIZE (CONFIG_DRAM_SIZE)
98#endif
99
100#ifndef TASK_UNMAPPED_BASE
101#define TASK_UNMAPPED_BASE UL(0x00000000)
102#endif
103
002547b4 104#ifndef END_MEM
c931b4f6 105#define END_MEM (UL(CONFIG_DRAM_BASE) + CONFIG_DRAM_SIZE)
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106#endif
107
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108/*
109 * The module can be at any place in ram in nommu mode.
110 */
ab4f2ee1 111#define MODULES_END (END_MEM)
b713aa0b 112#define MODULES_VADDR PAGE_OFFSET
002547b4 113
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114#define XIP_VIRT_ADDR(physaddr) (physaddr)
115
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116#endif /* !CONFIG_MMU */
117
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118/*
119 * We fix the TCM memories max 32 KiB ITCM resp DTCM at these
120 * locations
121 */
122#ifdef CONFIG_HAVE_TCM
123#define ITCM_OFFSET UL(0xfffe0000)
124#define DTCM_OFFSET UL(0xfffe8000)
125#endif
126
9d4ae727
DS
127/*
128 * Convert a physical address to a Page Frame Number and back
129 */
3a6b1676
WD
130#define __phys_to_pfn(paddr) ((unsigned long)((paddr) >> PAGE_SHIFT))
131#define __pfn_to_phys(pfn) ((phys_addr_t)(pfn) << PAGE_SHIFT)
9d4ae727 132
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133/*
134 * Convert a page to/from a physical address
135 */
136#define page_to_phys(page) (__pfn_to_phys(page_to_pfn(page)))
137#define phys_to_page(phys) (pfn_to_page(__phys_to_pfn(phys)))
138
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CC
139/*
140 * Minimum guaranted alignment in pgd_alloc(). The page table pointers passed
141 * around in head.S and proc-*.S are shifted by this amount, in order to
142 * leave spare high bits for systems with physical address extension. This
143 * does not fully accomodate the 40-bit addressing capability of ARM LPAE, but
144 * gives us about 38-bits or so.
145 */
146#ifdef CONFIG_ARM_LPAE
147#define ARCH_PGD_SHIFT L1_CACHE_SHIFT
148#else
149#define ARCH_PGD_SHIFT 0
150#endif
151#define ARCH_PGD_MASK ((1 << ARCH_PGD_SHIFT) - 1)
152
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153/*
154 * PLAT_PHYS_OFFSET is the offset (from zero) of the start of physical
155 * memory. This is used for XIP and NoMMU kernels, or by kernels which
156 * have their own mach/memory.h. Assembly code must always use
157 * PLAT_PHYS_OFFSET and not PHYS_OFFSET.
158 */
159#ifndef PLAT_PHYS_OFFSET
160#define PLAT_PHYS_OFFSET UL(CONFIG_PHYS_OFFSET)
161#endif
162
1da177e4
LT
163#ifndef __ASSEMBLY__
164
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165/*
166 * Physical vs virtual RAM address space conversion. These are
167 * private definitions which should NOT be used outside memory.h
168 * files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
169 */
170#ifndef __virt_to_phys
171#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
172
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173/*
174 * Constants used to force the right instruction encodings and shifts
175 * so that all we need to do is modify the 8-bit constant field.
176 */
177#define __PV_BITS_31_24 0x81000000
f52bb722 178#define __PV_BITS_7_0 0x81
cada3c08 179
f52bb722
S
180extern u64 __pv_phys_offset;
181extern u64 __pv_offset;
182extern void fixup_pv_table(const void *, unsigned long);
183extern const void *__pv_table_begin, *__pv_table_end;
184
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185#define PHYS_OFFSET __pv_phys_offset
186
cada3c08 187#define __pv_stub(from,to,instr,type) \
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188 __asm__("@ __pv_stub\n" \
189 "1: " instr " %0, %1, %2\n" \
190 " .pushsection .pv_table,\"a\"\n" \
191 " .long 1b\n" \
192 " .popsection\n" \
193 : "=r" (to) \
cada3c08 194 : "r" (from), "I" (type))
dc21af99 195
f52bb722
S
196#define __pv_stub_mov_hi(t) \
197 __asm__ volatile("@ __pv_stub_mov\n" \
198 "1: mov %R0, %1\n" \
199 " .pushsection .pv_table,\"a\"\n" \
200 " .long 1b\n" \
201 " .popsection\n" \
202 : "=r" (t) \
203 : "I" (__PV_BITS_7_0))
204
205#define __pv_add_carry_stub(x, y) \
206 __asm__ volatile("@ __pv_add_carry_stub\n" \
207 "1: adds %Q0, %1, %2\n" \
208 " adc %R0, %R0, #0\n" \
209 " .pushsection .pv_table,\"a\"\n" \
210 " .long 1b\n" \
211 " .popsection\n" \
212 : "+r" (y) \
213 : "r" (x), "I" (__PV_BITS_31_24) \
214 : "cc")
215
ca5a45c0 216static inline phys_addr_t __virt_to_phys(unsigned long x)
dc21af99 217{
f52bb722
S
218 phys_addr_t t;
219
220 if (sizeof(phys_addr_t) == 4) {
221 __pv_stub(x, t, "add", __PV_BITS_31_24);
222 } else {
223 __pv_stub_mov_hi(t);
224 __pv_add_carry_stub(x, t);
225 }
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226 return t;
227}
228
ca5a45c0 229static inline unsigned long __phys_to_virt(phys_addr_t x)
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230{
231 unsigned long t;
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VK
232
233 /*
234 * 'unsigned long' cast discard upper word when
235 * phys_addr_t is 64 bit, and makes sure that inline
236 * assembler expression receives 32 bit argument
237 * in place where 'r' 32 bit operand is expected.
238 */
239 __pv_stub((unsigned long) x, t, "sub", __PV_BITS_31_24);
dc21af99
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240 return t;
241}
ca5a45c0 242
dc21af99 243#else
ca5a45c0 244
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245#define PHYS_OFFSET PLAT_PHYS_OFFSET
246
ca5a45c0
SS
247static inline phys_addr_t __virt_to_phys(unsigned long x)
248{
249 return (phys_addr_t)x - PAGE_OFFSET + PHYS_OFFSET;
250}
251
252static inline unsigned long __phys_to_virt(phys_addr_t x)
253{
254 return x - PHYS_OFFSET + PAGE_OFFSET;
255}
256
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257#endif
258#endif
b4ad5155 259
1da177e4
LT
260/*
261 * PFNs are used to describe any physical page; this means
262 * PFN 0 == physical address 0.
263 *
264 * This is the PFN of the first RAM page in the kernel
265 * direct-mapped view. We assume this is the first page
266 * of RAM in the mem_map as well.
267 */
5b20c5b2 268#define PHYS_PFN_OFFSET ((unsigned long)(PHYS_OFFSET >> PAGE_SHIFT))
1da177e4
LT
269
270/*
271 * These are *only* valid on the kernel direct mapped RAM memory.
272 * Note: Drivers should NOT use these. They are the wrong
273 * translation for translating DMA addresses. Use the driver
274 * DMA support - see dma-mapping.h.
275 */
3a6b1676 276static inline phys_addr_t virt_to_phys(const volatile void *x)
1da177e4
LT
277{
278 return __virt_to_phys((unsigned long)(x));
279}
280
3a6b1676 281static inline void *phys_to_virt(phys_addr_t x)
1da177e4 282{
ca5a45c0 283 return (void *)__phys_to_virt(x);
1da177e4
LT
284}
285
286/*
287 * Drivers should NOT use these either.
288 */
289#define __pa(x) __virt_to_phys((unsigned long)(x))
ca5a45c0 290#define __va(x) ((void *)__phys_to_virt((phys_addr_t)(x)))
31a5539e 291#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
1da177e4 292
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RK
293extern phys_addr_t (*arch_virt_to_idmap)(unsigned long x);
294
4dc9a817
SS
295/*
296 * These are for systems that have a hardware interconnect supported alias of
297 * physical memory for idmap purposes. Most cases should leave these
298 * untouched.
299 */
300static inline phys_addr_t __virt_to_idmap(unsigned long x)
301{
302 if (arch_virt_to_idmap)
303 return arch_virt_to_idmap(x);
304 else
305 return __virt_to_phys(x);
306}
307
308#define virt_to_idmap(x) __virt_to_idmap((unsigned long)(x))
309
1da177e4
LT
310/*
311 * Virtual <-> DMA view memory address translations
312 * Again, these are *only* valid on the kernel direct mapped RAM
313 * memory. Use of these is *deprecated* (and that doesn't mean
314 * use the __ prefixed forms instead.) See dma-mapping.h.
315 */
b5ee9002
NP
316#ifndef __virt_to_bus
317#define __virt_to_bus __virt_to_phys
318#define __bus_to_virt __phys_to_virt
1c4a4f48
RK
319#define __pfn_to_bus(x) __pfn_to_phys(x)
320#define __bus_to_pfn(x) __phys_to_pfn(x)
b5ee9002
NP
321#endif
322
a5d533ee 323#ifdef CONFIG_VIRT_TO_BUS
1da177e4
LT
324static inline __deprecated unsigned long virt_to_bus(void *x)
325{
326 return __virt_to_bus((unsigned long)x);
327}
328
329static inline __deprecated void *bus_to_virt(unsigned long x)
330{
331 return (void *)__bus_to_virt(x);
332}
a5d533ee 333#endif
1da177e4
LT
334
335/*
336 * Conversion between a struct page and a physical address.
337 *
1da177e4
LT
338 * page_to_pfn(page) convert a struct page * to a PFN number
339 * pfn_to_page(pfn) convert a _valid_ PFN number to struct page *
1da177e4
LT
340 *
341 * virt_to_page(k) convert a _valid_ virtual address to struct page *
342 * virt_addr_valid(k) indicates whether a virtual address is valid
343 */
7d129637 344#define ARCH_PFN_OFFSET PHYS_PFN_OFFSET
05944d74 345
7d129637 346#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
efea3403
LA
347#define virt_addr_valid(kaddr) (((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory) \
348 && pfn_valid(__pa(kaddr) >> PAGE_SHIFT) )
1da177e4 349
1da177e4
LT
350#endif
351
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KH
352#include <asm-generic/memory_model.h>
353
1da177e4 354#endif
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