[ARM] Rename ISA mach/dma.h header to mach/isa-dma.h
[deliverable/linux.git] / arch / arm / include / asm / mmu_context.h
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1da177e4 1/*
4baa9922 2 * arch/arm/include/asm/mmu_context.h
1da177e4
LT
3 *
4 * Copyright (C) 1996 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Changelog:
11 * 27-06-1996 RMK Created
12 */
13#ifndef __ASM_ARM_MMU_CONTEXT_H
14#define __ASM_ARM_MMU_CONTEXT_H
15
8dc39b88 16#include <linux/compiler.h>
4fe15ba0 17#include <asm/cacheflush.h>
46097c7d 18#include <asm/cachetype.h>
1da177e4 19#include <asm/proc-fns.h>
d6dd61c8 20#include <asm-generic/mm_hooks.h>
1da177e4 21
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22void __check_kvm_seq(struct mm_struct *mm);
23
516793c6 24#ifdef CONFIG_CPU_HAS_ASID
1da177e4
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25
26/*
27 * On ARMv6, we have the following structure in the Context ID:
28 *
29 * 31 7 0
30 * +-------------------------+-----------+
31 * | process ID | ASID |
32 * +-------------------------+-----------+
33 * | context ID |
34 * +-------------------------------------+
35 *
36 * The ASID is used to tag entries in the CPU caches and TLBs.
37 * The context ID is used by debuggers and trace logic, and
38 * should be unique within all running processes.
39 */
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40#define ASID_BITS 8
41#define ASID_MASK ((~0) << ASID_BITS)
42#define ASID_FIRST_VERSION (1 << ASID_BITS)
1da177e4
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43
44extern unsigned int cpu_last_asid;
45
46void __init_new_context(struct task_struct *tsk, struct mm_struct *mm);
47void __new_context(struct mm_struct *mm);
48
49static inline void check_context(struct mm_struct *mm)
50{
51 if (unlikely((mm->context.id ^ cpu_last_asid) >> ASID_BITS))
52 __new_context(mm);
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53
54 if (unlikely(mm->context.kvm_seq != init_mm.context.kvm_seq))
55 __check_kvm_seq(mm);
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56}
57
58#define init_new_context(tsk,mm) (__init_new_context(tsk,mm),0)
59
60#else
61
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62static inline void check_context(struct mm_struct *mm)
63{
64 if (unlikely(mm->context.kvm_seq != init_mm.context.kvm_seq))
65 __check_kvm_seq(mm);
66}
67
1da177e4
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68#define init_new_context(tsk,mm) 0
69
70#endif
71
72#define destroy_context(mm) do { } while(0)
73
74/*
75 * This is called when "tsk" is about to enter lazy TLB mode.
76 *
77 * mm: describes the currently active mm context
78 * tsk: task which is entering lazy tlb
79 * cpu: cpu number which is entering lazy tlb
80 *
81 * tsk->mm will be NULL
82 */
83static inline void
84enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
85{
86}
87
88/*
89 * This is the actual mm switch as far as the scheduler
90 * is concerned. No registers are touched. We avoid
91 * calling the CPU specific function when the mm hasn't
92 * actually changed.
93 */
94static inline void
95switch_mm(struct mm_struct *prev, struct mm_struct *next,
96 struct task_struct *tsk)
97{
002547b4 98#ifdef CONFIG_MMU
1da177e4
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99 unsigned int cpu = smp_processor_id();
100
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101#ifdef CONFIG_SMP
102 /* check for possible thread migration */
103 if (!cpus_empty(next->cpu_vm_mask) && !cpu_isset(cpu, next->cpu_vm_mask))
104 __flush_icache_all();
105#endif
8678c1f0 106 if (!cpu_test_and_set(cpu, next->cpu_vm_mask) || prev != next) {
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107 check_context(next);
108 cpu_switch_mm(next->pgd, next);
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109 if (cache_is_vivt())
110 cpu_clear(cpu, prev->cpu_vm_mask);
1da177e4 111 }
002547b4 112#endif
1da177e4
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113}
114
115#define deactivate_mm(tsk,mm) do { } while (0)
116#define activate_mm(prev,next) switch_mm(prev, next, NULL)
117
118#endif
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