ARM: 7075/1: LPAE: Factor out 2-level page table definitions into separate files
[deliverable/linux.git] / arch / arm / include / asm / pgtable.h
CommitLineData
1da177e4 1/*
4baa9922 2 * arch/arm/include/asm/pgtable.h
1da177e4
LT
3 *
4 * Copyright (C) 1995-2002 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef _ASMARM_PGTABLE_H
11#define _ASMARM_PGTABLE_H
12
f6e3354d 13#include <linux/const.h>
1da177e4 14#include <asm-generic/4level-fixup.h>
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15#include <asm/proc-fns.h>
16
17#ifndef CONFIG_MMU
18
19#include "pgtable-nommu.h"
20
21#else
1da177e4
LT
22
23#include <asm/memory.h>
a09e64fb 24#include <mach/vmalloc.h>
ad1ae2fe 25#include <asm/pgtable-hwdef.h>
1da177e4 26
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27#include <asm/pgtable-2level.h>
28
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29/*
30 * Just any arbitrary offset to the start of the vmalloc VM area: the
31 * current 8MB value just means that there will be a 8MB "hole" after the
32 * physical memory until the kernel virtual memory starts. That means that
33 * any out-of-bounds memory accesses will hopefully be caught.
34 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
35 * area for the same reason. ;)
36 *
37 * Note that platforms may override VMALLOC_START, but they must provide
38 * VMALLOC_END. VMALLOC_END defines the (exclusive) limit of this space,
39 * which may not overlap IO space.
40 */
41#ifndef VMALLOC_START
42#define VMALLOC_OFFSET (8*1024*1024)
43#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
44#endif
45
1da177e4
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46#define LIBRARY_TEXT_START 0x0c000000
47
48#ifndef __ASSEMBLY__
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49extern void __pte_error(const char *file, int line, pte_t);
50extern void __pmd_error(const char *file, int line, pmd_t);
51extern void __pgd_error(const char *file, int line, pgd_t);
1da177e4 52
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53#define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte)
54#define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd)
55#define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd)
1da177e4 56
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57/*
58 * This is the lowest virtual address we can permit any user space
59 * mapping to be mapped at. This is particularly important for
60 * non-high vector CPUs.
61 */
62#define FIRST_USER_ADDRESS PAGE_SIZE
63
1da177e4 64/*
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65 * The pgprot_* and protection_map entries will be fixed up in runtime
66 * to include the cachable and bufferable bits based on memory policy,
67 * as well as any architecture dependent bits like global/ASID and SMP
68 * shared mapping bits.
1da177e4 69 */
bb30f36f 70#define _L_PTE_DEFAULT L_PTE_PRESENT | L_PTE_YOUNG
1da177e4 71
44b18693 72extern pgprot_t pgprot_user;
1da177e4
LT
73extern pgprot_t pgprot_kernel;
74
8ec53663 75#define _MOD_PROT(p, b) __pgprot(pgprot_val(p) | (b))
1da177e4 76
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77#define PAGE_NONE _MOD_PROT(pgprot_user, L_PTE_XN | L_PTE_RDONLY)
78#define PAGE_SHARED _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_XN)
79#define PAGE_SHARED_EXEC _MOD_PROT(pgprot_user, L_PTE_USER)
80#define PAGE_COPY _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
81#define PAGE_COPY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY)
82#define PAGE_READONLY _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
83#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY)
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84#define PAGE_KERNEL _MOD_PROT(pgprot_kernel, L_PTE_XN)
85#define PAGE_KERNEL_EXEC pgprot_kernel
86
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87#define __PAGE_NONE __pgprot(_L_PTE_DEFAULT | L_PTE_RDONLY | L_PTE_XN)
88#define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_XN)
89#define __PAGE_SHARED_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER)
90#define __PAGE_COPY __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
91#define __PAGE_COPY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY)
92#define __PAGE_READONLY __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
93#define __PAGE_READONLY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY)
44b18693 94
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95#define __pgprot_modify(prot,mask,bits) \
96 __pgprot((pgprot_val(prot) & ~(mask)) | (bits))
97
98#define pgprot_noncached(prot) \
99 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED)
100
101#define pgprot_writecombine(prot) \
102 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE)
103
104#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
105#define pgprot_dmacoherent(prot) \
9522d7e4 106 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE | L_PTE_XN)
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107#define __HAVE_PHYS_MEM_ACCESS_PROT
108struct file;
109extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
110 unsigned long size, pgprot_t vma_prot);
111#else
112#define pgprot_dmacoherent(prot) \
9522d7e4 113 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED | L_PTE_XN)
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114#endif
115
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LT
116#endif /* __ASSEMBLY__ */
117
118/*
119 * The table below defines the page protection levels that we insert into our
120 * Linux page table version. These get translated into the best that the
121 * architecture can perform. Note that on most ARM hardware:
122 * 1) We cannot do execute protection
123 * 2) If we could do execute protection, then read is implied
124 * 3) write implies read permissions
125 */
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126#define __P000 __PAGE_NONE
127#define __P001 __PAGE_READONLY
128#define __P010 __PAGE_COPY
129#define __P011 __PAGE_COPY
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130#define __P100 __PAGE_READONLY_EXEC
131#define __P101 __PAGE_READONLY_EXEC
132#define __P110 __PAGE_COPY_EXEC
133#define __P111 __PAGE_COPY_EXEC
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134
135#define __S000 __PAGE_NONE
136#define __S001 __PAGE_READONLY
137#define __S010 __PAGE_SHARED
138#define __S011 __PAGE_SHARED
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139#define __S100 __PAGE_READONLY_EXEC
140#define __S101 __PAGE_READONLY_EXEC
141#define __S110 __PAGE_SHARED_EXEC
142#define __S111 __PAGE_SHARED_EXEC
1da177e4
LT
143
144#ifndef __ASSEMBLY__
145/*
146 * ZERO_PAGE is a global shared page that is always zero: used
147 * for zero-mapped memory areas etc..
148 */
149extern struct page *empty_zero_page;
150#define ZERO_PAGE(vaddr) (empty_zero_page)
151
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152
153extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
154
155/* to find an entry in a page-table-directory */
156#define pgd_index(addr) ((addr) >> PGDIR_SHIFT)
157
158#define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr))
159
160/* to find an entry in a kernel page-table-directory */
161#define pgd_offset_k(addr) pgd_offset(&init_mm, addr)
162
163/*
164 * The "pgd_xxx()" functions here are trivial for a folded two-level
165 * setup: the pgd is never bad, and a pmd always exists (as it's folded
166 * into the pgd entry)
167 */
168#define pgd_none(pgd) (0)
169#define pgd_bad(pgd) (0)
170#define pgd_present(pgd) (1)
171#define pgd_clear(pgdp) do { } while (0)
172#define set_pgd(pgd,pgdp) do { } while (0)
516295e5 173#define set_pud(pud,pudp) do { } while (0)
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174
175
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176/* Find an entry in the second-level page table.. */
177#define pmd_offset(dir, addr) ((pmd_t *)(dir))
1da177e4 178
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179#define pmd_none(pmd) (!pmd_val(pmd))
180#define pmd_present(pmd) (pmd_val(pmd))
181#define pmd_bad(pmd) (pmd_val(pmd) & 2)
182
183#define copy_pmd(pmdpd,pmdps) \
184 do { \
185 pmdpd[0] = pmdps[0]; \
186 pmdpd[1] = pmdps[1]; \
187 flush_pmd_entry(pmdpd); \
188 } while (0)
189
190#define pmd_clear(pmdp) \
191 do { \
192 pmdp[0] = __pmd(0); \
193 pmdp[1] = __pmd(0); \
194 clean_pmd_entry(pmdp); \
195 } while (0)
196
197static inline pte_t *pmd_page_vaddr(pmd_t pmd)
198{
d30e45ee 199 return __va(pmd_val(pmd) & PAGE_MASK);
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200}
201
202#define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd)))
203
204/* we don't need complex calculations here as the pmd is folded into the pgd */
205#define pmd_addr_end(addr,end) (end)
65cec8e3 206
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207
208#ifndef CONFIG_HIGHPTE
b510b049 209#define __pte_map(pmd) pmd_page_vaddr(*(pmd))
ece0e2b6 210#define __pte_unmap(pte) do { } while (0)
65cec8e3 211#else
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212#define __pte_map(pmd) (pte_t *)kmap_atomic(pmd_page(*(pmd)))
213#define __pte_unmap(pte) kunmap_atomic(pte)
65cec8e3 214#endif
1da177e4 215
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216#define pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
217
218#define pte_offset_kernel(pmd,addr) (pmd_page_vaddr(*(pmd)) + pte_index(addr))
219
220#define pte_offset_map(pmd,addr) (__pte_map(pmd) + pte_index(addr))
221#define pte_unmap(pte) __pte_unmap(pte)
222
223#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)
cae6292b 224#define pfn_pte(pfn,prot) __pte(__pfn_to_phys(pfn) | pgprot_val(prot))
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225
226#define pte_page(pte) pfn_to_page(pte_pfn(pte))
227#define mk_pte(page,prot) pfn_pte(page_to_pfn(page), prot)
228
ad1ae2fe 229#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext)
b510b049 230#define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0)
ad1ae2fe 231
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CM
232#if __LINUX_ARM_ARCH__ < 6
233static inline void __sync_icache_dcache(pte_t pteval)
234{
235}
236#else
237extern void __sync_icache_dcache(pte_t pteval);
238#endif
239
240static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
241 pte_t *ptep, pte_t pteval)
242{
243 if (addr >= TASK_SIZE)
244 set_pte_ext(ptep, pteval, 0);
245 else {
246 __sync_icache_dcache(pteval);
247 set_pte_ext(ptep, pteval, PTE_EXT_NG);
248 }
249}
1da177e4 250
b510b049 251#define pte_none(pte) (!pte_val(pte))
1da177e4 252#define pte_present(pte) (pte_val(pte) & L_PTE_PRESENT)
36bb94ba 253#define pte_write(pte) (!(pte_val(pte) & L_PTE_RDONLY))
1da177e4
LT
254#define pte_dirty(pte) (pte_val(pte) & L_PTE_DIRTY)
255#define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG)
9522d7e4 256#define pte_exec(pte) (!(pte_val(pte) & L_PTE_XN))
7e675137 257#define pte_special(pte) (0)
1da177e4 258
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CM
259#define pte_present_user(pte) \
260 ((pte_val(pte) & (L_PTE_PRESENT | L_PTE_USER)) == \
261 (L_PTE_PRESENT | L_PTE_USER))
262
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LT
263#define PTE_BIT_FUNC(fn,op) \
264static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; }
265
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266PTE_BIT_FUNC(wrprotect, |= L_PTE_RDONLY);
267PTE_BIT_FUNC(mkwrite, &= ~L_PTE_RDONLY);
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268PTE_BIT_FUNC(mkclean, &= ~L_PTE_DIRTY);
269PTE_BIT_FUNC(mkdirty, |= L_PTE_DIRTY);
270PTE_BIT_FUNC(mkold, &= ~L_PTE_YOUNG);
271PTE_BIT_FUNC(mkyoung, |= L_PTE_YOUNG);
272
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273static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
274
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LT
275static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
276{
36bb94ba 277 const pteval_t mask = L_PTE_XN | L_PTE_RDONLY | L_PTE_USER;
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LT
278 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
279 return pte;
280}
281
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282/*
283 * Encode and decode a swap entry. Swap entries are stored in the Linux
284 * page tables as follows:
285 *
286 * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
287 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
6a00cded 288 * <--------------- offset --------------------> <- type --> 0 0 0
1da177e4 289 *
6a00cded 290 * This gives us up to 63 swap files and 32GB per swap file. Note that
fb93a1c7 291 * the offset field is always non-zero.
1da177e4 292 */
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293#define __SWP_TYPE_SHIFT 3
294#define __SWP_TYPE_BITS 6
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295#define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1)
296#define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
297
298#define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
299#define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT)
300#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
301
1da177e4
LT
302#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
303#define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
304
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RK
305/*
306 * It is an error for the kernel to have more swap files than we can
307 * encode in the PTEs. This ensures that we know when MAX_SWAPFILES
308 * is increased beyond what we presently support.
309 */
310#define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
311
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312/*
313 * Encode and decode a file entry. File entries are stored in the Linux
314 * page tables as follows:
315 *
316 * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
317 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
6a00cded 318 * <----------------------- offset ------------------------> 1 0 0
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319 */
320#define pte_file(pte) (pte_val(pte) & L_PTE_FILE)
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321#define pte_to_pgoff(x) (pte_val(x) >> 3)
322#define pgoff_to_pte(x) __pte(((x) << 3) | L_PTE_FILE)
65b1bfc1 323
6a00cded 324#define PTE_FILE_MAX_BITS 29
65b1bfc1 325
1da177e4
LT
326/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
327/* FIXME: this is not correct */
328#define kern_addr_valid(addr) (1)
329
330#include <asm-generic/pgtable.h>
331
332/*
333 * We provide our own arch_get_unmapped_area to cope with VIPT caches.
334 */
335#define HAVE_ARCH_UNMAPPED_AREA
336
337/*
33bf5610 338 * remap a physical page `pfn' of size `size' with page protection `prot'
1da177e4
LT
339 * into virtual address `from'
340 */
1da177e4
LT
341#define io_remap_pfn_range(vma,from,pfn,size,prot) \
342 remap_pfn_range(vma, from, pfn, size, prot)
343
1da177e4
LT
344#define pgtable_cache_init() do { } while (0)
345
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346void identity_mapping_add(pgd_t *, unsigned long, unsigned long);
347void identity_mapping_del(pgd_t *, unsigned long, unsigned long);
348
1da177e4
LT
349#endif /* !__ASSEMBLY__ */
350
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351#endif /* CONFIG_MMU */
352
1da177e4 353#endif /* _ASMARM_PGTABLE_H */
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