Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
[deliverable/linux.git] / arch / arm / include / asm / ptrace.h
CommitLineData
1da177e4 1/*
4baa9922 2 * arch/arm/include/asm/ptrace.h
1da177e4
LT
3 *
4 * Copyright (C) 1996-2003 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_ARM_PTRACE_H
11#define __ASM_ARM_PTRACE_H
12
cb8db5d4 13#include <uapi/asm/ptrace.h>
68b7f715 14
1da177e4 15#ifndef __ASSEMBLY__
092a4e95
JI
16struct pt_regs {
17 unsigned long uregs[18];
18};
1da177e4
LT
19
20#define user_mode(regs) \
21 (((regs)->ARM_cpsr & 0xf) == 0)
22
23#ifdef CONFIG_ARM_THUMB
24#define thumb_mode(regs) \
25 (((regs)->ARM_cpsr & PSR_T_BIT))
26#else
27#define thumb_mode(regs) (0)
28#endif
29
3f18b1bf 30#ifndef CONFIG_CPU_V7M
909d6c6c 31#define isa_mode(regs) \
3f18b1bf
UKK
32 ((((regs)->ARM_cpsr & PSR_J_BIT) >> (__ffs(PSR_J_BIT) - 1)) | \
33 (((regs)->ARM_cpsr & PSR_T_BIT) >> (__ffs(PSR_T_BIT))))
34#else
35#define isa_mode(regs) 1 /* Thumb */
36#endif
909d6c6c 37
1da177e4
LT
38#define processor_mode(regs) \
39 ((regs)->ARM_cpsr & MODE_MASK)
40
41#define interrupts_enabled(regs) \
42 (!((regs)->ARM_cpsr & PSR_I_BIT))
43
44#define fast_interrupts_enabled(regs) \
45 (!((regs)->ARM_cpsr & PSR_F_BIT))
46
1da177e4
LT
47/* Are the current registers suitable for user mode?
48 * (used to maintain security in signal handlers)
49 */
50static inline int valid_user_regs(struct pt_regs *regs)
51{
55bdd694 52#ifndef CONFIG_CPU_V7M
41e2e8fd
RK
53 unsigned long mode = regs->ARM_cpsr & MODE_MASK;
54
55 /*
56 * Always clear the F (FIQ) and A (delayed abort) bits
57 */
58 regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT);
59
60 if ((regs->ARM_cpsr & PSR_I_BIT) == 0) {
61 if (mode == USR_MODE)
62 return 1;
63 if (elf_hwcap & HWCAP_26BIT && mode == USR26_MODE)
64 return 1;
d1cbbd6b 65 }
1da177e4
LT
66
67 /*
68 * Force CPSR to something logical...
69 */
41e2e8fd 70 regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT;
d1cbbd6b
CM
71 if (!(elf_hwcap & HWCAP_26BIT))
72 regs->ARM_cpsr |= USR_MODE;
1da177e4
LT
73
74 return 0;
55bdd694
CM
75#else /* ifndef CONFIG_CPU_V7M */
76 return 1;
77#endif
1da177e4
LT
78}
79
29ef73b7
NH
80static inline long regs_return_value(struct pt_regs *regs)
81{
82 return regs->ARM_r0;
83}
84
1de765c1 85#define instruction_pointer(regs) (regs)->ARM_pc
1da177e4 86
9865f1d4
NB
87#ifdef CONFIG_THUMB2_KERNEL
88#define frame_pointer(regs) (regs)->ARM_r7
89#else
90#define frame_pointer(regs) (regs)->ARM_fp
91#endif
92
c7edc9e3
DL
93static inline void instruction_pointer_set(struct pt_regs *regs,
94 unsigned long val)
95{
96 instruction_pointer(regs) = val;
97}
98
1da177e4
LT
99#ifdef CONFIG_SMP
100extern unsigned long profile_pc(struct pt_regs *regs);
101#else
102#define profile_pc(regs) instruction_pointer(regs)
103#endif
104
652a12ef 105#define predicate(x) ((x) & 0xf0000000)
1da177e4 106#define PREDICATE_ALWAYS 0xe0000000
f22ab814 107
592201a9
JM
108/*
109 * True if instr is a 32-bit thumb instruction. This works if instr
110 * is the first or only half-word of a thumb instruction. It also works
111 * when instr holds all 32-bits of a wide thumb instruction if stored
112 * in the form (first_half<<16)|(second_half)
113 */
114#define is_wide_instruction(instr) ((unsigned)(instr) >= 0xe800)
115
e513f8bf
WD
116/*
117 * kprobe-based event tracer support
118 */
119#include <linux/stddef.h>
120#include <linux/types.h>
121#define MAX_REG_OFFSET (offsetof(struct pt_regs, ARM_ORIG_r0))
122
123extern int regs_query_register_offset(const char *name);
124extern const char *regs_query_register_name(unsigned int offset);
125extern bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr);
126extern unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
127 unsigned int n);
128
129/**
130 * regs_get_register() - get register value from its offset
131 * @regs: pt_regs from which register value is gotten
132 * @offset: offset number of the register.
133 *
134 * regs_get_register returns the value of a register whose offset from @regs.
135 * The @offset is the offset of the register in struct pt_regs.
136 * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
137 */
138static inline unsigned long regs_get_register(struct pt_regs *regs,
139 unsigned int offset)
140{
141 if (unlikely(offset > MAX_REG_OFFSET))
142 return 0;
143 return *(unsigned long *)((unsigned long)regs + offset);
144}
145
146/* Valid only for Kernel mode traps. */
147static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
148{
149 return regs->ARM_sp;
150}
151
0693bf68
WF
152static inline unsigned long user_stack_pointer(struct pt_regs *regs)
153{
154 return regs->ARM_sp;
155}
156
0ebc1f56
BW
157#define current_pt_regs(void) ({ (struct pt_regs *) \
158 ((current_stack_pointer | (THREAD_SIZE - 1)) - 7) - 1; \
bfd170d5
AV
159})
160
1da177e4 161#endif /* __ASSEMBLY__ */
1da177e4 162#endif
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