[deliverable/linux.git] / arch / arm / include / asm / smp_twd.h

#ifndef __ASMARM_SMP_TWD_H
#define __ASMARM_SMP_TWD_H

#define TWD_TIMER_LOAD			0x00
#define TWD_TIMER_COUNTER		0x04
#define TWD_TIMER_CONTROL		0x08
#define TWD_TIMER_INTSTAT		0x0C

#define TWD_WDOG_LOAD			0x20
#define TWD_WDOG_COUNTER		0x24
#define TWD_WDOG_CONTROL		0x28
#define TWD_WDOG_INTSTAT		0x2C
#define TWD_WDOG_RESETSTAT		0x30
#define TWD_WDOG_DISABLE		0x34

#define TWD_TIMER_CONTROL_ENABLE	(1 << 0)
#define TWD_TIMER_CONTROL_ONESHOT	(0 << 1)
#define TWD_TIMER_CONTROL_PERIODIC	(1 << 1)
#define TWD_TIMER_CONTROL_IT_ENABLE	(1 << 2)

struct clock_event_device;

extern void __iomem *twd_base;

int twd_timer_ack(void);
void twd_timer_setup(struct clock_event_device *);

#endif
Commit	Line	Data
f32f4ce2 RK	1	#ifndef __ASMARM_SMP_TWD_H
	2	#define __ASMARM_SMP_TWD_H
	3
f4a27aed SK	4	#define TWD_TIMER_LOAD 0x00
	5	#define TWD_TIMER_COUNTER 0x04
	6	#define TWD_TIMER_CONTROL 0x08
	7	#define TWD_TIMER_INTSTAT 0x0C
	8
	9	#define TWD_WDOG_LOAD 0x20
	10	#define TWD_WDOG_COUNTER 0x24
	11	#define TWD_WDOG_CONTROL 0x28
	12	#define TWD_WDOG_INTSTAT 0x2C
	13	#define TWD_WDOG_RESETSTAT 0x30
	14	#define TWD_WDOG_DISABLE 0x34
	15
	16	#define TWD_TIMER_CONTROL_ENABLE (1 << 0)
	17	#define TWD_TIMER_CONTROL_ONESHOT (0 << 1)
	18	#define TWD_TIMER_CONTROL_PERIODIC (1 << 1)
	19	#define TWD_TIMER_CONTROL_IT_ENABLE (1 << 2)
	20
f32f4ce2 RK	21	struct clock_event_device;
	22
	23	extern void __iomem *twd_base;
	24
f32f4ce2 RK	25	int twd_timer_ack(void);
	26	void twd_timer_setup(struct clock_event_device *);
	27
	28	#endif