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9f97da78 DH |
1 | #ifndef __ASM_ARM_SWITCH_TO_H |
2 | #define __ASM_ARM_SWITCH_TO_H | |
3 | ||
4 | #include <linux/thread_info.h> | |
5 | ||
73a6fdc4 WD |
6 | /* |
7 | * For v7 SMP cores running a preemptible kernel we may be pre-empted | |
8 | * during a TLB maintenance operation, so execute an inner-shareable dsb | |
9 | * to ensure that the maintenance completes in case we migrate to another | |
10 | * CPU. | |
11 | */ | |
12 | #if defined(CONFIG_PREEMPT) && defined(CONFIG_SMP) && defined(CONFIG_CPU_V7) | |
13 | #define finish_arch_switch(prev) dsb(ish) | |
14 | #endif | |
15 | ||
9f97da78 DH |
16 | /* |
17 | * switch_to(prev, next) should switch from task `prev' to `next' | |
18 | * `prev' will never be the same as `next'. schedule() itself | |
19 | * contains the memory barrier to tell GCC not to cache `current'. | |
20 | */ | |
21 | extern struct task_struct *__switch_to(struct task_struct *, struct thread_info *, struct thread_info *); | |
22 | ||
23 | #define switch_to(prev,next,last) \ | |
24 | do { \ | |
25 | last = __switch_to(prev,task_thread_info(prev), task_thread_info(next)); \ | |
26 | } while (0) | |
27 | ||
28 | #endif /* __ASM_ARM_SWITCH_TO_H */ |