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80c59daf DM |
1 | /* |
2 | * Copyright (c) 2012 Linaro Limited. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along | |
15 | * with this program; if not, write to the Free Software Foundation, Inc., | |
16 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | |
17 | */ | |
18 | ||
19 | #ifndef VIRT_H | |
20 | #define VIRT_H | |
21 | ||
22 | #include <asm/ptrace.h> | |
23 | ||
24 | /* | |
25 | * Flag indicating that the kernel was not entered in the same mode on every | |
26 | * CPU. The zImage loader stashes this value in an SPSR, so we need an | |
4e3c1944 | 27 | * architecturally defined flag bit here. |
80c59daf | 28 | */ |
4e3c1944 | 29 | #define BOOT_CPU_MODE_MISMATCH PSR_N_BIT |
80c59daf DM |
30 | |
31 | #ifndef __ASSEMBLY__ | |
8fbac214 | 32 | #include <asm/cacheflush.h> |
80c59daf DM |
33 | |
34 | #ifdef CONFIG_ARM_VIRT_EXT | |
35 | /* | |
36 | * __boot_cpu_mode records what mode the primary CPU was booted in. | |
37 | * A correctly-implemented bootloader must start all CPUs in the same mode: | |
38 | * if it fails to do this, the flag BOOT_CPU_MODE_MISMATCH is set to indicate | |
39 | * that some CPU(s) were booted in a different mode. | |
40 | * | |
41 | * This allows the kernel to flag an error when the secondaries have come up. | |
42 | */ | |
43 | extern int __boot_cpu_mode; | |
44 | ||
8fbac214 MR |
45 | static inline void sync_boot_mode(void) |
46 | { | |
47 | /* | |
48 | * As secondaries write to __boot_cpu_mode with caches disabled, we | |
49 | * must flush the corresponding cache entries to ensure the visibility | |
50 | * of their writes. | |
51 | */ | |
52 | sync_cache_r(&__boot_cpu_mode); | |
53 | } | |
54 | ||
80c59daf DM |
55 | void __hyp_set_vectors(unsigned long phys_vector_base); |
56 | unsigned long __hyp_get_vectors(void); | |
57 | #else | |
58 | #define __boot_cpu_mode (SVC_MODE) | |
8fbac214 | 59 | #define sync_boot_mode() |
80c59daf DM |
60 | #endif |
61 | ||
4588c34d DM |
62 | #ifndef ZIMAGE |
63 | void hyp_mode_check(void); | |
64 | ||
65 | /* Reports the availability of HYP mode */ | |
66 | static inline bool is_hyp_mode_available(void) | |
67 | { | |
68 | return ((__boot_cpu_mode & MODE_MASK) == HYP_MODE && | |
69 | !(__boot_cpu_mode & BOOT_CPU_MODE_MISMATCH)); | |
70 | } | |
71 | ||
72 | /* Check if the bootloader has booted CPUs in different modes */ | |
73 | static inline bool is_hyp_mode_mismatched(void) | |
74 | { | |
75 | return !!(__boot_cpu_mode & BOOT_CPU_MODE_MISMATCH); | |
76 | } | |
77 | #endif | |
78 | ||
80c59daf DM |
79 | #endif /* __ASSEMBLY__ */ |
80 | ||
81 | #endif /* ! VIRT_H */ |