projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 73a59c1c | 1 | /* |
| 73a59c1c SP |
2 | * Copyright (C) 2003-2005 SAN People |
| 3 | * | |
| 4 | * Debugging macro include header | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify | |
| 7 | * it under the terms of the GNU General Public License version 2 as | |
| 8 | * published by the Free Software Foundation. | |
| 9 | * | |
| 10 | */ | |
| 11 | ||
| 13079a73 | 12 | #if defined(CONFIG_AT91_DEBUG_LL_DBGU0) |
| 5f58c970 | 13 | #define AT91_DBGU 0xfffff200 /* AT91_BASE_DBGU0 */ |
| 726d32bf | 14 | #elif defined(CONFIG_AT91_DEBUG_LL_DBGU1) |
| 5f58c970 | 15 | #define AT91_DBGU 0xffffee00 /* AT91_BASE_DBGU1 */ |
| c268a743 | 16 | #elif defined(CONFIG_AT91_DEBUG_LL_DBGU2) |
| 726d32bf | 17 | /* On sama5d4, use USART3 as low level serial console */ |
| 5f58c970 | 18 | #define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */ |
| c268a743 NF |
19 | #else |
| 20 | /* On sama5d2, use UART1 as low level serial console */ | |
| 21 | #define AT91_DBGU 0xf8020000 | |
| 13079a73 JCPV |
22 | #endif |
| 23 | ||
| 5a5a6451 | 24 | #ifdef CONFIG_MMU |
| 5f58c970 | 25 | #define AT91_IO_P2V(x) ((x) - 0x01000000) |
| 5a5a6451 AB |
26 | #else |
| 27 | #define AT91_IO_P2V(x) (x) | |
| 28 | #endif | |
| 5f58c970 AB |
29 | |
| 30 | #define AT91_DBGU_SR (0x14) /* Status Register */ | |
| 31 | #define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */ | |
| 32 | #define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */ | |
| 33 | #define AT91_DBGU_TXEMPTY (1 << 9) /* Transmitter Empty */ | |
| 34 | ||
| 639da5ee | 35 | .macro addruart, rp, rv, tmp |
| 13079a73 JCPV |
36 | ldr \rp, =AT91_DBGU @ System peripherals (phys address) |
| 37 | ldr \rv, =AT91_IO_P2V(AT91_DBGU) @ System peripherals (virt address) | |
| 73a59c1c SP |
38 | .endm |
| 39 | ||
| 40 | .macro senduart,rd,rx | |
| 1ff5b1b4 | 41 | strb \rd, [\rx, #(AT91_DBGU_THR)] @ Write to Transmitter Holding Register |
| 73a59c1c SP |
42 | .endm |
| 43 | ||
| 44 | .macro waituart,rd,rx | |
| 1ff5b1b4 JCPV |
45 | 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register |
| 46 | tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit | |
| 73a59c1c SP |
47 | beq 1001b |
| 48 | .endm | |
| 49 | ||
| 50 | .macro busyuart,rd,rx | |
| 1ff5b1b4 JCPV |
51 | 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register |
| 52 | tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete | |
| 73a59c1c SP |
53 | beq 1001b |
| 54 | .endm | |
| 55 |