[deliverable/linux.git] / arch / arm / kernel / head-common.S

/*
 *  linux/arch/arm/kernel/head-common.S
 *
 *  Copyright (C) 1994-2002 Russell King
 *  Copyright (c) 2003 ARM Limited
 *  All Rights Reserved
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */

#define ATAG_CORE 0x54410001
#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)

	.align	2
	.type	__switch_data, %object
__switch_data:
	.long	__mmap_switched
	.long	__data_loc			@ r4
	.long	_data				@ r5
	.long	__bss_start			@ r6
	.long	_end				@ r7
	.long	processor_id			@ r4
	.long	__machine_arch_type		@ r5
	.long	__atags_pointer			@ r6
	.long	cr_alignment			@ r7
	.long	init_thread_union + THREAD_START_SP @ sp

/*
 * The following fragment of code is executed with the MMU on in MMU mode,
 * and uses absolute addresses; this is not position independent.
 *
 *  r0  = cp#15 control register
 *  r1  = machine ID
 *  r2  = atags pointer
 *  r9  = processor ID
 */
__mmap_switched:
	adr	r3, __switch_data + 4

	ldmia	r3!, {r4, r5, r6, r7}
	cmp	r4, r5				@ Copy data segment if needed
1:	cmpne	r5, r6
	ldrne	fp, [r4], #4
	strne	fp, [r5], #4
	bne	1b

	mov	fp, #0				@ Clear BSS (and zero fp)
1:	cmp	r6, r7
	strcc	fp, [r6],#4
	bcc	1b

 ARM(	ldmia	r3, {r4, r5, r6, r7, sp})
 THUMB(	ldmia	r3, {r4, r5, r6, r7}	)
 THUMB(	ldr	sp, [r3, #16]		)
	str	r9, [r4]			@ Save processor ID
	str	r1, [r5]			@ Save machine type
	str	r2, [r6]			@ Save atags pointer
	bic	r4, r0, #CR_A			@ Clear 'A' bit
	stmia	r7, {r0, r4}			@ Save control register values
	b	start_kernel
ENDPROC(__mmap_switched)

/*
 * Exception handling.  Something went wrong and we can't proceed.  We
 * ought to tell the user, but since we don't have any guarantee that
 * we're even running on the right architecture, we do virtually nothing.
 *
 * If CONFIG_DEBUG_LL is set we try to print out something about the error
 * and hope for the best (useful if bootloader fails to pass a proper
 * machine ID for example).
 */
__error_p:
#ifdef CONFIG_DEBUG_LL
	adr	r0, str_p1
	bl	printascii
	mov	r0, r9
	bl	printhex8
	adr	r0, str_p2
	bl	printascii
	b	__error
str_p1:	.asciz	"\nError: unrecognized/unsupported processor variant (0x"
str_p2:	.asciz	").\n"
	.align
#endif
ENDPROC(__error_p)

__error_a:
#ifdef CONFIG_DEBUG_LL
	mov	r4, r1				@ preserve machine ID
	adr	r0, str_a1
	bl	printascii
	mov	r0, r4
	bl	printhex8
	adr	r0, str_a2
	bl	printascii
	adr	r3, 3f
	ldmia	r3, {r4, r5, r6}		@ get machine desc list
	sub	r4, r3, r4			@ get offset between virt&phys
	add	r5, r5, r4			@ convert virt addresses to
	add	r6, r6, r4			@ physical address space
1:	ldr	r0, [r5, #MACHINFO_TYPE]	@ get machine type
	bl	printhex8
	mov	r0, #'\t'
	bl	printch
	ldr     r0, [r5, #MACHINFO_NAME]	@ get machine name
	add	r0, r0, r4
	bl	printascii
	mov	r0, #'\n'
	bl	printch
	add	r5, r5, #SIZEOF_MACHINE_DESC	@ next machine_desc
	cmp	r5, r6
	blo	1b
	adr	r0, str_a3
	bl	printascii
	b	__error
ENDPROC(__error_a)

str_a1:	.asciz	"\nError: unrecognized/unsupported machine ID (r1 = 0x"
str_a2:	.asciz	").\n\nAvailable machine support:\n\nID (hex)\tNAME\n"
str_a3:	.asciz	"\nPlease check your kernel config and/or bootloader.\n"
	.align
#endif

__error:
#ifdef CONFIG_ARCH_RPC
/*
 * Turn the screen red on a error - RiscPC only.
 */
	mov	r0, #0x02000000
	mov	r3, #0x11
	orr	r3, r3, r3, lsl #8
	orr	r3, r3, r3, lsl #16
	str	r3, [r0], #4
	str	r3, [r0], #4
	str	r3, [r0], #4
	str	r3, [r0], #4
#endif
1:	mov	r0, r0
	b	1b
ENDPROC(__error)


/*
 * Read processor ID register (CP#15, CR0), and look up in the linker-built
 * supported processor list.  Note that we can't use the absolute addresses
 * for the __proc_info lists since we aren't running with the MMU on
 * (and therefore, we are not in the correct address space).  We have to
 * calculate the offset.
 *
 *	r9 = cpuid
 * Returns:
 *	r3, r4, r6 corrupted
 *	r5 = proc_info pointer in physical address space
 *	r9 = cpuid (preserved)
 */
__lookup_processor_type:
	adr	r3, 3f
	ldmia	r3, {r5 - r7}
	add	r3, r3, #8
	sub	r3, r3, r7			@ get offset between virt&phys
	add	r5, r5, r3			@ convert virt addresses to
	add	r6, r6, r3			@ physical address space
1:	ldmia	r5, {r3, r4}			@ value, mask
	and	r4, r4, r9			@ mask wanted bits
	teq	r3, r4
	beq	2f
	add	r5, r5, #PROC_INFO_SZ		@ sizeof(proc_info_list)
	cmp	r5, r6
	blo	1b
	mov	r5, #0				@ unknown processor
2:	mov	pc, lr
ENDPROC(__lookup_processor_type)

/*
 * This provides a C-API version of the above function.
 */
ENTRY(lookup_processor_type)
	stmfd	sp!, {r4 - r7, r9, lr}
	mov	r9, r0
	bl	__lookup_processor_type
	mov	r0, r5
	ldmfd	sp!, {r4 - r7, r9, pc}
ENDPROC(lookup_processor_type)

/*
 * Look in <asm/procinfo.h> and arch/arm/kernel/arch.[ch] for
 * more information about the __proc_info and __arch_info structures.
 */
	.align	2
3:	.long	__proc_info_begin
	.long	__proc_info_end
4:	.long	.
	.long	__arch_info_begin
	.long	__arch_info_end

/*
 * Lookup machine architecture in the linker-build list of architectures.
 * Note that we can't use the absolute addresses for the __arch_info
 * lists since we aren't running with the MMU on (and therefore, we are
 * not in the correct address space).  We have to calculate the offset.
 *
 *  r1 = machine architecture number
 * Returns:
 *  r3, r4, r6 corrupted
 *  r5 = mach_info pointer in physical address space
 */
__lookup_machine_type:
	adr	r3, 4b
	ldmia	r3, {r4, r5, r6}
	sub	r3, r3, r4			@ get offset between virt&phys
	add	r5, r5, r3			@ convert virt addresses to
	add	r6, r6, r3			@ physical address space
1:	ldr	r3, [r5, #MACHINFO_TYPE]	@ get machine type
	teq	r3, r1				@ matches loader number?
	beq	2f				@ found
	add	r5, r5, #SIZEOF_MACHINE_DESC	@ next machine_desc
	cmp	r5, r6
	blo	1b
	mov	r5, #0				@ unknown machine
2:	mov	pc, lr
ENDPROC(__lookup_machine_type)

/*
 * This provides a C-API version of the above function.
 */
ENTRY(lookup_machine_type)
	stmfd	sp!, {r4 - r6, lr}
	mov	r1, r0
	bl	__lookup_machine_type
	mov	r0, r5
	ldmfd	sp!, {r4 - r6, pc}
ENDPROC(lookup_machine_type)

/* Determine validity of the r2 atags pointer.  The heuristic requires
 * that the pointer be aligned, in the first 16k of physical RAM and
 * that the ATAG_CORE marker is first and present.  Future revisions
 * of this function may be more lenient with the physical address and
 * may also be able to move the ATAGS block if necessary.
 *
 * r8  = machinfo
 *
 * Returns:
 *  r2 either valid atags pointer, or zero
 *  r5, r6 corrupted
 */
__vet_atags:
	tst	r2, #0x3			@ aligned?
	bne	1f

	ldr	r5, [r2, #0]			@ is first tag ATAG_CORE?
	subs	r5, r5, #ATAG_CORE_SIZE
	bne	1f
	ldr	r5, [r2, #4]
	ldr	r6, =ATAG_CORE
	cmp	r5, r6
	bne	1f

	mov	pc, lr				@ atag pointer is ok

1:	mov	r2, #0
	mov	pc, lr
ENDPROC(__vet_atags)
Commit	Line	Data
75d90832 HC	1	/*
	2	* linux/arch/arm/kernel/head-common.S
	3	*
	4	* Copyright (C) 1994-2002 Russell King
	5	* Copyright (c) 2003 ARM Limited
	6	* All Rights Reserved
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*
	12	*/
	13
9c4c9f38 GU	14	#define ATAG_CORE 0x54410001
	15	#define ATAG_CORE_SIZE ((24 + 34) >> 2)
	16
88987ef9	17	.align 2
75d90832 HC	18	.type __switch_data, %object
	19	__switch_data:
	20	.long __mmap_switched
	21	.long __data_loc @ r4
37efe642	22	.long _data @ r5
75d90832 HC	23	.long __bss_start @ r6
	24	.long _end @ r7
	25	.long processor_id @ r4
	26	.long __machine_arch_type @ r5
9d20fdd5 BG	27	.long __atags_pointer @ r6
9d20fdd5 BG	28	.long cr_alignment @ r7
75d90832 HC	29	.long init_thread_union + THREAD_START_SP @ sp
	30
	31	/*
	32	* The following fragment of code is executed with the MMU on in MMU mode,
	33	* and uses absolute addresses; this is not position independent.
	34	*
	35	* r0 = cp#15 control register
	36	* r1 = machine ID
9d20fdd5	37	* r2 = atags pointer
75d90832 HC	38	* r9 = processor ID
75d90832 HC	39	*/
75d90832 HC	40	__mmap_switched:
	41	adr r3, __switch_data + 4
	42
	43	ldmia r3!, {r4, r5, r6, r7}
	44	cmp r4, r5 @ Copy data segment if needed
	45	1: cmpne r5, r6
	46	ldrne fp, [r4], #4
	47	strne fp, [r5], #4
	48	bne 1b
	49
	50	mov fp, #0 @ Clear BSS (and zero fp)
	51	1: cmp r6, r7
	52	strcc fp, [r6],#4
	53	bcc 1b
	54
b86040a5 CM	55	ARM( ldmia r3, {r4, r5, r6, r7, sp})
	56	THUMB( ldmia r3, {r4, r5, r6, r7} )
	57	THUMB( ldr sp, [r3, #16] )
75d90832 HC	58	str r9, [r4] @ Save processor ID
75d90832 HC	59	str r1, [r5] @ Save machine type
9d20fdd5	60	str r2, [r6] @ Save atags pointer
75d90832	61	bic r4, r0, #CR_A @ Clear 'A' bit
9d20fdd5	62	stmia r7, {r0, r4} @ Save control register values
75d90832	63	b start_kernel
93ed3970	64	ENDPROC(__mmap_switched)
75d90832 HC	65
	66	/*
	67	* Exception handling. Something went wrong and we can't proceed. We
	68	* ought to tell the user, but since we don't have any guarantee that
	69	* we're even running on the right architecture, we do virtually nothing.
	70	*
	71	* If CONFIG_DEBUG_LL is set we try to print out something about the error
	72	* and hope for the best (useful if bootloader fails to pass a proper
	73	* machine ID for example).
	74	*/
75d90832 HC	75	__error_p:
	76	#ifdef CONFIG_DEBUG_LL
	77	adr r0, str_p1
	78	bl printascii
84081bd2 LB	79	mov r0, r9
	80	bl printhex8
	81	adr r0, str_p2
	82	bl printascii
75d90832	83	b __error
84081bd2 LB	84	str_p1: .asciz "\nError: unrecognized/unsupported processor variant (0x"
84081bd2 LB	85	str_p2: .asciz ").\n"
75d90832 HC	86	.align
75d90832 HC	87	#endif
93ed3970	88	ENDPROC(__error_p)
75d90832	89
75d90832 HC	90	__error_a:
	91	#ifdef CONFIG_DEBUG_LL
	92	mov r4, r1 @ preserve machine ID
	93	adr r0, str_a1
	94	bl printascii
	95	mov r0, r4
	96	bl printhex8
	97	adr r0, str_a2
	98	bl printascii
	99	adr r3, 3f
	100	ldmia r3, {r4, r5, r6} @ get machine desc list
	101	sub r4, r3, r4 @ get offset between virt&phys
	102	add r5, r5, r4 @ convert virt addresses to
	103	add r6, r6, r4 @ physical address space
	104	1: ldr r0, [r5, #MACHINFO_TYPE] @ get machine type
	105	bl printhex8
	106	mov r0, #'\t'
	107	bl printch
	108	ldr r0, [r5, #MACHINFO_NAME] @ get machine name
	109	add r0, r0, r4
	110	bl printascii
	111	mov r0, #'\n'
	112	bl printch
	113	add r5, r5, #SIZEOF_MACHINE_DESC @ next machine_desc
	114	cmp r5, r6
	115	blo 1b
	116	adr r0, str_a3
	117	bl printascii
	118	b __error
93ed3970 CM	119	ENDPROC(__error_a)
93ed3970 CM	120
75d90832 HC	121	str_a1: .asciz "\nError: unrecognized/unsupported machine ID (r1 = 0x"
	122	str_a2: .asciz ").\n\nAvailable machine support:\n\nID (hex)\tNAME\n"
	123	str_a3: .asciz "\nPlease check your kernel config and/or bootloader.\n"
	124	.align
	125	#endif
	126
75d90832 HC	127	__error:
	128	#ifdef CONFIG_ARCH_RPC
	129	/*
	130	* Turn the screen red on a error - RiscPC only.
	131	*/
	132	mov r0, #0x02000000
	133	mov r3, #0x11
	134	orr r3, r3, r3, lsl #8
	135	orr r3, r3, r3, lsl #16
	136	str r3, [r0], #4
	137	str r3, [r0], #4
	138	str r3, [r0], #4
	139	str r3, [r0], #4
	140	#endif
	141	1: mov r0, r0
	142	b 1b
93ed3970	143	ENDPROC(__error)
75d90832 HC	144
	145
	146	/*
	147	* Read processor ID register (CP#15, CR0), and look up in the linker-built
	148	* supported processor list. Note that we can't use the absolute addresses
	149	* for the __proc_info lists since we aren't running with the MMU on
	150	* (and therefore, we are not in the correct address space). We have to
	151	* calculate the offset.
	152	*
	153	* r9 = cpuid
	154	* Returns:
	155	* r3, r4, r6 corrupted
	156	* r5 = proc_info pointer in physical address space
	157	* r9 = cpuid (preserved)
	158	*/
75d90832 HC	159	__lookup_processor_type:
75d90832 HC	160	adr r3, 3f
b86040a5 CM	161	ldmia r3, {r5 - r7}
b86040a5 CM	162	add r3, r3, #8
75d90832 HC	163	sub r3, r3, r7 @ get offset between virt&phys
	164	add r5, r5, r3 @ convert virt addresses to
	165	add r6, r6, r3 @ physical address space
	166	1: ldmia r5, {r3, r4} @ value, mask
	167	and r4, r4, r9 @ mask wanted bits
	168	teq r3, r4
	169	beq 2f
	170	add r5, r5, #PROC_INFO_SZ @ sizeof(proc_info_list)
	171	cmp r5, r6
	172	blo 1b
	173	mov r5, #0 @ unknown processor
	174	2: mov pc, lr
93ed3970	175	ENDPROC(__lookup_processor_type)
75d90832 HC	176
	177	/*
	178	* This provides a C-API version of the above function.
	179	*/
	180	ENTRY(lookup_processor_type)
	181	stmfd sp!, {r4 - r7, r9, lr}
	182	mov r9, r0
	183	bl __lookup_processor_type
	184	mov r0, r5
	185	ldmfd sp!, {r4 - r7, r9, pc}
93ed3970	186	ENDPROC(lookup_processor_type)
75d90832 HC	187
75d90832 HC	188	/*
4baa9922	189	* Look in <asm/procinfo.h> and arch/arm/kernel/arch.[ch] for
75d90832 HC	190	* more information about the __proc_info and __arch_info structures.
75d90832 HC	191	*/
88987ef9	192	.align 2
b86040a5	193	3: .long __proc_info_begin
75d90832	194	.long __proc_info_end
b86040a5	195	4: .long .
75d90832 HC	196	.long __arch_info_begin
	197	.long __arch_info_end
	198
	199	/*
	200	* Lookup machine architecture in the linker-build list of architectures.
	201	* Note that we can't use the absolute addresses for the __arch_info
	202	* lists since we aren't running with the MMU on (and therefore, we are
	203	* not in the correct address space). We have to calculate the offset.
	204	*
	205	* r1 = machine architecture number
	206	* Returns:
	207	* r3, r4, r6 corrupted
	208	* r5 = mach_info pointer in physical address space
	209	*/
75d90832	210	__lookup_machine_type:
b86040a5	211	adr r3, 4b
75d90832 HC	212	ldmia r3, {r4, r5, r6}
	213	sub r3, r3, r4 @ get offset between virt&phys
	214	add r5, r5, r3 @ convert virt addresses to
	215	add r6, r6, r3 @ physical address space
	216	1: ldr r3, [r5, #MACHINFO_TYPE] @ get machine type
	217	teq r3, r1 @ matches loader number?
	218	beq 2f @ found
	219	add r5, r5, #SIZEOF_MACHINE_DESC @ next machine_desc
	220	cmp r5, r6
	221	blo 1b
	222	mov r5, #0 @ unknown machine
	223	2: mov pc, lr
93ed3970	224	ENDPROC(__lookup_machine_type)
75d90832 HC	225
	226	/*
	227	* This provides a C-API version of the above function.
	228	*/
	229	ENTRY(lookup_machine_type)
	230	stmfd sp!, {r4 - r6, lr}
	231	mov r1, r0
	232	bl __lookup_machine_type
	233	mov r0, r5
	234	ldmfd sp!, {r4 - r6, pc}
93ed3970	235	ENDPROC(lookup_machine_type)
9d20fdd5 BG	236
	237	/* Determine validity of the r2 atags pointer. The heuristic requires
	238	* that the pointer be aligned, in the first 16k of physical RAM and
	239	* that the ATAG_CORE marker is first and present. Future revisions
	240	* of this function may be more lenient with the physical address and
	241	* may also be able to move the ATAGS block if necessary.
	242	*
	243	* r8 = machinfo
	244	*
	245	* Returns:
	246	* r2 either valid atags pointer, or zero
	247	* r5, r6 corrupted
	248	*/
9d20fdd5 BG	249	__vet_atags:
	250	tst r2, #0x3 @ aligned?
	251	bne 1f
	252
	253	ldr r5, [r2, #0] @ is first tag ATAG_CORE?
	254	subs r5, r5, #ATAG_CORE_SIZE
	255	bne 1f
	256	ldr r5, [r2, #4]
	257	ldr r6, =ATAG_CORE
	258	cmp r5, r6
	259	bne 1f
	260
	261	mov pc, lr @ atag pointer is ok
	262
	263	1: mov r2, #0
	264	mov pc, lr
93ed3970	265	ENDPROC(__vet_atags)