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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/kernel/irq.c | |
3 | * | |
4 | * Copyright (C) 1992 Linus Torvalds | |
5 | * Modifications for ARM processor Copyright (C) 1995-2000 Russell King. | |
6 | * | |
8749af68 RK |
7 | * Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation. |
8 | * Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and | |
9 | * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>. | |
10 | * | |
1da177e4 LT |
11 | * This program is free software; you can redistribute it and/or modify |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | * | |
15 | * This file contains the code used by various IRQ handling routines: | |
16 | * asking for different IRQ's should be done through these routines | |
17 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
18 | * shouldn't result in any weird surprises, and installing new handlers | |
19 | * should be easier. | |
20 | * | |
21 | * IRQ's are in fact implemented a bit like signal handlers for the kernel. | |
22 | * Naturally it's not a 1:1 relation, but there are similarities. | |
23 | */ | |
1da177e4 LT |
24 | #include <linux/kernel_stat.h> |
25 | #include <linux/module.h> | |
26 | #include <linux/signal.h> | |
27 | #include <linux/ioport.h> | |
28 | #include <linux/interrupt.h> | |
4a2581a0 | 29 | #include <linux/irq.h> |
1da177e4 LT |
30 | #include <linux/random.h> |
31 | #include <linux/smp.h> | |
32 | #include <linux/init.h> | |
33 | #include <linux/seq_file.h> | |
34 | #include <linux/errno.h> | |
35 | #include <linux/list.h> | |
36 | #include <linux/kallsyms.h> | |
37 | #include <linux/proc_fs.h> | |
38 | ||
5a567d78 | 39 | #include <asm/exception.h> |
1da177e4 | 40 | #include <asm/system.h> |
8ff1443c | 41 | #include <asm/mach/arch.h> |
897d8527 | 42 | #include <asm/mach/irq.h> |
8749af68 | 43 | #include <asm/mach/time.h> |
1da177e4 | 44 | |
1da177e4 LT |
45 | /* |
46 | * No architecture-specific irq_finish function defined in arm/arch/irqs.h. | |
47 | */ | |
48 | #ifndef irq_finish | |
49 | #define irq_finish(irq) do { } while (0) | |
50 | #endif | |
51 | ||
4a2581a0 | 52 | unsigned long irq_err_count; |
1da177e4 | 53 | |
25a5662a | 54 | int arch_show_interrupts(struct seq_file *p, int prec) |
1da177e4 | 55 | { |
baa28e35 | 56 | #ifdef CONFIG_FIQ |
25a5662a | 57 | show_fiq_list(p, prec); |
1da177e4 LT |
58 | #endif |
59 | #ifdef CONFIG_SMP | |
25a5662a | 60 | show_ipi_list(p, prec); |
1da177e4 | 61 | #endif |
25a5662a | 62 | seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count); |
1da177e4 LT |
63 | return 0; |
64 | } | |
65 | ||
1da177e4 | 66 | /* |
a4841e39 RKAL |
67 | * handle_IRQ handles all hardware IRQ's. Decoded IRQs should |
68 | * not come via this function. Instead, they should provide their | |
69 | * own 'handler'. Used by platform code implementing C-based 1st | |
70 | * level decoding. | |
1da177e4 | 71 | */ |
a4841e39 | 72 | void handle_IRQ(unsigned int irq, struct pt_regs *regs) |
1da177e4 | 73 | { |
e6300155 | 74 | struct pt_regs *old_regs = set_irq_regs(regs); |
d8aa0251 DB |
75 | |
76 | irq_enter(); | |
1da177e4 LT |
77 | |
78 | /* | |
79 | * Some hardware gives randomly wrong interrupts. Rather | |
80 | * than crashing, do something sensible. | |
81 | */ | |
354e6f72 | 82 | if (unlikely(irq >= nr_irqs)) { |
7aa5514e AK |
83 | if (printk_ratelimit()) |
84 | printk(KERN_WARNING "Bad IRQ%u\n", irq); | |
85 | ack_bad_irq(irq); | |
86 | } else { | |
d8aa0251 | 87 | generic_handle_irq(irq); |
7aa5514e | 88 | } |
1da177e4 | 89 | |
4a2581a0 | 90 | /* AT91 specific workaround */ |
1da177e4 LT |
91 | irq_finish(irq); |
92 | ||
1da177e4 | 93 | irq_exit(); |
e6300155 | 94 | set_irq_regs(old_regs); |
1da177e4 LT |
95 | } |
96 | ||
a4841e39 RKAL |
97 | /* |
98 | * asm_do_IRQ is the interface to be used from assembly code. | |
99 | */ | |
100 | asmlinkage void __exception_irq_entry | |
101 | asm_do_IRQ(unsigned int irq, struct pt_regs *regs) | |
102 | { | |
103 | handle_IRQ(irq, regs); | |
104 | } | |
105 | ||
1da177e4 LT |
106 | void set_irq_flags(unsigned int irq, unsigned int iflags) |
107 | { | |
1b7a2d90 | 108 | unsigned long clr = 0, set = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; |
1da177e4 | 109 | |
354e6f72 | 110 | if (irq >= nr_irqs) { |
1da177e4 LT |
111 | printk(KERN_ERR "Trying to set irq flags for IRQ%d\n", irq); |
112 | return; | |
113 | } | |
114 | ||
4a2581a0 | 115 | if (iflags & IRQF_VALID) |
1b7a2d90 | 116 | clr |= IRQ_NOREQUEST; |
4a2581a0 | 117 | if (iflags & IRQF_PROBE) |
1b7a2d90 | 118 | clr |= IRQ_NOPROBE; |
4a2581a0 | 119 | if (!(iflags & IRQF_NOAUTOEN)) |
1b7a2d90 TG |
120 | clr |= IRQ_NOAUTOEN; |
121 | /* Order is clear bits in "clr" then set bits in "set" */ | |
122 | irq_modify_status(irq, clr, set & ~clr); | |
1da177e4 LT |
123 | } |
124 | ||
125 | void __init init_IRQ(void) | |
126 | { | |
8ff1443c | 127 | machine_desc->init_irq(); |
1da177e4 LT |
128 | } |
129 | ||
354e6f72 | 130 | #ifdef CONFIG_SPARSE_IRQ |
131 | int __init arch_probe_nr_irqs(void) | |
132 | { | |
8ff1443c | 133 | nr_irqs = machine_desc->nr_irqs ? machine_desc->nr_irqs : NR_IRQS; |
b683de2b | 134 | return nr_irqs; |
354e6f72 | 135 | } |
136 | #endif | |
137 | ||
a054a811 | 138 | #ifdef CONFIG_HOTPLUG_CPU |
f7ede370 | 139 | |
78359cb8 | 140 | static bool migrate_one_irq(struct irq_desc *desc) |
f7ede370 | 141 | { |
78359cb8 | 142 | struct irq_data *d = irq_desc_get_irq_data(desc); |
ca15af19 | 143 | const struct cpumask *affinity = d->affinity; |
78359cb8 | 144 | struct irq_chip *c; |
61791244 | 145 | bool ret = false; |
f7ede370 | 146 | |
78359cb8 RK |
147 | /* |
148 | * If this is a per-CPU interrupt, or the affinity does not | |
149 | * include this CPU, then we have nothing to do. | |
150 | */ | |
151 | if (irqd_is_per_cpu(d) || !cpumask_test_cpu(smp_processor_id(), affinity)) | |
152 | return false; | |
153 | ||
ca15af19 | 154 | if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) { |
78359cb8 | 155 | affinity = cpu_online_mask; |
61791244 RK |
156 | ret = true; |
157 | } | |
158 | ||
78359cb8 RK |
159 | c = irq_data_get_irq_chip(d); |
160 | if (c->irq_set_affinity) | |
161 | c->irq_set_affinity(d, affinity, true); | |
162 | else | |
163 | pr_debug("IRQ%u: unable to set affinity\n", d->irq); | |
61791244 RK |
164 | |
165 | return ret; | |
f7ede370 TG |
166 | } |
167 | ||
a054a811 | 168 | /* |
78359cb8 RK |
169 | * The current CPU has been marked offline. Migrate IRQs off this CPU. |
170 | * If the affinity settings do not allow other CPUs, force them onto any | |
a054a811 | 171 | * available CPU. |
78359cb8 RK |
172 | * |
173 | * Note: we must iterate over all IRQs, whether they have an attached | |
174 | * action structure or not, as we need to get chained interrupts too. | |
a054a811 RK |
175 | */ |
176 | void migrate_irqs(void) | |
177 | { | |
78359cb8 | 178 | unsigned int i; |
354e6f72 | 179 | struct irq_desc *desc; |
61791244 RK |
180 | unsigned long flags; |
181 | ||
182 | local_irq_save(flags); | |
a054a811 | 183 | |
354e6f72 | 184 | for_each_irq_desc(i, desc) { |
61791244 | 185 | bool affinity_broken = false; |
f64305a6 | 186 | |
78359cb8 RK |
187 | if (!desc) |
188 | continue; | |
189 | ||
61791244 | 190 | raw_spin_lock(&desc->lock); |
78359cb8 | 191 | affinity_broken = migrate_one_irq(desc); |
61791244 RK |
192 | raw_spin_unlock(&desc->lock); |
193 | ||
194 | if (affinity_broken && printk_ratelimit()) | |
78359cb8 RK |
195 | pr_warning("IRQ%u no longer affine to CPU%u\n", i, |
196 | smp_processor_id()); | |
a054a811 | 197 | } |
61791244 RK |
198 | |
199 | local_irq_restore(flags); | |
a054a811 RK |
200 | } |
201 | #endif /* CONFIG_HOTPLUG_CPU */ |