ARM: add uprobes support
[deliverable/linux.git] / arch / arm / kernel / kprobes.c
CommitLineData
24ba613c
AS
1/*
2 * arch/arm/kernel/kprobes.c
3 *
4 * Kprobes on ARM
5 *
6 * Abhishek Sagar <sagar.abhishek@gmail.com>
7 * Copyright (C) 2006, 2007 Motorola Inc.
8 *
9 * Nicolas Pitre <nico@marvell.com>
10 * Copyright (C) 2007 Marvell Ltd.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 */
21
22#include <linux/kernel.h>
23#include <linux/kprobes.h>
24#include <linux/module.h>
5a0e3ad6 25#include <linux/slab.h>
2003b7af 26#include <linux/stop_machine.h>
24ba613c
AS
27#include <linux/stringify.h>
28#include <asm/traps.h>
29#include <asm/cacheflush.h>
21254ebc
DL
30#include <linux/percpu.h>
31#include <linux/bug.h>
24ba613c 32
221bf15f 33#include "kprobes.h"
47e190fa
DL
34#include "probes-arm.h"
35#include "probes-thumb.h"
b21d55e9 36#include "patch.h"
221bf15f 37
24ba613c
AS
38#define MIN_STACK_SIZE(addr) \
39 min((unsigned long)MAX_STACK_SIZE, \
40 (unsigned long)current_thread_info() + THREAD_START_SP - (addr))
41
aceb487a 42#define flush_insns(addr, size) \
24ba613c
AS
43 flush_icache_range((unsigned long)(addr), \
44 (unsigned long)(addr) + \
aceb487a 45 (size))
24ba613c
AS
46
47/* Used as a marker in ARM_pc to note when we're in a jprobe. */
48#define JPROBE_MAGIC_ADDR 0xffffffff
49
50DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
51DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
52
53
54int __kprobes arch_prepare_kprobe(struct kprobe *p)
55{
56 kprobe_opcode_t insn;
57 kprobe_opcode_t tmp_insn[MAX_INSN_SIZE];
58 unsigned long addr = (unsigned long)p->addr;
e2960317 59 bool thumb;
24371707 60 kprobe_decode_insn_t *decode_insn;
3e6cd394 61 const union decode_action *actions;
24ba613c
AS
62 int is;
63
24371707 64 if (in_exception_text(addr))
24ba613c
AS
65 return -EINVAL;
66
24371707 67#ifdef CONFIG_THUMB2_KERNEL
e2960317 68 thumb = true;
24371707
JM
69 addr &= ~1; /* Bit 0 would normally be set to indicate Thumb code */
70 insn = ((u16 *)addr)[0];
71 if (is_wide_instruction(insn)) {
72 insn <<= 16;
73 insn |= ((u16 *)addr)[1];
47e190fa 74 decode_insn = thumb32_probes_decode_insn;
3e6cd394
DL
75 actions = kprobes_t32_actions;
76 } else {
47e190fa 77 decode_insn = thumb16_probes_decode_insn;
3e6cd394
DL
78 actions = kprobes_t16_actions;
79 }
24371707 80#else /* !CONFIG_THUMB2_KERNEL */
e2960317 81 thumb = false;
24371707
JM
82 if (addr & 0x3)
83 return -EINVAL;
24ba613c 84 insn = *p->addr;
47e190fa 85 decode_insn = arm_probes_decode_insn;
3e6cd394 86 actions = kprobes_arm_actions;
24371707
JM
87#endif
88
24ba613c
AS
89 p->opcode = insn;
90 p->ainsn.insn = tmp_insn;
91
602cd260 92 switch ((*decode_insn)(insn, &p->ainsn, true, actions)) {
24ba613c
AS
93 case INSN_REJECTED: /* not supported */
94 return -EINVAL;
95
96 case INSN_GOOD: /* instruction uses slot */
97 p->ainsn.insn = get_insn_slot();
98 if (!p->ainsn.insn)
99 return -ENOMEM;
100 for (is = 0; is < MAX_INSN_SIZE; ++is)
101 p->ainsn.insn[is] = tmp_insn[is];
aceb487a
JM
102 flush_insns(p->ainsn.insn,
103 sizeof(p->ainsn.insn[0]) * MAX_INSN_SIZE);
47e190fa 104 p->ainsn.insn_fn = (probes_insn_fn_t *)
e2960317 105 ((uintptr_t)p->ainsn.insn | thumb);
24ba613c
AS
106 break;
107
108 case INSN_GOOD_NO_SLOT: /* instruction doesn't need insn slot */
109 p->ainsn.insn = NULL;
110 break;
111 }
112
113 return 0;
114}
115
116void __kprobes arch_arm_kprobe(struct kprobe *p)
117{
b21d55e9
RV
118 unsigned int brkp;
119 void *addr;
120
121 if (IS_ENABLED(CONFIG_THUMB2_KERNEL)) {
122 /* Remove any Thumb flag */
123 addr = (void *)((uintptr_t)p->addr & ~1);
124
125 if (is_wide_instruction(p->opcode))
126 brkp = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION;
127 else
128 brkp = KPROBE_THUMB16_BREAKPOINT_INSTRUCTION;
aceb487a 129 } else {
b21d55e9 130 kprobe_opcode_t insn = p->opcode;
24ba613c 131
b21d55e9
RV
132 addr = p->addr;
133 brkp = KPROBE_ARM_BREAKPOINT_INSTRUCTION;
aceb487a 134
b21d55e9
RV
135 if (insn >= 0xe0000000)
136 brkp |= 0xe0000000; /* Unconditional instruction */
137 else
138 brkp |= insn & 0xf0000000; /* Copy condition from insn */
139 }
aceb487a 140
b21d55e9
RV
141 patch_text(addr, brkp);
142}
aceb487a 143
2003b7af
FR
144/*
145 * The actual disarming is done here on each CPU and synchronized using
146 * stop_machine. This synchronization is necessary on SMP to avoid removing
147 * a probe between the moment the 'Undefined Instruction' exception is raised
148 * and the moment the exception handler reads the faulting instruction from
aceb487a
JM
149 * memory. It is also needed to atomically set the two half-words of a 32-bit
150 * Thumb breakpoint.
2003b7af
FR
151 */
152int __kprobes __arch_disarm_kprobe(void *p)
153{
154 struct kprobe *kp = p;
b21d55e9 155 void *addr = (void *)((uintptr_t)kp->addr & ~1);
aceb487a 156
b21d55e9 157 __patch_text(addr, kp->opcode);
aceb487a 158
2003b7af
FR
159 return 0;
160}
161
24ba613c
AS
162void __kprobes arch_disarm_kprobe(struct kprobe *p)
163{
0b5f9c00 164 stop_machine(__arch_disarm_kprobe, p, cpu_online_mask);
24ba613c
AS
165}
166
167void __kprobes arch_remove_kprobe(struct kprobe *p)
168{
169 if (p->ainsn.insn) {
24ba613c 170 free_insn_slot(p->ainsn.insn, 0);
24ba613c
AS
171 p->ainsn.insn = NULL;
172 }
173}
174
175static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
176{
177 kcb->prev_kprobe.kp = kprobe_running();
178 kcb->prev_kprobe.status = kcb->kprobe_status;
179}
180
181static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
182{
1436c1aa 183 __this_cpu_write(current_kprobe, kcb->prev_kprobe.kp);
24ba613c
AS
184 kcb->kprobe_status = kcb->prev_kprobe.status;
185}
186
187static void __kprobes set_current_kprobe(struct kprobe *p)
188{
1436c1aa 189 __this_cpu_write(current_kprobe, p);
24ba613c
AS
190}
191
3cca6c24
JM
192static void __kprobes
193singlestep_skip(struct kprobe *p, struct pt_regs *regs)
194{
195#ifdef CONFIG_THUMB2_KERNEL
196 regs->ARM_cpsr = it_advance(regs->ARM_cpsr);
197 if (is_wide_instruction(p->opcode))
198 regs->ARM_pc += 4;
199 else
200 regs->ARM_pc += 2;
201#else
202 regs->ARM_pc += 4;
203#endif
204}
205
c6a7d97d
JM
206static inline void __kprobes
207singlestep(struct kprobe *p, struct pt_regs *regs, struct kprobe_ctlblk *kcb)
24ba613c 208{
7579f4b3 209 p->ainsn.insn_singlestep(p->opcode, &p->ainsn, regs);
24ba613c
AS
210}
211
212/*
213 * Called with IRQs disabled. IRQs must remain disabled from that point
214 * all the way until processing this kprobe is complete. The current
215 * kprobes implementation cannot process more than one nested level of
216 * kprobe, and that level is reserved for user kprobe handlers, so we can't
217 * risk encountering a new kprobe in an interrupt handler.
218 */
219void __kprobes kprobe_handler(struct pt_regs *regs)
220{
221 struct kprobe *p, *cur;
222 struct kprobe_ctlblk *kcb;
24ba613c
AS
223
224 kcb = get_kprobe_ctlblk();
225 cur = kprobe_running();
aceb487a
JM
226
227#ifdef CONFIG_THUMB2_KERNEL
228 /*
229 * First look for a probe which was registered using an address with
230 * bit 0 set, this is the usual situation for pointers to Thumb code.
231 * If not found, fallback to looking for one with bit 0 clear.
232 */
233 p = get_kprobe((kprobe_opcode_t *)(regs->ARM_pc | 1));
234 if (!p)
235 p = get_kprobe((kprobe_opcode_t *)regs->ARM_pc);
236
237#else /* ! CONFIG_THUMB2_KERNEL */
238 p = get_kprobe((kprobe_opcode_t *)regs->ARM_pc);
239#endif
24ba613c
AS
240
241 if (p) {
242 if (cur) {
243 /* Kprobe is pending, so we're recursing. */
244 switch (kcb->kprobe_status) {
245 case KPROBE_HIT_ACTIVE:
246 case KPROBE_HIT_SSDONE:
247 /* A pre- or post-handler probe got us here. */
248 kprobes_inc_nmissed_count(p);
249 save_previous_kprobe(kcb);
250 set_current_kprobe(p);
251 kcb->kprobe_status = KPROBE_REENTER;
252 singlestep(p, regs, kcb);
253 restore_previous_kprobe(kcb);
254 break;
255 default:
256 /* impossible cases */
257 BUG();
258 }
3cca6c24
JM
259 } else if (p->ainsn.insn_check_cc(regs->ARM_cpsr)) {
260 /* Probe hit and conditional execution check ok. */
24ba613c
AS
261 set_current_kprobe(p);
262 kcb->kprobe_status = KPROBE_HIT_ACTIVE;
263
264 /*
265 * If we have no pre-handler or it returned 0, we
266 * continue with normal processing. If we have a
267 * pre-handler and it returned non-zero, it prepped
268 * for calling the break_handler below on re-entry,
269 * so get out doing nothing more here.
270 */
271 if (!p->pre_handler || !p->pre_handler(p, regs)) {
272 kcb->kprobe_status = KPROBE_HIT_SS;
273 singlestep(p, regs, kcb);
274 if (p->post_handler) {
275 kcb->kprobe_status = KPROBE_HIT_SSDONE;
276 p->post_handler(p, regs, 0);
277 }
278 reset_current_kprobe();
279 }
3cca6c24
JM
280 } else {
281 /*
282 * Probe hit but conditional execution check failed,
283 * so just skip the instruction and continue as if
284 * nothing had happened.
285 */
286 singlestep_skip(p, regs);
24ba613c
AS
287 }
288 } else if (cur) {
289 /* We probably hit a jprobe. Call its break handler. */
290 if (cur->break_handler && cur->break_handler(cur, regs)) {
291 kcb->kprobe_status = KPROBE_HIT_SS;
292 singlestep(cur, regs, kcb);
293 if (cur->post_handler) {
294 kcb->kprobe_status = KPROBE_HIT_SSDONE;
295 cur->post_handler(cur, regs, 0);
296 }
297 }
298 reset_current_kprobe();
299 } else {
300 /*
301 * The probe was removed and a race is in progress.
302 * There is nothing we can do about it. Let's restart
303 * the instruction. By the time we can restart, the
304 * real instruction will be there.
305 */
306 }
307}
308
3305a607 309static int __kprobes kprobe_trap_handler(struct pt_regs *regs, unsigned int instr)
24ba613c 310{
3305a607
NP
311 unsigned long flags;
312 local_irq_save(flags);
24ba613c 313 kprobe_handler(regs);
3305a607 314 local_irq_restore(flags);
24ba613c
AS
315 return 0;
316}
317
318int __kprobes kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr)
319{
320 struct kprobe *cur = kprobe_running();
321 struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
322
323 switch (kcb->kprobe_status) {
324 case KPROBE_HIT_SS:
325 case KPROBE_REENTER:
326 /*
327 * We are here because the instruction being single
328 * stepped caused a page fault. We reset the current
329 * kprobe and the PC to point back to the probe address
330 * and allow the page fault handler to continue as a
331 * normal page fault.
332 */
333 regs->ARM_pc = (long)cur->addr;
334 if (kcb->kprobe_status == KPROBE_REENTER) {
335 restore_previous_kprobe(kcb);
336 } else {
337 reset_current_kprobe();
338 }
339 break;
340
341 case KPROBE_HIT_ACTIVE:
342 case KPROBE_HIT_SSDONE:
343 /*
344 * We increment the nmissed count for accounting,
345 * we can also use npre/npostfault count for accounting
346 * these specific fault cases.
347 */
348 kprobes_inc_nmissed_count(cur);
349
350 /*
351 * We come here because instructions in the pre/post
352 * handler caused the page_fault, this could happen
353 * if handler tries to access user space by
354 * copy_from_user(), get_user() etc. Let the
355 * user-specified handler try to fix it.
356 */
357 if (cur->fault_handler && cur->fault_handler(cur, regs, fsr))
358 return 1;
359 break;
360
361 default:
362 break;
363 }
364
365 return 0;
366}
367
368int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
369 unsigned long val, void *data)
370{
371 /*
372 * notify_die() is currently never called on ARM,
373 * so this callback is currently empty.
374 */
375 return NOTIFY_DONE;
376}
377
378/*
379 * When a retprobed function returns, trampoline_handler() is called,
380 * calling the kretprobe's handler. We construct a struct pt_regs to
381 * give a view of registers r0-r11 to the user return-handler. This is
382 * not a complete pt_regs structure, but that should be plenty sufficient
383 * for kretprobe handlers which should normally be interested in r0 only
384 * anyway.
385 */
e0773410 386void __naked __kprobes kretprobe_trampoline(void)
24ba613c
AS
387{
388 __asm__ __volatile__ (
389 "stmdb sp!, {r0 - r11} \n\t"
390 "mov r0, sp \n\t"
391 "bl trampoline_handler \n\t"
392 "mov lr, r0 \n\t"
393 "ldmia sp!, {r0 - r11} \n\t"
de419840
JM
394#ifdef CONFIG_THUMB2_KERNEL
395 "bx lr \n\t"
396#else
24ba613c 397 "mov pc, lr \n\t"
de419840 398#endif
24ba613c
AS
399 : : : "memory");
400}
401
402/* Called from kretprobe_trampoline */
403static __used __kprobes void *trampoline_handler(struct pt_regs *regs)
404{
405 struct kretprobe_instance *ri = NULL;
406 struct hlist_head *head, empty_rp;
b67bfe0d 407 struct hlist_node *tmp;
24ba613c
AS
408 unsigned long flags, orig_ret_address = 0;
409 unsigned long trampoline_address = (unsigned long)&kretprobe_trampoline;
410
411 INIT_HLIST_HEAD(&empty_rp);
ef53d9c5 412 kretprobe_hash_lock(current, &head, &flags);
24ba613c
AS
413
414 /*
415 * It is possible to have multiple instances associated with a given
416 * task either because multiple functions in the call path have
417 * a return probe installed on them, and/or more than one return
418 * probe was registered for a target function.
419 *
420 * We can handle this because:
421 * - instances are always inserted at the head of the list
422 * - when multiple return probes are registered for the same
423 * function, the first instance's ret_addr will point to the
424 * real return address, and all the rest will point to
425 * kretprobe_trampoline
426 */
b67bfe0d 427 hlist_for_each_entry_safe(ri, tmp, head, hlist) {
24ba613c
AS
428 if (ri->task != current)
429 /* another task is sharing our hash bucket */
430 continue;
431
432 if (ri->rp && ri->rp->handler) {
1436c1aa 433 __this_cpu_write(current_kprobe, &ri->rp->kp);
24ba613c
AS
434 get_kprobe_ctlblk()->kprobe_status = KPROBE_HIT_ACTIVE;
435 ri->rp->handler(ri, regs);
1436c1aa 436 __this_cpu_write(current_kprobe, NULL);
24ba613c
AS
437 }
438
439 orig_ret_address = (unsigned long)ri->ret_addr;
440 recycle_rp_inst(ri, &empty_rp);
441
442 if (orig_ret_address != trampoline_address)
443 /*
444 * This is the real return address. Any other
445 * instances associated with this task are for
446 * other calls deeper on the call stack
447 */
448 break;
449 }
450
451 kretprobe_assert(ri, orig_ret_address, trampoline_address);
ef53d9c5 452 kretprobe_hash_unlock(current, &flags);
24ba613c 453
b67bfe0d 454 hlist_for_each_entry_safe(ri, tmp, &empty_rp, hlist) {
24ba613c
AS
455 hlist_del(&ri->hlist);
456 kfree(ri);
457 }
458
459 return (void *)orig_ret_address;
460}
461
24ba613c
AS
462void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri,
463 struct pt_regs *regs)
464{
465 ri->ret_addr = (kprobe_opcode_t *)regs->ARM_lr;
466
467 /* Replace the return addr with trampoline addr. */
468 regs->ARM_lr = (unsigned long)&kretprobe_trampoline;
469}
470
471int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
472{
473 struct jprobe *jp = container_of(p, struct jprobe, kp);
474 struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
475 long sp_addr = regs->ARM_sp;
de419840 476 long cpsr;
24ba613c
AS
477
478 kcb->jprobe_saved_regs = *regs;
479 memcpy(kcb->jprobes_stack, (void *)sp_addr, MIN_STACK_SIZE(sp_addr));
480 regs->ARM_pc = (long)jp->entry;
de419840
JM
481
482 cpsr = regs->ARM_cpsr | PSR_I_BIT;
483#ifdef CONFIG_THUMB2_KERNEL
484 /* Set correct Thumb state in cpsr */
485 if (regs->ARM_pc & 1)
486 cpsr |= PSR_T_BIT;
487 else
488 cpsr &= ~PSR_T_BIT;
489#endif
490 regs->ARM_cpsr = cpsr;
491
24ba613c
AS
492 preempt_disable();
493 return 1;
494}
495
496void __kprobes jprobe_return(void)
497{
498 struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
499
500 __asm__ __volatile__ (
501 /*
502 * Setup an empty pt_regs. Fill SP and PC fields as
503 * they're needed by longjmp_break_handler.
782a0fd1
MW
504 *
505 * We allocate some slack between the original SP and start of
506 * our fabricated regs. To be precise we want to have worst case
507 * covered which is STMFD with all 16 regs so we allocate 2 *
508 * sizeof(struct_pt_regs)).
509 *
510 * This is to prevent any simulated instruction from writing
511 * over the regs when they are accessing the stack.
24ba613c 512 */
de419840
JM
513#ifdef CONFIG_THUMB2_KERNEL
514 "sub r0, %0, %1 \n\t"
515 "mov sp, r0 \n\t"
516#else
24ba613c 517 "sub sp, %0, %1 \n\t"
de419840 518#endif
24ba613c
AS
519 "ldr r0, ="__stringify(JPROBE_MAGIC_ADDR)"\n\t"
520 "str %0, [sp, %2] \n\t"
521 "str r0, [sp, %3] \n\t"
522 "mov r0, sp \n\t"
523 "bl kprobe_handler \n\t"
524
525 /*
526 * Return to the context saved by setjmp_pre_handler
527 * and restored by longjmp_break_handler.
528 */
de419840
JM
529#ifdef CONFIG_THUMB2_KERNEL
530 "ldr lr, [sp, %2] \n\t" /* lr = saved sp */
531 "ldrd r0, r1, [sp, %5] \n\t" /* r0,r1 = saved lr,pc */
532 "ldr r2, [sp, %4] \n\t" /* r2 = saved psr */
533 "stmdb lr!, {r0, r1, r2} \n\t" /* push saved lr and */
534 /* rfe context */
535 "ldmia sp, {r0 - r12} \n\t"
536 "mov sp, lr \n\t"
537 "ldr lr, [sp], #4 \n\t"
538 "rfeia sp! \n\t"
539#else
24ba613c
AS
540 "ldr r0, [sp, %4] \n\t"
541 "msr cpsr_cxsf, r0 \n\t"
542 "ldmia sp, {r0 - pc} \n\t"
de419840 543#endif
24ba613c
AS
544 :
545 : "r" (kcb->jprobe_saved_regs.ARM_sp),
782a0fd1 546 "I" (sizeof(struct pt_regs) * 2),
24ba613c
AS
547 "J" (offsetof(struct pt_regs, ARM_sp)),
548 "J" (offsetof(struct pt_regs, ARM_pc)),
de419840
JM
549 "J" (offsetof(struct pt_regs, ARM_cpsr)),
550 "J" (offsetof(struct pt_regs, ARM_lr))
24ba613c
AS
551 : "memory", "cc");
552}
553
554int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
555{
556 struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
557 long stack_addr = kcb->jprobe_saved_regs.ARM_sp;
558 long orig_sp = regs->ARM_sp;
559 struct jprobe *jp = container_of(p, struct jprobe, kp);
560
561 if (regs->ARM_pc == JPROBE_MAGIC_ADDR) {
562 if (orig_sp != stack_addr) {
563 struct pt_regs *saved_regs =
564 (struct pt_regs *)kcb->jprobe_saved_regs.ARM_sp;
565 printk("current sp %lx does not match saved sp %lx\n",
566 orig_sp, stack_addr);
567 printk("Saved registers for jprobe %p\n", jp);
568 show_regs(saved_regs);
569 printk("Current registers\n");
570 show_regs(regs);
571 BUG();
572 }
573 *regs = kcb->jprobe_saved_regs;
574 memcpy((void *)stack_addr, kcb->jprobes_stack,
575 MIN_STACK_SIZE(stack_addr));
576 preempt_enable_no_resched();
577 return 1;
578 }
579 return 0;
580}
581
b24061fa
NP
582int __kprobes arch_trampoline_kprobe(struct kprobe *p)
583{
584 return 0;
585}
586
aceb487a
JM
587#ifdef CONFIG_THUMB2_KERNEL
588
589static struct undef_hook kprobes_thumb16_break_hook = {
590 .instr_mask = 0xffff,
591 .instr_val = KPROBE_THUMB16_BREAKPOINT_INSTRUCTION,
592 .cpsr_mask = MODE_MASK,
593 .cpsr_val = SVC_MODE,
594 .fn = kprobe_trap_handler,
595};
596
597static struct undef_hook kprobes_thumb32_break_hook = {
598 .instr_mask = 0xffffffff,
599 .instr_val = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION,
600 .cpsr_mask = MODE_MASK,
601 .cpsr_val = SVC_MODE,
602 .fn = kprobe_trap_handler,
603};
604
605#else /* !CONFIG_THUMB2_KERNEL */
606
607static struct undef_hook kprobes_arm_break_hook = {
3b269455 608 .instr_mask = 0x0fffffff,
aceb487a 609 .instr_val = KPROBE_ARM_BREAKPOINT_INSTRUCTION,
24ba613c
AS
610 .cpsr_mask = MODE_MASK,
611 .cpsr_val = SVC_MODE,
612 .fn = kprobe_trap_handler,
613};
614
aceb487a
JM
615#endif /* !CONFIG_THUMB2_KERNEL */
616
24ba613c
AS
617int __init arch_init_kprobes()
618{
eb73ea97 619 arm_probes_decode_init();
aceb487a
JM
620#ifdef CONFIG_THUMB2_KERNEL
621 register_undef_hook(&kprobes_thumb16_break_hook);
622 register_undef_hook(&kprobes_thumb32_break_hook);
623#else
624 register_undef_hook(&kprobes_arm_break_hook);
625#endif
24ba613c
AS
626 return 0;
627}
This page took 0.401835 seconds and 5 git commands to generate.