Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/kernel/module.c | |
3 | * | |
4 | * Copyright (C) 2002 Russell King. | |
6a570b28 | 5 | * Modified for nommu by Hyok S. Choi |
1da177e4 LT |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * Module allocation method suggested by Andi Kleen. | |
12 | */ | |
1da177e4 | 13 | #include <linux/module.h> |
f339ab3d | 14 | #include <linux/moduleloader.h> |
1da177e4 | 15 | #include <linux/kernel.h> |
27ac792c | 16 | #include <linux/mm.h> |
1da177e4 LT |
17 | #include <linux/elf.h> |
18 | #include <linux/vmalloc.h> | |
1da177e4 LT |
19 | #include <linux/fs.h> |
20 | #include <linux/string.h> | |
5a0e3ad6 | 21 | #include <linux/gfp.h> |
1da177e4 LT |
22 | |
23 | #include <asm/pgtable.h> | |
37efe642 | 24 | #include <asm/sections.h> |
4a9cb360 | 25 | #include <asm/smp_plat.h> |
2e1926e7 | 26 | #include <asm/unwind.h> |
f592d323 | 27 | #include <asm/opcodes.h> |
1da177e4 LT |
28 | |
29 | #ifdef CONFIG_XIP_KERNEL | |
30 | /* | |
31 | * The XIP kernel text is mapped in the module area for modules and | |
32 | * some other stuff to work without any indirect relocations. | |
ab4f2ee1 | 33 | * MODULES_VADDR is redefined here and not in asm/memory.h to avoid |
1da177e4 LT |
34 | * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off. |
35 | */ | |
ab4f2ee1 | 36 | #undef MODULES_VADDR |
e73fc88e | 37 | #define MODULES_VADDR (((unsigned long)_etext + ~PMD_MASK) & PMD_MASK) |
1da177e4 LT |
38 | #endif |
39 | ||
6a570b28 | 40 | #ifdef CONFIG_MMU |
1da177e4 LT |
41 | void *module_alloc(unsigned long size) |
42 | { | |
d0a21265 | 43 | return __vmalloc_node_range(size, 1, MODULES_VADDR, MODULES_END, |
40c3baa7 | 44 | GFP_KERNEL, PAGE_KERNEL_EXEC, NUMA_NO_NODE, |
d0a21265 | 45 | __builtin_return_address(0)); |
1da177e4 | 46 | } |
66574cc0 | 47 | #endif |
1da177e4 LT |
48 | |
49 | int | |
50 | apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, | |
51 | unsigned int relindex, struct module *module) | |
52 | { | |
53 | Elf32_Shdr *symsec = sechdrs + symindex; | |
54 | Elf32_Shdr *relsec = sechdrs + relindex; | |
55 | Elf32_Shdr *dstsec = sechdrs + relsec->sh_info; | |
56 | Elf32_Rel *rel = (void *)relsec->sh_addr; | |
57 | unsigned int i; | |
58 | ||
59 | for (i = 0; i < relsec->sh_size / sizeof(Elf32_Rel); i++, rel++) { | |
60 | unsigned long loc; | |
61 | Elf32_Sym *sym; | |
68e6fad4 | 62 | const char *symname; |
1da177e4 | 63 | s32 offset; |
f592d323 | 64 | u32 tmp; |
b7493156 | 65 | #ifdef CONFIG_THUMB2_KERNEL |
adca6dc2 | 66 | u32 upper, lower, sign, j1, j2; |
b7493156 | 67 | #endif |
1da177e4 LT |
68 | |
69 | offset = ELF32_R_SYM(rel->r_info); | |
70 | if (offset < 0 || offset > (symsec->sh_size / sizeof(Elf32_Sym))) { | |
68e6fad4 | 71 | pr_err("%s: section %u reloc %u: bad relocation sym offset\n", |
1da177e4 LT |
72 | module->name, relindex, i); |
73 | return -ENOEXEC; | |
74 | } | |
75 | ||
76 | sym = ((Elf32_Sym *)symsec->sh_addr) + offset; | |
68e6fad4 | 77 | symname = strtab + sym->st_name; |
1da177e4 LT |
78 | |
79 | if (rel->r_offset < 0 || rel->r_offset > dstsec->sh_size - sizeof(u32)) { | |
68e6fad4 RK |
80 | pr_err("%s: section %u reloc %u sym '%s': out of bounds relocation, offset %d size %u\n", |
81 | module->name, relindex, i, symname, | |
82 | rel->r_offset, dstsec->sh_size); | |
1da177e4 LT |
83 | return -ENOEXEC; |
84 | } | |
85 | ||
86 | loc = dstsec->sh_addr + rel->r_offset; | |
87 | ||
88 | switch (ELF32_R_TYPE(rel->r_info)) { | |
2e1926e7 CM |
89 | case R_ARM_NONE: |
90 | /* ignore */ | |
91 | break; | |
92 | ||
1da177e4 LT |
93 | case R_ARM_ABS32: |
94 | *(u32 *)loc += sym->st_value; | |
95 | break; | |
96 | ||
97 | case R_ARM_PC24: | |
c2e26114 DJ |
98 | case R_ARM_CALL: |
99 | case R_ARM_JUMP24: | |
f592d323 BD |
100 | offset = __mem_to_opcode_arm(*(u32 *)loc); |
101 | offset = (offset & 0x00ffffff) << 2; | |
1da177e4 LT |
102 | if (offset & 0x02000000) |
103 | offset -= 0x04000000; | |
104 | ||
105 | offset += sym->st_value - loc; | |
106 | if (offset & 3 || | |
c5f12503 KW |
107 | offset <= (s32)0xfe000000 || |
108 | offset >= (s32)0x02000000) { | |
68e6fad4 RK |
109 | pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n", |
110 | module->name, relindex, i, symname, | |
111 | ELF32_R_TYPE(rel->r_info), loc, | |
112 | sym->st_value); | |
1da177e4 LT |
113 | return -ENOEXEC; |
114 | } | |
115 | ||
116 | offset >>= 2; | |
f592d323 | 117 | offset &= 0x00ffffff; |
1da177e4 | 118 | |
f592d323 BD |
119 | *(u32 *)loc &= __opcode_to_mem_arm(0xff000000); |
120 | *(u32 *)loc |= __opcode_to_mem_arm(offset); | |
1da177e4 LT |
121 | break; |
122 | ||
4731f8b6 DS |
123 | case R_ARM_V4BX: |
124 | /* Preserve Rm and the condition code. Alter | |
125 | * other bits to re-code instruction as | |
126 | * MOV PC,Rm. | |
127 | */ | |
f592d323 BD |
128 | *(u32 *)loc &= __opcode_to_mem_arm(0xf000000f); |
129 | *(u32 *)loc |= __opcode_to_mem_arm(0x01a0f000); | |
4731f8b6 DS |
130 | break; |
131 | ||
2e1926e7 CM |
132 | case R_ARM_PREL31: |
133 | offset = *(u32 *)loc + sym->st_value - loc; | |
134 | *(u32 *)loc = offset & 0x7fffffff; | |
135 | break; | |
136 | ||
ae51e609 PG |
137 | case R_ARM_MOVW_ABS_NC: |
138 | case R_ARM_MOVT_ABS: | |
f592d323 | 139 | offset = tmp = __mem_to_opcode_arm(*(u32 *)loc); |
ae51e609 PG |
140 | offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff); |
141 | offset = (offset ^ 0x8000) - 0x8000; | |
142 | ||
143 | offset += sym->st_value; | |
144 | if (ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_ABS) | |
145 | offset >>= 16; | |
146 | ||
f592d323 BD |
147 | tmp &= 0xfff0f000; |
148 | tmp |= ((offset & 0xf000) << 4) | | |
149 | (offset & 0x0fff); | |
150 | ||
151 | *(u32 *)loc = __opcode_to_mem_arm(tmp); | |
ae51e609 PG |
152 | break; |
153 | ||
b7493156 | 154 | #ifdef CONFIG_THUMB2_KERNEL |
adca6dc2 CM |
155 | case R_ARM_THM_CALL: |
156 | case R_ARM_THM_JUMP24: | |
f592d323 BD |
157 | upper = __mem_to_opcode_thumb16(*(u16 *)loc); |
158 | lower = __mem_to_opcode_thumb16(*(u16 *)(loc + 2)); | |
adca6dc2 CM |
159 | |
160 | /* | |
161 | * 25 bit signed address range (Thumb-2 BL and B.W | |
162 | * instructions): | |
163 | * S:I1:I2:imm10:imm11:0 | |
164 | * where: | |
165 | * S = upper[10] = offset[24] | |
166 | * I1 = ~(J1 ^ S) = offset[23] | |
167 | * I2 = ~(J2 ^ S) = offset[22] | |
168 | * imm10 = upper[9:0] = offset[21:12] | |
169 | * imm11 = lower[10:0] = offset[11:1] | |
170 | * J1 = lower[13] | |
171 | * J2 = lower[11] | |
172 | */ | |
173 | sign = (upper >> 10) & 1; | |
174 | j1 = (lower >> 13) & 1; | |
175 | j2 = (lower >> 11) & 1; | |
176 | offset = (sign << 24) | ((~(j1 ^ sign) & 1) << 23) | | |
177 | ((~(j2 ^ sign) & 1) << 22) | | |
178 | ((upper & 0x03ff) << 12) | | |
179 | ((lower & 0x07ff) << 1); | |
180 | if (offset & 0x01000000) | |
181 | offset -= 0x02000000; | |
182 | offset += sym->st_value - loc; | |
183 | ||
9a00318e DM |
184 | /* |
185 | * For function symbols, only Thumb addresses are | |
186 | * allowed (no interworking). | |
187 | * | |
188 | * For non-function symbols, the destination | |
189 | * has no specific ARM/Thumb disposition, so | |
190 | * the branch is resolved under the assumption | |
191 | * that interworking is not required. | |
192 | */ | |
193 | if ((ELF32_ST_TYPE(sym->st_info) == STT_FUNC && | |
194 | !(offset & 1)) || | |
adca6dc2 CM |
195 | offset <= (s32)0xff000000 || |
196 | offset >= (s32)0x01000000) { | |
68e6fad4 RK |
197 | pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n", |
198 | module->name, relindex, i, symname, | |
199 | ELF32_R_TYPE(rel->r_info), loc, | |
200 | sym->st_value); | |
adca6dc2 CM |
201 | return -ENOEXEC; |
202 | } | |
203 | ||
204 | sign = (offset >> 24) & 1; | |
205 | j1 = sign ^ (~(offset >> 23) & 1); | |
206 | j2 = sign ^ (~(offset >> 22) & 1); | |
f592d323 | 207 | upper = (u16)((upper & 0xf800) | (sign << 10) | |
adca6dc2 | 208 | ((offset >> 12) & 0x03ff)); |
f592d323 BD |
209 | lower = (u16)((lower & 0xd000) | |
210 | (j1 << 13) | (j2 << 11) | | |
211 | ((offset >> 1) & 0x07ff)); | |
212 | ||
213 | *(u16 *)loc = __opcode_to_mem_thumb16(upper); | |
214 | *(u16 *)(loc + 2) = __opcode_to_mem_thumb16(lower); | |
adca6dc2 CM |
215 | break; |
216 | ||
8dd47741 CM |
217 | case R_ARM_THM_MOVW_ABS_NC: |
218 | case R_ARM_THM_MOVT_ABS: | |
f592d323 BD |
219 | upper = __mem_to_opcode_thumb16(*(u16 *)loc); |
220 | lower = __mem_to_opcode_thumb16(*(u16 *)(loc + 2)); | |
8dd47741 CM |
221 | |
222 | /* | |
223 | * MOVT/MOVW instructions encoding in Thumb-2: | |
224 | * | |
225 | * i = upper[10] | |
226 | * imm4 = upper[3:0] | |
227 | * imm3 = lower[14:12] | |
228 | * imm8 = lower[7:0] | |
229 | * | |
230 | * imm16 = imm4:i:imm3:imm8 | |
231 | */ | |
232 | offset = ((upper & 0x000f) << 12) | | |
233 | ((upper & 0x0400) << 1) | | |
234 | ((lower & 0x7000) >> 4) | (lower & 0x00ff); | |
235 | offset = (offset ^ 0x8000) - 0x8000; | |
236 | offset += sym->st_value; | |
237 | ||
238 | if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_ABS) | |
239 | offset >>= 16; | |
240 | ||
f592d323 BD |
241 | upper = (u16)((upper & 0xfbf0) | |
242 | ((offset & 0xf000) >> 12) | | |
243 | ((offset & 0x0800) >> 1)); | |
244 | lower = (u16)((lower & 0x8f00) | | |
245 | ((offset & 0x0700) << 4) | | |
246 | (offset & 0x00ff)); | |
247 | *(u16 *)loc = __opcode_to_mem_thumb16(upper); | |
248 | *(u16 *)(loc + 2) = __opcode_to_mem_thumb16(lower); | |
8dd47741 | 249 | break; |
b7493156 | 250 | #endif |
8dd47741 | 251 | |
1da177e4 LT |
252 | default: |
253 | printk(KERN_ERR "%s: unknown relocation: %u\n", | |
254 | module->name, ELF32_R_TYPE(rel->r_info)); | |
255 | return -ENOEXEC; | |
256 | } | |
257 | } | |
258 | return 0; | |
259 | } | |
260 | ||
8931360e RK |
261 | struct mod_unwind_map { |
262 | const Elf_Shdr *unw_sec; | |
263 | const Elf_Shdr *txt_sec; | |
264 | }; | |
265 | ||
4a9cb360 RK |
266 | static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr, |
267 | const Elf_Shdr *sechdrs, const char *name) | |
268 | { | |
269 | const Elf_Shdr *s, *se; | |
270 | const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; | |
271 | ||
272 | for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++) | |
273 | if (strcmp(name, secstrs + s->sh_name) == 0) | |
274 | return s; | |
275 | ||
276 | return NULL; | |
277 | } | |
278 | ||
dc21af99 | 279 | extern void fixup_pv_table(const void *, unsigned long); |
4a9cb360 RK |
280 | extern void fixup_smp(const void *, unsigned long); |
281 | ||
8931360e RK |
282 | int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs, |
283 | struct module *mod) | |
2e1926e7 | 284 | { |
dc21af99 | 285 | const Elf_Shdr *s = NULL; |
8931360e RK |
286 | #ifdef CONFIG_ARM_UNWIND |
287 | const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; | |
4a9cb360 | 288 | const Elf_Shdr *sechdrs_end = sechdrs + hdr->e_shnum; |
8931360e | 289 | struct mod_unwind_map maps[ARM_SEC_MAX]; |
e5f7772e | 290 | int i; |
8931360e RK |
291 | |
292 | memset(maps, 0, sizeof(maps)); | |
293 | ||
294 | for (s = sechdrs; s < sechdrs_end; s++) { | |
295 | const char *secname = secstrs + s->sh_name; | |
296 | ||
50005a8d RK |
297 | if (!(s->sh_flags & SHF_ALLOC)) |
298 | continue; | |
299 | ||
8931360e RK |
300 | if (strcmp(".ARM.exidx.init.text", secname) == 0) |
301 | maps[ARM_SEC_INIT].unw_sec = s; | |
8931360e RK |
302 | else if (strcmp(".ARM.exidx", secname) == 0) |
303 | maps[ARM_SEC_CORE].unw_sec = s; | |
304 | else if (strcmp(".ARM.exidx.exit.text", secname) == 0) | |
305 | maps[ARM_SEC_EXIT].unw_sec = s; | |
849b882b DA |
306 | else if (strcmp(".ARM.exidx.text.unlikely", secname) == 0) |
307 | maps[ARM_SEC_UNLIKELY].unw_sec = s; | |
308 | else if (strcmp(".ARM.exidx.text.hot", secname) == 0) | |
309 | maps[ARM_SEC_HOT].unw_sec = s; | |
8931360e RK |
310 | else if (strcmp(".init.text", secname) == 0) |
311 | maps[ARM_SEC_INIT].txt_sec = s; | |
8931360e RK |
312 | else if (strcmp(".text", secname) == 0) |
313 | maps[ARM_SEC_CORE].txt_sec = s; | |
314 | else if (strcmp(".exit.text", secname) == 0) | |
315 | maps[ARM_SEC_EXIT].txt_sec = s; | |
849b882b DA |
316 | else if (strcmp(".text.unlikely", secname) == 0) |
317 | maps[ARM_SEC_UNLIKELY].txt_sec = s; | |
318 | else if (strcmp(".text.hot", secname) == 0) | |
319 | maps[ARM_SEC_HOT].txt_sec = s; | |
e5f7772e | 320 | } |
2e1926e7 | 321 | |
8931360e RK |
322 | for (i = 0; i < ARM_SEC_MAX; i++) |
323 | if (maps[i].unw_sec && maps[i].txt_sec) | |
324 | mod->arch.unwind[i] = | |
325 | unwind_table_add(maps[i].unw_sec->sh_addr, | |
326 | maps[i].unw_sec->sh_size, | |
327 | maps[i].txt_sec->sh_addr, | |
328 | maps[i].txt_sec->sh_size); | |
dc21af99 RK |
329 | #endif |
330 | #ifdef CONFIG_ARM_PATCH_PHYS_VIRT | |
331 | s = find_mod_section(hdr, sechdrs, ".pv_table"); | |
332 | if (s) | |
333 | fixup_pv_table((void *)s->sh_addr, s->sh_size); | |
2e1926e7 | 334 | #endif |
4a9cb360 RK |
335 | s = find_mod_section(hdr, sechdrs, ".alt.smp.init"); |
336 | if (s && !is_smp()) | |
20feaab0 | 337 | #ifdef CONFIG_SMP_ON_UP |
4a9cb360 | 338 | fixup_smp((void *)s->sh_addr, s->sh_size); |
20feaab0 RK |
339 | #else |
340 | return -EINVAL; | |
341 | #endif | |
1da177e4 LT |
342 | return 0; |
343 | } | |
344 | ||
345 | void | |
346 | module_arch_cleanup(struct module *mod) | |
347 | { | |
8931360e RK |
348 | #ifdef CONFIG_ARM_UNWIND |
349 | int i; | |
350 | ||
351 | for (i = 0; i < ARM_SEC_MAX; i++) | |
352 | if (mod->arch.unwind[i]) | |
353 | unwind_table_del(mod->arch.unwind[i]); | |
354 | #endif | |
1da177e4 | 355 | } |