Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/kernel/module.c | |
3 | * | |
4 | * Copyright (C) 2002 Russell King. | |
6a570b28 | 5 | * Modified for nommu by Hyok S. Choi |
1da177e4 LT |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * Module allocation method suggested by Andi Kleen. | |
12 | */ | |
1da177e4 | 13 | #include <linux/module.h> |
f339ab3d | 14 | #include <linux/moduleloader.h> |
1da177e4 | 15 | #include <linux/kernel.h> |
27ac792c | 16 | #include <linux/mm.h> |
1da177e4 LT |
17 | #include <linux/elf.h> |
18 | #include <linux/vmalloc.h> | |
1da177e4 LT |
19 | #include <linux/fs.h> |
20 | #include <linux/string.h> | |
5a0e3ad6 | 21 | #include <linux/gfp.h> |
1da177e4 LT |
22 | |
23 | #include <asm/pgtable.h> | |
37efe642 | 24 | #include <asm/sections.h> |
4a9cb360 | 25 | #include <asm/smp_plat.h> |
2e1926e7 | 26 | #include <asm/unwind.h> |
f592d323 | 27 | #include <asm/opcodes.h> |
1da177e4 LT |
28 | |
29 | #ifdef CONFIG_XIP_KERNEL | |
30 | /* | |
31 | * The XIP kernel text is mapped in the module area for modules and | |
32 | * some other stuff to work without any indirect relocations. | |
ab4f2ee1 | 33 | * MODULES_VADDR is redefined here and not in asm/memory.h to avoid |
1da177e4 LT |
34 | * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off. |
35 | */ | |
ab4f2ee1 | 36 | #undef MODULES_VADDR |
e73fc88e | 37 | #define MODULES_VADDR (((unsigned long)_etext + ~PMD_MASK) & PMD_MASK) |
1da177e4 LT |
38 | #endif |
39 | ||
6a570b28 | 40 | #ifdef CONFIG_MMU |
1da177e4 LT |
41 | void *module_alloc(unsigned long size) |
42 | { | |
7d485f64 AB |
43 | void *p = __vmalloc_node_range(size, 1, MODULES_VADDR, MODULES_END, |
44 | GFP_KERNEL, PAGE_KERNEL_EXEC, 0, NUMA_NO_NODE, | |
45 | __builtin_return_address(0)); | |
46 | if (!IS_ENABLED(CONFIG_ARM_MODULE_PLTS) || p) | |
47 | return p; | |
48 | return __vmalloc_node_range(size, 1, VMALLOC_START, VMALLOC_END, | |
cb9e3c29 | 49 | GFP_KERNEL, PAGE_KERNEL_EXEC, 0, NUMA_NO_NODE, |
d0a21265 | 50 | __builtin_return_address(0)); |
1da177e4 | 51 | } |
66574cc0 | 52 | #endif |
1da177e4 LT |
53 | |
54 | int | |
55 | apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, | |
56 | unsigned int relindex, struct module *module) | |
57 | { | |
58 | Elf32_Shdr *symsec = sechdrs + symindex; | |
59 | Elf32_Shdr *relsec = sechdrs + relindex; | |
60 | Elf32_Shdr *dstsec = sechdrs + relsec->sh_info; | |
61 | Elf32_Rel *rel = (void *)relsec->sh_addr; | |
62 | unsigned int i; | |
63 | ||
64 | for (i = 0; i < relsec->sh_size / sizeof(Elf32_Rel); i++, rel++) { | |
65 | unsigned long loc; | |
66 | Elf32_Sym *sym; | |
68e6fad4 | 67 | const char *symname; |
1da177e4 | 68 | s32 offset; |
f592d323 | 69 | u32 tmp; |
b7493156 | 70 | #ifdef CONFIG_THUMB2_KERNEL |
adca6dc2 | 71 | u32 upper, lower, sign, j1, j2; |
b7493156 | 72 | #endif |
1da177e4 LT |
73 | |
74 | offset = ELF32_R_SYM(rel->r_info); | |
75 | if (offset < 0 || offset > (symsec->sh_size / sizeof(Elf32_Sym))) { | |
68e6fad4 | 76 | pr_err("%s: section %u reloc %u: bad relocation sym offset\n", |
1da177e4 LT |
77 | module->name, relindex, i); |
78 | return -ENOEXEC; | |
79 | } | |
80 | ||
81 | sym = ((Elf32_Sym *)symsec->sh_addr) + offset; | |
68e6fad4 | 82 | symname = strtab + sym->st_name; |
1da177e4 LT |
83 | |
84 | if (rel->r_offset < 0 || rel->r_offset > dstsec->sh_size - sizeof(u32)) { | |
68e6fad4 RK |
85 | pr_err("%s: section %u reloc %u sym '%s': out of bounds relocation, offset %d size %u\n", |
86 | module->name, relindex, i, symname, | |
87 | rel->r_offset, dstsec->sh_size); | |
1da177e4 LT |
88 | return -ENOEXEC; |
89 | } | |
90 | ||
91 | loc = dstsec->sh_addr + rel->r_offset; | |
92 | ||
93 | switch (ELF32_R_TYPE(rel->r_info)) { | |
2e1926e7 CM |
94 | case R_ARM_NONE: |
95 | /* ignore */ | |
96 | break; | |
97 | ||
1da177e4 | 98 | case R_ARM_ABS32: |
55f0fb6a | 99 | case R_ARM_TARGET1: |
1da177e4 LT |
100 | *(u32 *)loc += sym->st_value; |
101 | break; | |
102 | ||
103 | case R_ARM_PC24: | |
c2e26114 DJ |
104 | case R_ARM_CALL: |
105 | case R_ARM_JUMP24: | |
2b8514d0 AB |
106 | if (sym->st_value & 3) { |
107 | pr_err("%s: section %u reloc %u sym '%s': unsupported interworking call (ARM -> Thumb)\n", | |
108 | module->name, relindex, i, symname); | |
109 | return -ENOEXEC; | |
110 | } | |
111 | ||
f592d323 BD |
112 | offset = __mem_to_opcode_arm(*(u32 *)loc); |
113 | offset = (offset & 0x00ffffff) << 2; | |
1da177e4 LT |
114 | if (offset & 0x02000000) |
115 | offset -= 0x04000000; | |
116 | ||
117 | offset += sym->st_value - loc; | |
7d485f64 AB |
118 | |
119 | /* | |
120 | * Route through a PLT entry if 'offset' exceeds the | |
121 | * supported range. Note that 'offset + loc + 8' | |
122 | * contains the absolute jump target, i.e., | |
123 | * @sym + addend, corrected for the +8 PC bias. | |
124 | */ | |
125 | if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS) && | |
126 | (offset <= (s32)0xfe000000 || | |
127 | offset >= (s32)0x02000000)) | |
128 | offset = get_module_plt(module, loc, | |
129 | offset + loc + 8) | |
130 | - loc - 8; | |
131 | ||
2b8514d0 | 132 | if (offset <= (s32)0xfe000000 || |
c5f12503 | 133 | offset >= (s32)0x02000000) { |
68e6fad4 RK |
134 | pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n", |
135 | module->name, relindex, i, symname, | |
136 | ELF32_R_TYPE(rel->r_info), loc, | |
137 | sym->st_value); | |
1da177e4 LT |
138 | return -ENOEXEC; |
139 | } | |
140 | ||
141 | offset >>= 2; | |
f592d323 | 142 | offset &= 0x00ffffff; |
1da177e4 | 143 | |
f592d323 BD |
144 | *(u32 *)loc &= __opcode_to_mem_arm(0xff000000); |
145 | *(u32 *)loc |= __opcode_to_mem_arm(offset); | |
1da177e4 LT |
146 | break; |
147 | ||
4731f8b6 DS |
148 | case R_ARM_V4BX: |
149 | /* Preserve Rm and the condition code. Alter | |
150 | * other bits to re-code instruction as | |
151 | * MOV PC,Rm. | |
152 | */ | |
f592d323 BD |
153 | *(u32 *)loc &= __opcode_to_mem_arm(0xf000000f); |
154 | *(u32 *)loc |= __opcode_to_mem_arm(0x01a0f000); | |
4731f8b6 DS |
155 | break; |
156 | ||
2e1926e7 CM |
157 | case R_ARM_PREL31: |
158 | offset = *(u32 *)loc + sym->st_value - loc; | |
159 | *(u32 *)loc = offset & 0x7fffffff; | |
160 | break; | |
161 | ||
ae51e609 PG |
162 | case R_ARM_MOVW_ABS_NC: |
163 | case R_ARM_MOVT_ABS: | |
f592d323 | 164 | offset = tmp = __mem_to_opcode_arm(*(u32 *)loc); |
ae51e609 PG |
165 | offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff); |
166 | offset = (offset ^ 0x8000) - 0x8000; | |
167 | ||
168 | offset += sym->st_value; | |
169 | if (ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_ABS) | |
170 | offset >>= 16; | |
171 | ||
f592d323 BD |
172 | tmp &= 0xfff0f000; |
173 | tmp |= ((offset & 0xf000) << 4) | | |
174 | (offset & 0x0fff); | |
175 | ||
176 | *(u32 *)loc = __opcode_to_mem_arm(tmp); | |
ae51e609 PG |
177 | break; |
178 | ||
b7493156 | 179 | #ifdef CONFIG_THUMB2_KERNEL |
adca6dc2 CM |
180 | case R_ARM_THM_CALL: |
181 | case R_ARM_THM_JUMP24: | |
2b8514d0 AB |
182 | /* |
183 | * For function symbols, only Thumb addresses are | |
184 | * allowed (no interworking). | |
185 | * | |
186 | * For non-function symbols, the destination | |
187 | * has no specific ARM/Thumb disposition, so | |
188 | * the branch is resolved under the assumption | |
189 | * that interworking is not required. | |
190 | */ | |
191 | if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC && | |
192 | !(sym->st_value & 1)) { | |
193 | pr_err("%s: section %u reloc %u sym '%s': unsupported interworking call (Thumb -> ARM)\n", | |
194 | module->name, relindex, i, symname); | |
195 | return -ENOEXEC; | |
196 | } | |
197 | ||
f592d323 BD |
198 | upper = __mem_to_opcode_thumb16(*(u16 *)loc); |
199 | lower = __mem_to_opcode_thumb16(*(u16 *)(loc + 2)); | |
adca6dc2 CM |
200 | |
201 | /* | |
202 | * 25 bit signed address range (Thumb-2 BL and B.W | |
203 | * instructions): | |
204 | * S:I1:I2:imm10:imm11:0 | |
205 | * where: | |
206 | * S = upper[10] = offset[24] | |
207 | * I1 = ~(J1 ^ S) = offset[23] | |
208 | * I2 = ~(J2 ^ S) = offset[22] | |
209 | * imm10 = upper[9:0] = offset[21:12] | |
210 | * imm11 = lower[10:0] = offset[11:1] | |
211 | * J1 = lower[13] | |
212 | * J2 = lower[11] | |
213 | */ | |
214 | sign = (upper >> 10) & 1; | |
215 | j1 = (lower >> 13) & 1; | |
216 | j2 = (lower >> 11) & 1; | |
217 | offset = (sign << 24) | ((~(j1 ^ sign) & 1) << 23) | | |
218 | ((~(j2 ^ sign) & 1) << 22) | | |
219 | ((upper & 0x03ff) << 12) | | |
220 | ((lower & 0x07ff) << 1); | |
221 | if (offset & 0x01000000) | |
222 | offset -= 0x02000000; | |
223 | offset += sym->st_value - loc; | |
224 | ||
7d485f64 AB |
225 | /* |
226 | * Route through a PLT entry if 'offset' exceeds the | |
227 | * supported range. | |
228 | */ | |
229 | if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS) && | |
230 | (offset <= (s32)0xff000000 || | |
231 | offset >= (s32)0x01000000)) | |
232 | offset = get_module_plt(module, loc, | |
233 | offset + loc + 4) | |
234 | - loc - 4; | |
235 | ||
2b8514d0 | 236 | if (offset <= (s32)0xff000000 || |
adca6dc2 | 237 | offset >= (s32)0x01000000) { |
68e6fad4 RK |
238 | pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n", |
239 | module->name, relindex, i, symname, | |
240 | ELF32_R_TYPE(rel->r_info), loc, | |
241 | sym->st_value); | |
adca6dc2 CM |
242 | return -ENOEXEC; |
243 | } | |
244 | ||
245 | sign = (offset >> 24) & 1; | |
246 | j1 = sign ^ (~(offset >> 23) & 1); | |
247 | j2 = sign ^ (~(offset >> 22) & 1); | |
f592d323 | 248 | upper = (u16)((upper & 0xf800) | (sign << 10) | |
adca6dc2 | 249 | ((offset >> 12) & 0x03ff)); |
f592d323 BD |
250 | lower = (u16)((lower & 0xd000) | |
251 | (j1 << 13) | (j2 << 11) | | |
252 | ((offset >> 1) & 0x07ff)); | |
253 | ||
254 | *(u16 *)loc = __opcode_to_mem_thumb16(upper); | |
255 | *(u16 *)(loc + 2) = __opcode_to_mem_thumb16(lower); | |
adca6dc2 CM |
256 | break; |
257 | ||
8dd47741 CM |
258 | case R_ARM_THM_MOVW_ABS_NC: |
259 | case R_ARM_THM_MOVT_ABS: | |
f592d323 BD |
260 | upper = __mem_to_opcode_thumb16(*(u16 *)loc); |
261 | lower = __mem_to_opcode_thumb16(*(u16 *)(loc + 2)); | |
8dd47741 CM |
262 | |
263 | /* | |
264 | * MOVT/MOVW instructions encoding in Thumb-2: | |
265 | * | |
266 | * i = upper[10] | |
267 | * imm4 = upper[3:0] | |
268 | * imm3 = lower[14:12] | |
269 | * imm8 = lower[7:0] | |
270 | * | |
271 | * imm16 = imm4:i:imm3:imm8 | |
272 | */ | |
273 | offset = ((upper & 0x000f) << 12) | | |
274 | ((upper & 0x0400) << 1) | | |
275 | ((lower & 0x7000) >> 4) | (lower & 0x00ff); | |
276 | offset = (offset ^ 0x8000) - 0x8000; | |
277 | offset += sym->st_value; | |
278 | ||
279 | if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_ABS) | |
280 | offset >>= 16; | |
281 | ||
f592d323 BD |
282 | upper = (u16)((upper & 0xfbf0) | |
283 | ((offset & 0xf000) >> 12) | | |
284 | ((offset & 0x0800) >> 1)); | |
285 | lower = (u16)((lower & 0x8f00) | | |
286 | ((offset & 0x0700) << 4) | | |
287 | (offset & 0x00ff)); | |
288 | *(u16 *)loc = __opcode_to_mem_thumb16(upper); | |
289 | *(u16 *)(loc + 2) = __opcode_to_mem_thumb16(lower); | |
8dd47741 | 290 | break; |
b7493156 | 291 | #endif |
8dd47741 | 292 | |
1da177e4 | 293 | default: |
4ed89f22 | 294 | pr_err("%s: unknown relocation: %u\n", |
1da177e4 LT |
295 | module->name, ELF32_R_TYPE(rel->r_info)); |
296 | return -ENOEXEC; | |
297 | } | |
298 | } | |
299 | return 0; | |
300 | } | |
301 | ||
8931360e RK |
302 | struct mod_unwind_map { |
303 | const Elf_Shdr *unw_sec; | |
304 | const Elf_Shdr *txt_sec; | |
305 | }; | |
306 | ||
4a9cb360 RK |
307 | static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr, |
308 | const Elf_Shdr *sechdrs, const char *name) | |
309 | { | |
310 | const Elf_Shdr *s, *se; | |
311 | const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; | |
312 | ||
313 | for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++) | |
314 | if (strcmp(name, secstrs + s->sh_name) == 0) | |
315 | return s; | |
316 | ||
317 | return NULL; | |
318 | } | |
319 | ||
dc21af99 | 320 | extern void fixup_pv_table(const void *, unsigned long); |
4a9cb360 RK |
321 | extern void fixup_smp(const void *, unsigned long); |
322 | ||
8931360e RK |
323 | int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs, |
324 | struct module *mod) | |
2e1926e7 | 325 | { |
dc21af99 | 326 | const Elf_Shdr *s = NULL; |
8931360e RK |
327 | #ifdef CONFIG_ARM_UNWIND |
328 | const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; | |
4a9cb360 | 329 | const Elf_Shdr *sechdrs_end = sechdrs + hdr->e_shnum; |
8931360e | 330 | struct mod_unwind_map maps[ARM_SEC_MAX]; |
e5f7772e | 331 | int i; |
8931360e RK |
332 | |
333 | memset(maps, 0, sizeof(maps)); | |
334 | ||
335 | for (s = sechdrs; s < sechdrs_end; s++) { | |
336 | const char *secname = secstrs + s->sh_name; | |
337 | ||
50005a8d RK |
338 | if (!(s->sh_flags & SHF_ALLOC)) |
339 | continue; | |
340 | ||
8931360e RK |
341 | if (strcmp(".ARM.exidx.init.text", secname) == 0) |
342 | maps[ARM_SEC_INIT].unw_sec = s; | |
8931360e RK |
343 | else if (strcmp(".ARM.exidx", secname) == 0) |
344 | maps[ARM_SEC_CORE].unw_sec = s; | |
345 | else if (strcmp(".ARM.exidx.exit.text", secname) == 0) | |
346 | maps[ARM_SEC_EXIT].unw_sec = s; | |
849b882b DA |
347 | else if (strcmp(".ARM.exidx.text.unlikely", secname) == 0) |
348 | maps[ARM_SEC_UNLIKELY].unw_sec = s; | |
349 | else if (strcmp(".ARM.exidx.text.hot", secname) == 0) | |
350 | maps[ARM_SEC_HOT].unw_sec = s; | |
8931360e RK |
351 | else if (strcmp(".init.text", secname) == 0) |
352 | maps[ARM_SEC_INIT].txt_sec = s; | |
8931360e RK |
353 | else if (strcmp(".text", secname) == 0) |
354 | maps[ARM_SEC_CORE].txt_sec = s; | |
355 | else if (strcmp(".exit.text", secname) == 0) | |
356 | maps[ARM_SEC_EXIT].txt_sec = s; | |
849b882b DA |
357 | else if (strcmp(".text.unlikely", secname) == 0) |
358 | maps[ARM_SEC_UNLIKELY].txt_sec = s; | |
359 | else if (strcmp(".text.hot", secname) == 0) | |
360 | maps[ARM_SEC_HOT].txt_sec = s; | |
e5f7772e | 361 | } |
2e1926e7 | 362 | |
8931360e RK |
363 | for (i = 0; i < ARM_SEC_MAX; i++) |
364 | if (maps[i].unw_sec && maps[i].txt_sec) | |
365 | mod->arch.unwind[i] = | |
366 | unwind_table_add(maps[i].unw_sec->sh_addr, | |
367 | maps[i].unw_sec->sh_size, | |
368 | maps[i].txt_sec->sh_addr, | |
369 | maps[i].txt_sec->sh_size); | |
dc21af99 RK |
370 | #endif |
371 | #ifdef CONFIG_ARM_PATCH_PHYS_VIRT | |
372 | s = find_mod_section(hdr, sechdrs, ".pv_table"); | |
373 | if (s) | |
374 | fixup_pv_table((void *)s->sh_addr, s->sh_size); | |
2e1926e7 | 375 | #endif |
4a9cb360 RK |
376 | s = find_mod_section(hdr, sechdrs, ".alt.smp.init"); |
377 | if (s && !is_smp()) | |
20feaab0 | 378 | #ifdef CONFIG_SMP_ON_UP |
4a9cb360 | 379 | fixup_smp((void *)s->sh_addr, s->sh_size); |
20feaab0 RK |
380 | #else |
381 | return -EINVAL; | |
382 | #endif | |
1da177e4 LT |
383 | return 0; |
384 | } | |
385 | ||
386 | void | |
387 | module_arch_cleanup(struct module *mod) | |
388 | { | |
8931360e RK |
389 | #ifdef CONFIG_ARM_UNWIND |
390 | int i; | |
391 | ||
392 | for (i = 0; i < ARM_SEC_MAX; i++) | |
393 | if (mod->arch.unwind[i]) | |
394 | unwind_table_del(mod->arch.unwind[i]); | |
395 | #endif | |
1da177e4 | 396 | } |