ARM: 8559/1: errata: Workaround erratum A12 821420
[deliverable/linux.git] / arch / arm / kernel / process.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/arm/kernel/process.c
3 *
4 * Copyright (C) 1996-2000 Russell King - Converted to ARM.
5 * Original Copyright (C) 1995 Linus Torvalds
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <stdarg.h>
12
ecea4ab6 13#include <linux/export.h>
1da177e4
LT
14#include <linux/sched.h>
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/stddef.h>
18#include <linux/unistd.h>
1da177e4 19#include <linux/user.h>
1da177e4
LT
20#include <linux/interrupt.h>
21#include <linux/kallsyms.h>
22#include <linux/init.h>
84dff1a7 23#include <linux/elfcore.h>
74617fb6 24#include <linux/pm.h>
9e4559dd 25#include <linux/tick.h>
154c772e 26#include <linux/utsname.h>
33fa9b13 27#include <linux/uaccess.h>
990cb8ac 28#include <linux/random.h>
864232fa 29#include <linux/hw_breakpoint.h>
fa8bbb13 30#include <linux/leds.h>
1da177e4 31
1da177e4 32#include <asm/processor.h>
d6551e88 33#include <asm/thread_notify.h>
2d7c11bf 34#include <asm/stacktrace.h>
779dd959 35#include <asm/system_misc.h>
2ea83398 36#include <asm/mach/time.h>
a4780ade 37#include <asm/tls.h>
045ab94e 38#include <asm/vdso.h>
1da177e4 39
c743f380
NP
40#ifdef CONFIG_CC_STACKPROTECTOR
41#include <linux/stackprotector.h>
42unsigned long __stack_chk_guard __read_mostly;
43EXPORT_SYMBOL(__stack_chk_guard);
44#endif
45
e2e55fde 46static const char *processor_modes[] __maybe_unused = {
ae0a846e
RK
47 "USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" , "UK4_26" , "UK5_26" , "UK6_26" , "UK7_26" ,
48 "UK8_26" , "UK9_26" , "UK10_26", "UK11_26", "UK12_26", "UK13_26", "UK14_26", "UK15_26",
f3a04202
SB
49 "USER_32", "FIQ_32" , "IRQ_32" , "SVC_32" , "UK4_32" , "UK5_32" , "MON_32" , "ABT_32" ,
50 "UK8_32" , "UK9_32" , "HYP_32", "UND_32" , "UK12_32", "UK13_32", "UK14_32", "SYS_32"
ae0a846e
RK
51};
52
e2e55fde 53static const char *isa_modes[] __maybe_unused = {
909d6c6c
GD
54 "ARM" , "Thumb" , "Jazelle", "ThumbEE"
55};
56
1da177e4 57/*
4fa20439 58 * This is our default idle handler.
1da177e4 59 */
4fa20439
NP
60
61void (*arm_pm_idle)(void);
62
ad68cc7a
NP
63/*
64 * Called from the core idle loop.
65 */
66
67void arch_cpu_idle(void)
1da177e4 68{
4fa20439
NP
69 if (arm_pm_idle)
70 arm_pm_idle();
71 else
ae940913 72 cpu_do_idle();
9ccdac36 73 local_irq_enable();
1da177e4
LT
74}
75
f7b861b7 76void arch_cpu_idle_prepare(void)
1da177e4
LT
77{
78 local_fiq_enable();
f7b861b7 79}
1da177e4 80
f7b861b7
TG
81void arch_cpu_idle_enter(void)
82{
83 ledtrig_cpu(CPU_LED_IDLE_START);
84#ifdef CONFIG_PL310_ERRATA_769419
85 wmb();
a054a811 86#endif
f7b861b7 87}
a054a811 88
f7b861b7
TG
89void arch_cpu_idle_exit(void)
90{
91 ledtrig_cpu(CPU_LED_IDLE_END);
92}
93
652a12ef 94void __show_regs(struct pt_regs *regs)
1da177e4 95{
154c772e
RK
96 unsigned long flags;
97 char buf[64];
77f1b959 98#ifndef CONFIG_CPU_V7M
e6978e4b 99 unsigned int domain, fs;
77f1b959
RK
100#ifdef CONFIG_CPU_SW_DOMAIN_PAN
101 /*
102 * Get the domain register for the parent context. In user
103 * mode, we don't save the DACR, so lets use what it should
104 * be. For other modes, we place it after the pt_regs struct.
105 */
e6978e4b 106 if (user_mode(regs)) {
77f1b959 107 domain = DACR_UACCESS_ENABLE;
e6978e4b
RK
108 fs = get_fs();
109 } else {
5fa9da50 110 domain = to_svc_pt_regs(regs)->dacr;
e6978e4b
RK
111 fs = to_svc_pt_regs(regs)->addr_limit;
112 }
77f1b959
RK
113#else
114 domain = get_domain();
e6978e4b 115 fs = get_fs();
77f1b959
RK
116#endif
117#endif
1da177e4 118
a43cb95d
TH
119 show_regs_print_info(KERN_DEFAULT);
120
1da177e4
LT
121 print_symbol("PC is at %s\n", instruction_pointer(regs));
122 print_symbol("LR is at %s\n", regs->ARM_lr);
154c772e 123 printk("pc : [<%08lx>] lr : [<%08lx>] psr: %08lx\n"
1da177e4 124 "sp : %08lx ip : %08lx fp : %08lx\n",
154c772e
RK
125 regs->ARM_pc, regs->ARM_lr, regs->ARM_cpsr,
126 regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
1da177e4
LT
127 printk("r10: %08lx r9 : %08lx r8 : %08lx\n",
128 regs->ARM_r10, regs->ARM_r9,
129 regs->ARM_r8);
130 printk("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
131 regs->ARM_r7, regs->ARM_r6,
132 regs->ARM_r5, regs->ARM_r4);
133 printk("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
134 regs->ARM_r3, regs->ARM_r2,
135 regs->ARM_r1, regs->ARM_r0);
154c772e
RK
136
137 flags = regs->ARM_cpsr;
138 buf[0] = flags & PSR_N_BIT ? 'N' : 'n';
139 buf[1] = flags & PSR_Z_BIT ? 'Z' : 'z';
140 buf[2] = flags & PSR_C_BIT ? 'C' : 'c';
141 buf[3] = flags & PSR_V_BIT ? 'V' : 'v';
142 buf[4] = '\0';
143
e2e55fde 144#ifndef CONFIG_CPU_V7M
a5e090ac 145 {
a5e090ac
RK
146 const char *segment;
147
a5e090ac
RK
148 if ((domain & domain_mask(DOMAIN_USER)) ==
149 domain_val(DOMAIN_USER, DOMAIN_NOACCESS))
150 segment = "none";
e6978e4b 151 else if (fs == get_ds())
a5e090ac
RK
152 segment = "kernel";
153 else
154 segment = "user";
155
156 printk("Flags: %s IRQs o%s FIQs o%s Mode %s ISA %s Segment %s\n",
157 buf, interrupts_enabled(regs) ? "n" : "ff",
158 fast_interrupts_enabled(regs) ? "n" : "ff",
159 processor_modes[processor_mode(regs)],
160 isa_modes[isa_mode(regs)], segment);
161 }
e2e55fde
UKK
162#else
163 printk("xPSR: %08lx\n", regs->ARM_cpsr);
164#endif
165
154c772e 166#ifdef CONFIG_CPU_CP15
1da177e4 167 {
f12d0d7c 168 unsigned int ctrl;
154c772e
RK
169
170 buf[0] = '\0';
f12d0d7c 171#ifdef CONFIG_CPU_CP15_MMU
154c772e 172 {
77f1b959 173 unsigned int transbase;
154c772e 174 asm("mrc p15, 0, %0, c2, c0\n\t"
1eef5d2f 175 : "=r" (transbase));
154c772e 176 snprintf(buf, sizeof(buf), " Table: %08x DAC: %08x",
77f1b959 177 transbase, domain);
154c772e 178 }
f12d0d7c 179#endif
154c772e
RK
180 asm("mrc p15, 0, %0, c1, c0\n" : "=r" (ctrl));
181
182 printk("Control: %08x%s\n", ctrl, buf);
183 }
f12d0d7c 184#endif
1da177e4
LT
185}
186
652a12ef
RK
187void show_regs(struct pt_regs * regs)
188{
652a12ef 189 __show_regs(regs);
b380ab4f 190 dump_stack();
652a12ef
RK
191}
192
797245f5
RK
193ATOMIC_NOTIFIER_HEAD(thread_notify_head);
194
195EXPORT_SYMBOL_GPL(thread_notify_head);
196
1da177e4
LT
197/*
198 * Free current thread data structures etc..
199 */
e6464694 200void exit_thread(struct task_struct *tsk)
1da177e4 201{
e6464694 202 thread_notify(THREAD_NOTIFY_EXIT, task_thread_info(tsk));
1da177e4
LT
203}
204
1da177e4
LT
205void flush_thread(void)
206{
207 struct thread_info *thread = current_thread_info();
208 struct task_struct *tsk = current;
209
864232fa
WD
210 flush_ptrace_hw_breakpoint(tsk);
211
1da177e4
LT
212 memset(thread->used_cp, 0, sizeof(thread->used_cp));
213 memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
d6551e88
RK
214 memset(&thread->fpstate, 0, sizeof(union fp_state));
215
fbfb872f
NL
216 flush_tls();
217
d6551e88 218 thread_notify(THREAD_NOTIFY_FLUSH, thread);
1da177e4
LT
219}
220
221void release_thread(struct task_struct *dead_task)
222{
1da177e4
LT
223}
224
225asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
226
227int
6f2c55b8 228copy_thread(unsigned long clone_flags, unsigned long stack_start,
afa86fc4 229 unsigned long stk_sz, struct task_struct *p)
1da177e4 230{
815d5ec8
AV
231 struct thread_info *thread = task_thread_info(p);
232 struct pt_regs *childregs = task_pt_regs(p);
1da177e4 233
1da177e4 234 memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save));
9e14f828 235
af4cb25d 236#ifdef CONFIG_CPU_USE_DOMAINS
1eef5d2f
RK
237 /*
238 * Copy the initial value of the domain access control register
239 * from the current thread: thread->addr_limit will have been
240 * copied from the current thread via setup_thread_stack() in
241 * kernel/fork.c
242 */
243 thread->cpu_domain = get_domain();
af4cb25d 244#endif
1eef5d2f 245
38a61b6b
AV
246 if (likely(!(p->flags & PF_KTHREAD))) {
247 *childregs = *current_pt_regs();
9e14f828 248 childregs->ARM_r0 = 0;
38a61b6b
AV
249 if (stack_start)
250 childregs->ARM_sp = stack_start;
9e14f828 251 } else {
9fff2fa0 252 memset(childregs, 0, sizeof(struct pt_regs));
9e14f828
AV
253 thread->cpu_context.r4 = stk_sz;
254 thread->cpu_context.r5 = stack_start;
9e14f828
AV
255 childregs->ARM_cpsr = SVC_MODE;
256 }
9fff2fa0 257 thread->cpu_context.pc = (unsigned long)ret_from_fork;
1da177e4 258 thread->cpu_context.sp = (unsigned long)childregs;
1da177e4 259
864232fa
WD
260 clear_ptrace_hw_breakpoint(p);
261
1da177e4 262 if (clone_flags & CLONE_SETTLS)
a4780ade
AH
263 thread->tp_value[0] = childregs->ARM_r3;
264 thread->tp_value[1] = get_tpuser();
1da177e4 265
2e82669a
CM
266 thread_notify(THREAD_NOTIFY_COPY, thread);
267
1da177e4
LT
268 return 0;
269}
270
cde3f860
AB
271/*
272 * Fill in the task's elfregs structure for a core dump.
273 */
274int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs)
275{
276 elf_core_copy_regs(elfregs, task_pt_regs(t));
277 return 1;
278}
279
1da177e4
LT
280/*
281 * fill in the fpe structure for a core dump...
282 */
283int dump_fpu (struct pt_regs *regs, struct user_fp *fp)
284{
285 struct thread_info *thread = current_thread_info();
286 int used_math = thread->used_cp[1] | thread->used_cp[2];
287
288 if (used_math)
289 memcpy(fp, &thread->fpstate.soft, sizeof (*fp));
290
291 return used_math != 0;
292}
293EXPORT_SYMBOL(dump_fpu);
294
1da177e4
LT
295unsigned long get_wchan(struct task_struct *p)
296{
2d7c11bf 297 struct stackframe frame;
1b15ec7a 298 unsigned long stack_page;
1da177e4
LT
299 int count = 0;
300 if (!p || p == current || p->state == TASK_RUNNING)
301 return 0;
302
2d7c11bf
CM
303 frame.fp = thread_saved_fp(p);
304 frame.sp = thread_saved_sp(p);
305 frame.lr = 0; /* recovered from the stack */
306 frame.pc = thread_saved_pc(p);
1b15ec7a 307 stack_page = (unsigned long)task_stack_page(p);
1da177e4 308 do {
1b15ec7a
KK
309 if (frame.sp < stack_page ||
310 frame.sp >= stack_page + THREAD_SIZE ||
311 unwind_frame(&frame) < 0)
1da177e4 312 return 0;
2d7c11bf
CM
313 if (!in_sched_functions(frame.pc))
314 return frame.pc;
1da177e4
LT
315 } while (count ++ < 16);
316 return 0;
317}
990cb8ac
NP
318
319unsigned long arch_randomize_brk(struct mm_struct *mm)
320{
321 unsigned long range_end = mm->brk + 0x02000000;
322 return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
323}
ec706dab 324
6cde6d42 325#ifdef CONFIG_MMU
a5463cd3 326#ifdef CONFIG_KUSER_HELPERS
ec706dab
NP
327/*
328 * The vectors page is always readable from user space for the
48be69a0
RK
329 * atomic helpers. Insert it into the gate_vma so that it is visible
330 * through ptrace and /proc/<pid>/mem.
ec706dab 331 */
f6604efe
RK
332static struct vm_area_struct gate_vma = {
333 .vm_start = 0xffff0000,
334 .vm_end = 0xffff0000 + PAGE_SIZE,
335 .vm_flags = VM_READ | VM_EXEC | VM_MAYREAD | VM_MAYEXEC,
f6604efe 336};
ec706dab 337
f9d4861f 338static int __init gate_vma_init(void)
ec706dab 339{
f6604efe 340 gate_vma.vm_page_prot = PAGE_READONLY_EXEC;
f9d4861f
WD
341 return 0;
342}
343arch_initcall(gate_vma_init);
344
345struct vm_area_struct *get_gate_vma(struct mm_struct *mm)
346{
347 return &gate_vma;
348}
349
350int in_gate_area(struct mm_struct *mm, unsigned long addr)
351{
352 return (addr >= gate_vma.vm_start) && (addr < gate_vma.vm_end);
353}
354
355int in_gate_area_no_mm(unsigned long addr)
356{
357 return in_gate_area(NULL, addr);
ec706dab 358}
1d0bbf42 359#define is_gate_vma(vma) ((vma) == &gate_vma)
a5463cd3
RK
360#else
361#define is_gate_vma(vma) 0
362#endif
ec706dab
NP
363
364const char *arch_vma_name(struct vm_area_struct *vma)
365{
02e0409a 366 return is_gate_vma(vma) ? "[vectors]" : NULL;
48be69a0
RK
367}
368
389522b0 369/* If possible, provide a placement hint at a random offset from the
ecf99a43 370 * stack for the sigpage and vdso pages.
389522b0
NL
371 */
372static unsigned long sigpage_addr(const struct mm_struct *mm,
373 unsigned int npages)
374{
375 unsigned long offset;
376 unsigned long first;
377 unsigned long last;
378 unsigned long addr;
379 unsigned int slots;
380
381 first = PAGE_ALIGN(mm->start_stack);
382
383 last = TASK_SIZE - (npages << PAGE_SHIFT);
384
385 /* No room after stack? */
386 if (first > last)
387 return 0;
388
389 /* Just enough room? */
390 if (first == last)
391 return first;
392
393 slots = ((last - first) >> PAGE_SHIFT) + 1;
394
395 offset = get_random_int() % slots;
396
397 addr = first + (offset << PAGE_SHIFT);
398
399 return addr;
48be69a0
RK
400}
401
e0d40756 402static struct page *signal_page;
48be69a0
RK
403extern struct page *get_signal_page(void);
404
02e0409a
NL
405static const struct vm_special_mapping sigpage_mapping = {
406 .name = "[sigpage]",
407 .pages = &signal_page,
408};
409
48be69a0
RK
410int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
411{
412 struct mm_struct *mm = current->mm;
02e0409a 413 struct vm_area_struct *vma;
ecf99a43 414 unsigned long npages;
48be69a0 415 unsigned long addr;
389522b0 416 unsigned long hint;
02e0409a 417 int ret = 0;
48be69a0 418
e0d40756
RK
419 if (!signal_page)
420 signal_page = get_signal_page();
421 if (!signal_page)
48be69a0
RK
422 return -ENOMEM;
423
ecf99a43
NL
424 npages = 1; /* for sigpage */
425 npages += vdso_total_pages;
426
69048176
MH
427 if (down_write_killable(&mm->mmap_sem))
428 return -EINTR;
ecf99a43
NL
429 hint = sigpage_addr(mm, npages);
430 addr = get_unmapped_area(NULL, hint, npages << PAGE_SHIFT, 0, 0);
48be69a0
RK
431 if (IS_ERR_VALUE(addr)) {
432 ret = addr;
433 goto up_fail;
434 }
435
02e0409a 436 vma = _install_special_mapping(mm, addr, PAGE_SIZE,
48be69a0 437 VM_READ | VM_EXEC | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC,
02e0409a
NL
438 &sigpage_mapping);
439
440 if (IS_ERR(vma)) {
441 ret = PTR_ERR(vma);
442 goto up_fail;
443 }
48be69a0 444
02e0409a 445 mm->context.sigpage = addr;
48be69a0 446
ecf99a43
NL
447 /* Unlike the sigpage, failure to install the vdso is unlikely
448 * to be fatal to the process, so no error check needed
449 * here.
450 */
451 arm_install_vdso(mm, addr + PAGE_SIZE);
452
48be69a0
RK
453 up_fail:
454 up_write(&mm->mmap_sem);
455 return ret;
ec706dab 456}
6cde6d42 457#endif
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