reboot: arm: change reboot_mode to use enum reboot_mode
[deliverable/linux.git] / arch / arm / kernel / process.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/arm/kernel/process.c
3 *
4 * Copyright (C) 1996-2000 Russell King - Converted to ARM.
5 * Original Copyright (C) 1995 Linus Torvalds
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <stdarg.h>
12
ecea4ab6 13#include <linux/export.h>
1da177e4
LT
14#include <linux/sched.h>
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/stddef.h>
18#include <linux/unistd.h>
1da177e4 19#include <linux/user.h>
1da177e4
LT
20#include <linux/delay.h>
21#include <linux/reboot.h>
22#include <linux/interrupt.h>
23#include <linux/kallsyms.h>
24#include <linux/init.h>
a054a811 25#include <linux/cpu.h>
84dff1a7 26#include <linux/elfcore.h>
74617fb6 27#include <linux/pm.h>
9e4559dd 28#include <linux/tick.h>
154c772e 29#include <linux/utsname.h>
33fa9b13 30#include <linux/uaccess.h>
990cb8ac 31#include <linux/random.h>
864232fa 32#include <linux/hw_breakpoint.h>
a0bfa137 33#include <linux/cpuidle.h>
fa8bbb13 34#include <linux/leds.h>
7b6d864b 35#include <linux/reboot.h>
1da177e4 36
9ca03a21 37#include <asm/cacheflush.h>
9ecb47de 38#include <asm/idmap.h>
1da177e4 39#include <asm/processor.h>
d6551e88 40#include <asm/thread_notify.h>
2d7c11bf 41#include <asm/stacktrace.h>
2ea83398 42#include <asm/mach/time.h>
a4780ade 43#include <asm/tls.h>
1da177e4 44
c743f380
NP
45#ifdef CONFIG_CC_STACKPROTECTOR
46#include <linux/stackprotector.h>
47unsigned long __stack_chk_guard __read_mostly;
48EXPORT_SYMBOL(__stack_chk_guard);
49#endif
50
ae0a846e
RK
51static const char *processor_modes[] = {
52 "USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" , "UK4_26" , "UK5_26" , "UK6_26" , "UK7_26" ,
53 "UK8_26" , "UK9_26" , "UK10_26", "UK11_26", "UK12_26", "UK13_26", "UK14_26", "UK15_26",
54 "USER_32", "FIQ_32" , "IRQ_32" , "SVC_32" , "UK4_32" , "UK5_32" , "UK6_32" , "ABT_32" ,
55 "UK8_32" , "UK9_32" , "UK10_32", "UND_32" , "UK12_32", "UK13_32", "UK14_32", "SYS_32"
56};
57
909d6c6c
GD
58static const char *isa_modes[] = {
59 "ARM" , "Thumb" , "Jazelle", "ThumbEE"
60};
61
290130a1
WD
62extern void call_with_stack(void (*fn)(void *), void *arg, void *sp);
63typedef void (*phys_reset_t)(unsigned long);
64
65/*
66 * A temporary stack to use for CPU reset. This is static so that we
67 * don't clobber it with the identity mapping. When running with this
68 * stack, any references to the current task *will not work* so you
69 * should really do as little as possible before jumping to your reset
70 * code.
71 */
72static u64 soft_restart_stack[16];
73
74static void __soft_restart(void *addr)
74617fb6 75{
290130a1 76 phys_reset_t phys_reset;
74617fb6 77
290130a1 78 /* Take out a flat memory mapping. */
5aafec15 79 setup_mm_for_reboot();
74617fb6 80
9ca03a21
RK
81 /* Clean and invalidate caches */
82 flush_cache_all();
83
84 /* Turn off caching */
85 cpu_proc_fin();
86
87 /* Push out any further dirty data, and ensure cache is empty */
88 flush_cache_all();
89
290130a1
WD
90 /* Switch to the identity mapping. */
91 phys_reset = (phys_reset_t)(unsigned long)virt_to_phys(cpu_reset);
92 phys_reset((unsigned long)addr);
74617fb6 93
290130a1
WD
94 /* Should never get here. */
95 BUG();
96}
97
98void soft_restart(unsigned long addr)
99{
100 u64 *stack = soft_restart_stack + ARRAY_SIZE(soft_restart_stack);
101
102 /* Disable interrupts first */
103 local_irq_disable();
104 local_fiq_disable();
105
106 /* Disable the L2 if we're the last man standing. */
107 if (num_online_cpus() == 1)
108 outer_disable();
109
110 /* Change to the new stack and continue with the reset. */
111 call_with_stack(__soft_restart, (void *)addr, (void *)stack);
112
113 /* Should never get here. */
114 BUG();
e879c862
RK
115}
116
7b6d864b 117static void null_restart(enum reboot_mode reboot_mode, const char *cmd)
e879c862 118{
74617fb6
RP
119}
120
1da177e4 121/*
74617fb6 122 * Function pointers to optional machine specific functions
1da177e4 123 */
1da177e4
LT
124void (*pm_power_off)(void);
125EXPORT_SYMBOL(pm_power_off);
126
7b6d864b 127void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd) = null_restart;
74617fb6
RP
128EXPORT_SYMBOL_GPL(arm_pm_restart);
129
1da177e4 130/*
4fa20439 131 * This is our default idle handler.
1da177e4 132 */
4fa20439
NP
133
134void (*arm_pm_idle)(void);
135
84dff1a7 136static void default_idle(void)
1da177e4 137{
4fa20439
NP
138 if (arm_pm_idle)
139 arm_pm_idle();
140 else
ae940913 141 cpu_do_idle();
9ccdac36 142 local_irq_enable();
1da177e4
LT
143}
144
f7b861b7 145void arch_cpu_idle_prepare(void)
1da177e4
LT
146{
147 local_fiq_enable();
f7b861b7 148}
1da177e4 149
f7b861b7
TG
150void arch_cpu_idle_enter(void)
151{
152 ledtrig_cpu(CPU_LED_IDLE_START);
153#ifdef CONFIG_PL310_ERRATA_769419
154 wmb();
a054a811 155#endif
f7b861b7 156}
a054a811 157
f7b861b7
TG
158void arch_cpu_idle_exit(void)
159{
160 ledtrig_cpu(CPU_LED_IDLE_END);
161}
162
163#ifdef CONFIG_HOTPLUG_CPU
164void arch_cpu_idle_dead(void)
165{
166 cpu_die();
167}
11ed0ba1 168#endif
f7b861b7
TG
169
170/*
171 * Called from the core idle loop.
172 */
173void arch_cpu_idle(void)
174{
175 if (cpuidle_idle_call())
176 default_idle();
1da177e4
LT
177}
178
16d6d5b0 179enum reboot_mode reboot_mode = REBOOT_HARD;
1da177e4 180
16d6d5b0 181static int __init reboot_setup(char *str)
1da177e4 182{
16d6d5b0
RH
183 if ('s' == str[0])
184 reboot_mode = REBOOT_SOFT;
1da177e4
LT
185 return 1;
186}
1da177e4
LT
187__setup("reboot=", reboot_setup);
188
19ab428f
SW
189/*
190 * Called by kexec, immediately prior to machine_kexec().
191 *
192 * This must completely disable all secondary CPUs; simply causing those CPUs
193 * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
194 * kexec'd kernel to use any and all RAM as it sees fit, without having to
195 * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
196 * functionality embodied in disable_nonboot_cpus() to achieve this.
197 */
3d3f78d7 198void machine_shutdown(void)
1da177e4 199{
19ab428f 200 disable_nonboot_cpus();
1da177e4
LT
201}
202
19ab428f
SW
203/*
204 * Halting simply requires that the secondary CPUs stop performing any
205 * activity (executing tasks, handling interrupts). smp_send_stop()
206 * achieves this.
207 */
3d3f78d7
RK
208void machine_halt(void)
209{
19ab428f
SW
210 smp_send_stop();
211
98bd8b96 212 local_irq_disable();
3d3f78d7
RK
213 while (1);
214}
1da177e4 215
19ab428f
SW
216/*
217 * Power-off simply requires that the secondary CPUs stop performing any
218 * activity (executing tasks, handling interrupts). smp_send_stop()
219 * achieves this. When the system power is turned off, it will take all CPUs
220 * with it.
221 */
1da177e4
LT
222void machine_power_off(void)
223{
19ab428f
SW
224 smp_send_stop();
225
1da177e4
LT
226 if (pm_power_off)
227 pm_power_off();
228}
229
19ab428f
SW
230/*
231 * Restart requires that the secondary CPUs stop performing any activity
232 * while the primary CPU resets the system. Systems with a single CPU can
233 * use soft_restart() as their machine descriptor's .restart hook, since that
234 * will cause the only available CPU to reset. Systems with multiple CPUs must
235 * provide a HW restart implementation, to ensure that all CPUs reset at once.
236 * This is required so that any code running after reset on the primary CPU
237 * doesn't have to co-ordinate with other CPUs to ensure they aren't still
238 * executing pre-reset code, and using RAM that the primary CPU's code wishes
239 * to use. Implementing such co-ordination would be essentially impossible.
240 */
be093beb 241void machine_restart(char *cmd)
1da177e4 242{
19ab428f 243 smp_send_stop();
ac15e00b 244
be093beb 245 arm_pm_restart(reboot_mode, cmd);
ac15e00b
RK
246
247 /* Give a grace period for failure to restart of 1s */
248 mdelay(1000);
249
250 /* Whoops - the platform was unable to reboot. Tell the user! */
251 printk("Reboot failed -- System halted\n");
98bd8b96 252 local_irq_disable();
ac15e00b 253 while (1);
1da177e4
LT
254}
255
652a12ef 256void __show_regs(struct pt_regs *regs)
1da177e4 257{
154c772e
RK
258 unsigned long flags;
259 char buf[64];
1da177e4 260
a43cb95d
TH
261 show_regs_print_info(KERN_DEFAULT);
262
1da177e4
LT
263 print_symbol("PC is at %s\n", instruction_pointer(regs));
264 print_symbol("LR is at %s\n", regs->ARM_lr);
154c772e 265 printk("pc : [<%08lx>] lr : [<%08lx>] psr: %08lx\n"
1da177e4 266 "sp : %08lx ip : %08lx fp : %08lx\n",
154c772e
RK
267 regs->ARM_pc, regs->ARM_lr, regs->ARM_cpsr,
268 regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
1da177e4
LT
269 printk("r10: %08lx r9 : %08lx r8 : %08lx\n",
270 regs->ARM_r10, regs->ARM_r9,
271 regs->ARM_r8);
272 printk("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
273 regs->ARM_r7, regs->ARM_r6,
274 regs->ARM_r5, regs->ARM_r4);
275 printk("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
276 regs->ARM_r3, regs->ARM_r2,
277 regs->ARM_r1, regs->ARM_r0);
154c772e
RK
278
279 flags = regs->ARM_cpsr;
280 buf[0] = flags & PSR_N_BIT ? 'N' : 'n';
281 buf[1] = flags & PSR_Z_BIT ? 'Z' : 'z';
282 buf[2] = flags & PSR_C_BIT ? 'C' : 'c';
283 buf[3] = flags & PSR_V_BIT ? 'V' : 'v';
284 buf[4] = '\0';
285
909d6c6c 286 printk("Flags: %s IRQs o%s FIQs o%s Mode %s ISA %s Segment %s\n",
154c772e 287 buf, interrupts_enabled(regs) ? "n" : "ff",
1da177e4
LT
288 fast_interrupts_enabled(regs) ? "n" : "ff",
289 processor_modes[processor_mode(regs)],
909d6c6c 290 isa_modes[isa_mode(regs)],
1da177e4 291 get_fs() == get_ds() ? "kernel" : "user");
154c772e 292#ifdef CONFIG_CPU_CP15
1da177e4 293 {
f12d0d7c 294 unsigned int ctrl;
154c772e
RK
295
296 buf[0] = '\0';
f12d0d7c 297#ifdef CONFIG_CPU_CP15_MMU
154c772e
RK
298 {
299 unsigned int transbase, dac;
300 asm("mrc p15, 0, %0, c2, c0\n\t"
301 "mrc p15, 0, %1, c3, c0\n"
302 : "=r" (transbase), "=r" (dac));
303 snprintf(buf, sizeof(buf), " Table: %08x DAC: %08x",
304 transbase, dac);
305 }
f12d0d7c 306#endif
154c772e
RK
307 asm("mrc p15, 0, %0, c1, c0\n" : "=r" (ctrl));
308
309 printk("Control: %08x%s\n", ctrl, buf);
310 }
f12d0d7c 311#endif
1da177e4
LT
312}
313
652a12ef
RK
314void show_regs(struct pt_regs * regs)
315{
316 printk("\n");
652a12ef 317 __show_regs(regs);
b380ab4f 318 dump_stack();
652a12ef
RK
319}
320
797245f5
RK
321ATOMIC_NOTIFIER_HEAD(thread_notify_head);
322
323EXPORT_SYMBOL_GPL(thread_notify_head);
324
1da177e4
LT
325/*
326 * Free current thread data structures etc..
327 */
328void exit_thread(void)
329{
797245f5 330 thread_notify(THREAD_NOTIFY_EXIT, current_thread_info());
1da177e4
LT
331}
332
1da177e4
LT
333void flush_thread(void)
334{
335 struct thread_info *thread = current_thread_info();
336 struct task_struct *tsk = current;
337
864232fa
WD
338 flush_ptrace_hw_breakpoint(tsk);
339
1da177e4
LT
340 memset(thread->used_cp, 0, sizeof(thread->used_cp));
341 memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
d6551e88
RK
342 memset(&thread->fpstate, 0, sizeof(union fp_state));
343
344 thread_notify(THREAD_NOTIFY_FLUSH, thread);
1da177e4
LT
345}
346
347void release_thread(struct task_struct *dead_task)
348{
1da177e4
LT
349}
350
351asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
352
353int
6f2c55b8 354copy_thread(unsigned long clone_flags, unsigned long stack_start,
afa86fc4 355 unsigned long stk_sz, struct task_struct *p)
1da177e4 356{
815d5ec8
AV
357 struct thread_info *thread = task_thread_info(p);
358 struct pt_regs *childregs = task_pt_regs(p);
1da177e4 359
1da177e4 360 memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save));
9e14f828 361
38a61b6b
AV
362 if (likely(!(p->flags & PF_KTHREAD))) {
363 *childregs = *current_pt_regs();
9e14f828 364 childregs->ARM_r0 = 0;
38a61b6b
AV
365 if (stack_start)
366 childregs->ARM_sp = stack_start;
9e14f828 367 } else {
9fff2fa0 368 memset(childregs, 0, sizeof(struct pt_regs));
9e14f828
AV
369 thread->cpu_context.r4 = stk_sz;
370 thread->cpu_context.r5 = stack_start;
9e14f828
AV
371 childregs->ARM_cpsr = SVC_MODE;
372 }
9fff2fa0 373 thread->cpu_context.pc = (unsigned long)ret_from_fork;
1da177e4 374 thread->cpu_context.sp = (unsigned long)childregs;
1da177e4 375
864232fa
WD
376 clear_ptrace_hw_breakpoint(p);
377
1da177e4 378 if (clone_flags & CLONE_SETTLS)
a4780ade
AH
379 thread->tp_value[0] = childregs->ARM_r3;
380 thread->tp_value[1] = get_tpuser();
1da177e4 381
2e82669a
CM
382 thread_notify(THREAD_NOTIFY_COPY, thread);
383
1da177e4
LT
384 return 0;
385}
386
cde3f860
AB
387/*
388 * Fill in the task's elfregs structure for a core dump.
389 */
390int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs)
391{
392 elf_core_copy_regs(elfregs, task_pt_regs(t));
393 return 1;
394}
395
1da177e4
LT
396/*
397 * fill in the fpe structure for a core dump...
398 */
399int dump_fpu (struct pt_regs *regs, struct user_fp *fp)
400{
401 struct thread_info *thread = current_thread_info();
402 int used_math = thread->used_cp[1] | thread->used_cp[2];
403
404 if (used_math)
405 memcpy(fp, &thread->fpstate.soft, sizeof (*fp));
406
407 return used_math != 0;
408}
409EXPORT_SYMBOL(dump_fpu);
410
1da177e4
LT
411unsigned long get_wchan(struct task_struct *p)
412{
2d7c11bf 413 struct stackframe frame;
1da177e4
LT
414 int count = 0;
415 if (!p || p == current || p->state == TASK_RUNNING)
416 return 0;
417
2d7c11bf
CM
418 frame.fp = thread_saved_fp(p);
419 frame.sp = thread_saved_sp(p);
420 frame.lr = 0; /* recovered from the stack */
421 frame.pc = thread_saved_pc(p);
1da177e4 422 do {
2d7c11bf
CM
423 int ret = unwind_frame(&frame);
424 if (ret < 0)
1da177e4 425 return 0;
2d7c11bf
CM
426 if (!in_sched_functions(frame.pc))
427 return frame.pc;
1da177e4
LT
428 } while (count ++ < 16);
429 return 0;
430}
990cb8ac
NP
431
432unsigned long arch_randomize_brk(struct mm_struct *mm)
433{
434 unsigned long range_end = mm->brk + 0x02000000;
435 return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
436}
ec706dab 437
6cde6d42 438#ifdef CONFIG_MMU
ec706dab
NP
439/*
440 * The vectors page is always readable from user space for the
f9d4861f
WD
441 * atomic helpers and the signal restart code. Insert it into the
442 * gate_vma so that it is visible through ptrace and /proc/<pid>/mem.
ec706dab 443 */
f6604efe
RK
444static struct vm_area_struct gate_vma = {
445 .vm_start = 0xffff0000,
446 .vm_end = 0xffff0000 + PAGE_SIZE,
447 .vm_flags = VM_READ | VM_EXEC | VM_MAYREAD | VM_MAYEXEC,
f6604efe 448};
ec706dab 449
f9d4861f 450static int __init gate_vma_init(void)
ec706dab 451{
f6604efe 452 gate_vma.vm_page_prot = PAGE_READONLY_EXEC;
f9d4861f
WD
453 return 0;
454}
455arch_initcall(gate_vma_init);
456
457struct vm_area_struct *get_gate_vma(struct mm_struct *mm)
458{
459 return &gate_vma;
460}
461
462int in_gate_area(struct mm_struct *mm, unsigned long addr)
463{
464 return (addr >= gate_vma.vm_start) && (addr < gate_vma.vm_end);
465}
466
467int in_gate_area_no_mm(unsigned long addr)
468{
469 return in_gate_area(NULL, addr);
ec706dab
NP
470}
471
472const char *arch_vma_name(struct vm_area_struct *vma)
473{
f9d4861f 474 return (vma == &gate_vma) ? "[vectors]" : NULL;
ec706dab 475}
6cde6d42 476#endif
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