ARM: 7573/1: idmap: use flush_cache_louis() and flush TLBs only when necessary
[deliverable/linux.git] / arch / arm / kernel / process.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/arm/kernel/process.c
3 *
4 * Copyright (C) 1996-2000 Russell King - Converted to ARM.
5 * Original Copyright (C) 1995 Linus Torvalds
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <stdarg.h>
12
ecea4ab6 13#include <linux/export.h>
1da177e4
LT
14#include <linux/sched.h>
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/stddef.h>
18#include <linux/unistd.h>
1da177e4 19#include <linux/user.h>
1da177e4
LT
20#include <linux/delay.h>
21#include <linux/reboot.h>
22#include <linux/interrupt.h>
23#include <linux/kallsyms.h>
24#include <linux/init.h>
a054a811 25#include <linux/cpu.h>
84dff1a7 26#include <linux/elfcore.h>
74617fb6 27#include <linux/pm.h>
9e4559dd 28#include <linux/tick.h>
154c772e 29#include <linux/utsname.h>
33fa9b13 30#include <linux/uaccess.h>
990cb8ac 31#include <linux/random.h>
864232fa 32#include <linux/hw_breakpoint.h>
a0bfa137 33#include <linux/cpuidle.h>
fa8bbb13 34#include <linux/leds.h>
1da177e4 35
9ca03a21 36#include <asm/cacheflush.h>
1da177e4 37#include <asm/processor.h>
d6551e88 38#include <asm/thread_notify.h>
2d7c11bf 39#include <asm/stacktrace.h>
2ea83398 40#include <asm/mach/time.h>
1da177e4 41
c743f380
NP
42#ifdef CONFIG_CC_STACKPROTECTOR
43#include <linux/stackprotector.h>
44unsigned long __stack_chk_guard __read_mostly;
45EXPORT_SYMBOL(__stack_chk_guard);
46#endif
47
ae0a846e
RK
48static const char *processor_modes[] = {
49 "USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" , "UK4_26" , "UK5_26" , "UK6_26" , "UK7_26" ,
50 "UK8_26" , "UK9_26" , "UK10_26", "UK11_26", "UK12_26", "UK13_26", "UK14_26", "UK15_26",
51 "USER_32", "FIQ_32" , "IRQ_32" , "SVC_32" , "UK4_32" , "UK5_32" , "UK6_32" , "ABT_32" ,
52 "UK8_32" , "UK9_32" , "UK10_32", "UND_32" , "UK12_32", "UK13_32", "UK14_32", "SYS_32"
53};
54
909d6c6c
GD
55static const char *isa_modes[] = {
56 "ARM" , "Thumb" , "Jazelle", "ThumbEE"
57};
58
5aafec15 59extern void setup_mm_for_reboot(void);
1da177e4
LT
60
61static volatile int hlt_counter;
62
1da177e4
LT
63void disable_hlt(void)
64{
65 hlt_counter++;
66}
67
68EXPORT_SYMBOL(disable_hlt);
69
70void enable_hlt(void)
71{
72 hlt_counter--;
871df85a 73 BUG_ON(hlt_counter < 0);
1da177e4
LT
74}
75
76EXPORT_SYMBOL(enable_hlt);
77
78static int __init nohlt_setup(char *__unused)
79{
80 hlt_counter = 1;
81 return 1;
82}
83
84static int __init hlt_setup(char *__unused)
85{
86 hlt_counter = 0;
87 return 1;
88}
89
90__setup("nohlt", nohlt_setup);
91__setup("hlt", hlt_setup);
92
290130a1
WD
93extern void call_with_stack(void (*fn)(void *), void *arg, void *sp);
94typedef void (*phys_reset_t)(unsigned long);
95
96/*
97 * A temporary stack to use for CPU reset. This is static so that we
98 * don't clobber it with the identity mapping. When running with this
99 * stack, any references to the current task *will not work* so you
100 * should really do as little as possible before jumping to your reset
101 * code.
102 */
103static u64 soft_restart_stack[16];
104
105static void __soft_restart(void *addr)
74617fb6 106{
290130a1 107 phys_reset_t phys_reset;
74617fb6 108
290130a1 109 /* Take out a flat memory mapping. */
5aafec15 110 setup_mm_for_reboot();
74617fb6 111
9ca03a21
RK
112 /* Clean and invalidate caches */
113 flush_cache_all();
114
115 /* Turn off caching */
116 cpu_proc_fin();
117
118 /* Push out any further dirty data, and ensure cache is empty */
119 flush_cache_all();
120
290130a1
WD
121 /* Switch to the identity mapping. */
122 phys_reset = (phys_reset_t)(unsigned long)virt_to_phys(cpu_reset);
123 phys_reset((unsigned long)addr);
74617fb6 124
290130a1
WD
125 /* Should never get here. */
126 BUG();
127}
128
129void soft_restart(unsigned long addr)
130{
131 u64 *stack = soft_restart_stack + ARRAY_SIZE(soft_restart_stack);
132
133 /* Disable interrupts first */
134 local_irq_disable();
135 local_fiq_disable();
136
137 /* Disable the L2 if we're the last man standing. */
138 if (num_online_cpus() == 1)
139 outer_disable();
140
141 /* Change to the new stack and continue with the reset. */
142 call_with_stack(__soft_restart, (void *)addr, (void *)stack);
143
144 /* Should never get here. */
145 BUG();
e879c862
RK
146}
147
f88b8979 148static void null_restart(char mode, const char *cmd)
e879c862 149{
74617fb6
RP
150}
151
1da177e4 152/*
74617fb6 153 * Function pointers to optional machine specific functions
1da177e4 154 */
1da177e4
LT
155void (*pm_power_off)(void);
156EXPORT_SYMBOL(pm_power_off);
157
f88b8979 158void (*arm_pm_restart)(char str, const char *cmd) = null_restart;
74617fb6
RP
159EXPORT_SYMBOL_GPL(arm_pm_restart);
160
1da177e4 161/*
4fa20439 162 * This is our default idle handler.
1da177e4 163 */
4fa20439
NP
164
165void (*arm_pm_idle)(void);
166
84dff1a7 167static void default_idle(void)
1da177e4 168{
4fa20439
NP
169 if (arm_pm_idle)
170 arm_pm_idle();
171 else
ae940913 172 cpu_do_idle();
9ccdac36 173 local_irq_enable();
1da177e4
LT
174}
175
9ccdac36
RK
176void (*pm_idle)(void) = default_idle;
177EXPORT_SYMBOL(pm_idle);
178
1da177e4 179/*
9ccdac36
RK
180 * The idle thread, has rather strange semantics for calling pm_idle,
181 * but this is what x86 does and we need to do the same, so that
182 * things like cpuidle get called in the same way. The only difference
183 * is that we always respect 'hlt_counter' to prevent low power idle.
1da177e4
LT
184 */
185void cpu_idle(void)
186{
187 local_fiq_enable();
188
189 /* endless idle loop with no priority at all */
190 while (1) {
1268fbc7
FW
191 tick_nohz_idle_enter();
192 rcu_idle_enter();
fa8bbb13 193 ledtrig_cpu(CPU_LED_IDLE_START);
9ccdac36 194 while (!need_resched()) {
a054a811 195#ifdef CONFIG_HOTPLUG_CPU
9ccdac36
RK
196 if (cpu_is_offline(smp_processor_id()))
197 cpu_die();
a054a811
RK
198#endif
199
4fa20439
NP
200 /*
201 * We need to disable interrupts here
202 * to ensure we don't miss a wakeup call.
203 */
9ccdac36 204 local_irq_disable();
11ed0ba1
WD
205#ifdef CONFIG_PL310_ERRATA_769419
206 wmb();
207#endif
9ccdac36
RK
208 if (hlt_counter) {
209 local_irq_enable();
210 cpu_relax();
4fa20439 211 } else if (!need_resched()) {
9ccdac36 212 stop_critical_timings();
cbc158d6 213 if (cpuidle_idle_call())
a0bfa137 214 pm_idle();
9ccdac36
RK
215 start_critical_timings();
216 /*
4fa20439
NP
217 * pm_idle functions must always
218 * return with IRQs enabled.
9ccdac36
RK
219 */
220 WARN_ON(irqs_disabled());
4fa20439 221 } else
9ccdac36 222 local_irq_enable();
9ccdac36 223 }
fa8bbb13 224 ledtrig_cpu(CPU_LED_IDLE_END);
1268fbc7
FW
225 rcu_idle_exit();
226 tick_nohz_idle_exit();
bd2f5536 227 schedule_preempt_disabled();
1da177e4
LT
228 }
229}
230
231static char reboot_mode = 'h';
232
233int __init reboot_setup(char *str)
234{
235 reboot_mode = str[0];
236 return 1;
237}
238
239__setup("reboot=", reboot_setup);
240
3d3f78d7 241void machine_shutdown(void)
1da177e4 242{
3d3f78d7
RK
243#ifdef CONFIG_SMP
244 smp_send_stop();
245#endif
1da177e4
LT
246}
247
3d3f78d7
RK
248void machine_halt(void)
249{
250 machine_shutdown();
98bd8b96 251 local_irq_disable();
3d3f78d7
RK
252 while (1);
253}
1da177e4
LT
254
255void machine_power_off(void)
256{
3d3f78d7 257 machine_shutdown();
1da177e4
LT
258 if (pm_power_off)
259 pm_power_off();
260}
261
be093beb 262void machine_restart(char *cmd)
1da177e4 263{
3d3f78d7 264 machine_shutdown();
ac15e00b 265
be093beb 266 arm_pm_restart(reboot_mode, cmd);
ac15e00b
RK
267
268 /* Give a grace period for failure to restart of 1s */
269 mdelay(1000);
270
271 /* Whoops - the platform was unable to reboot. Tell the user! */
272 printk("Reboot failed -- System halted\n");
98bd8b96 273 local_irq_disable();
ac15e00b 274 while (1);
1da177e4
LT
275}
276
652a12ef 277void __show_regs(struct pt_regs *regs)
1da177e4 278{
154c772e
RK
279 unsigned long flags;
280 char buf[64];
1da177e4 281
154c772e 282 printk("CPU: %d %s (%s %.*s)\n",
22325525
RV
283 raw_smp_processor_id(), print_tainted(),
284 init_utsname()->release,
154c772e
RK
285 (int)strcspn(init_utsname()->version, " "),
286 init_utsname()->version);
1da177e4
LT
287 print_symbol("PC is at %s\n", instruction_pointer(regs));
288 print_symbol("LR is at %s\n", regs->ARM_lr);
154c772e 289 printk("pc : [<%08lx>] lr : [<%08lx>] psr: %08lx\n"
1da177e4 290 "sp : %08lx ip : %08lx fp : %08lx\n",
154c772e
RK
291 regs->ARM_pc, regs->ARM_lr, regs->ARM_cpsr,
292 regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
1da177e4
LT
293 printk("r10: %08lx r9 : %08lx r8 : %08lx\n",
294 regs->ARM_r10, regs->ARM_r9,
295 regs->ARM_r8);
296 printk("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
297 regs->ARM_r7, regs->ARM_r6,
298 regs->ARM_r5, regs->ARM_r4);
299 printk("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
300 regs->ARM_r3, regs->ARM_r2,
301 regs->ARM_r1, regs->ARM_r0);
154c772e
RK
302
303 flags = regs->ARM_cpsr;
304 buf[0] = flags & PSR_N_BIT ? 'N' : 'n';
305 buf[1] = flags & PSR_Z_BIT ? 'Z' : 'z';
306 buf[2] = flags & PSR_C_BIT ? 'C' : 'c';
307 buf[3] = flags & PSR_V_BIT ? 'V' : 'v';
308 buf[4] = '\0';
309
909d6c6c 310 printk("Flags: %s IRQs o%s FIQs o%s Mode %s ISA %s Segment %s\n",
154c772e 311 buf, interrupts_enabled(regs) ? "n" : "ff",
1da177e4
LT
312 fast_interrupts_enabled(regs) ? "n" : "ff",
313 processor_modes[processor_mode(regs)],
909d6c6c 314 isa_modes[isa_mode(regs)],
1da177e4 315 get_fs() == get_ds() ? "kernel" : "user");
154c772e 316#ifdef CONFIG_CPU_CP15
1da177e4 317 {
f12d0d7c 318 unsigned int ctrl;
154c772e
RK
319
320 buf[0] = '\0';
f12d0d7c 321#ifdef CONFIG_CPU_CP15_MMU
154c772e
RK
322 {
323 unsigned int transbase, dac;
324 asm("mrc p15, 0, %0, c2, c0\n\t"
325 "mrc p15, 0, %1, c3, c0\n"
326 : "=r" (transbase), "=r" (dac));
327 snprintf(buf, sizeof(buf), " Table: %08x DAC: %08x",
328 transbase, dac);
329 }
f12d0d7c 330#endif
154c772e
RK
331 asm("mrc p15, 0, %0, c1, c0\n" : "=r" (ctrl));
332
333 printk("Control: %08x%s\n", ctrl, buf);
334 }
f12d0d7c 335#endif
1da177e4
LT
336}
337
652a12ef
RK
338void show_regs(struct pt_regs * regs)
339{
340 printk("\n");
19c5870c 341 printk("Pid: %d, comm: %20s\n", task_pid_nr(current), current->comm);
652a12ef 342 __show_regs(regs);
b380ab4f 343 dump_stack();
652a12ef
RK
344}
345
797245f5
RK
346ATOMIC_NOTIFIER_HEAD(thread_notify_head);
347
348EXPORT_SYMBOL_GPL(thread_notify_head);
349
1da177e4
LT
350/*
351 * Free current thread data structures etc..
352 */
353void exit_thread(void)
354{
797245f5 355 thread_notify(THREAD_NOTIFY_EXIT, current_thread_info());
1da177e4
LT
356}
357
1da177e4
LT
358void flush_thread(void)
359{
360 struct thread_info *thread = current_thread_info();
361 struct task_struct *tsk = current;
362
864232fa
WD
363 flush_ptrace_hw_breakpoint(tsk);
364
1da177e4
LT
365 memset(thread->used_cp, 0, sizeof(thread->used_cp));
366 memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
d6551e88
RK
367 memset(&thread->fpstate, 0, sizeof(union fp_state));
368
369 thread_notify(THREAD_NOTIFY_FLUSH, thread);
1da177e4
LT
370}
371
372void release_thread(struct task_struct *dead_task)
373{
1da177e4
LT
374}
375
376asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
377
378int
6f2c55b8 379copy_thread(unsigned long clone_flags, unsigned long stack_start,
1da177e4
LT
380 unsigned long stk_sz, struct task_struct *p, struct pt_regs *regs)
381{
815d5ec8
AV
382 struct thread_info *thread = task_thread_info(p);
383 struct pt_regs *childregs = task_pt_regs(p);
1da177e4 384
1da177e4 385 memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save));
9e14f828
AV
386
387 if (likely(regs)) {
388 *childregs = *regs;
389 childregs->ARM_r0 = 0;
390 childregs->ARM_sp = stack_start;
9e14f828 391 } else {
9fff2fa0 392 memset(childregs, 0, sizeof(struct pt_regs));
9e14f828
AV
393 thread->cpu_context.r4 = stk_sz;
394 thread->cpu_context.r5 = stack_start;
9e14f828
AV
395 childregs->ARM_cpsr = SVC_MODE;
396 }
9fff2fa0 397 thread->cpu_context.pc = (unsigned long)ret_from_fork;
1da177e4 398 thread->cpu_context.sp = (unsigned long)childregs;
1da177e4 399
864232fa
WD
400 clear_ptrace_hw_breakpoint(p);
401
1da177e4
LT
402 if (clone_flags & CLONE_SETTLS)
403 thread->tp_value = regs->ARM_r3;
404
2e82669a
CM
405 thread_notify(THREAD_NOTIFY_COPY, thread);
406
1da177e4
LT
407 return 0;
408}
409
cde3f860
AB
410/*
411 * Fill in the task's elfregs structure for a core dump.
412 */
413int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs)
414{
415 elf_core_copy_regs(elfregs, task_pt_regs(t));
416 return 1;
417}
418
1da177e4
LT
419/*
420 * fill in the fpe structure for a core dump...
421 */
422int dump_fpu (struct pt_regs *regs, struct user_fp *fp)
423{
424 struct thread_info *thread = current_thread_info();
425 int used_math = thread->used_cp[1] | thread->used_cp[2];
426
427 if (used_math)
428 memcpy(fp, &thread->fpstate.soft, sizeof (*fp));
429
430 return used_math != 0;
431}
432EXPORT_SYMBOL(dump_fpu);
433
1da177e4
LT
434unsigned long get_wchan(struct task_struct *p)
435{
2d7c11bf 436 struct stackframe frame;
1da177e4
LT
437 int count = 0;
438 if (!p || p == current || p->state == TASK_RUNNING)
439 return 0;
440
2d7c11bf
CM
441 frame.fp = thread_saved_fp(p);
442 frame.sp = thread_saved_sp(p);
443 frame.lr = 0; /* recovered from the stack */
444 frame.pc = thread_saved_pc(p);
1da177e4 445 do {
2d7c11bf
CM
446 int ret = unwind_frame(&frame);
447 if (ret < 0)
1da177e4 448 return 0;
2d7c11bf
CM
449 if (!in_sched_functions(frame.pc))
450 return frame.pc;
1da177e4
LT
451 } while (count ++ < 16);
452 return 0;
453}
990cb8ac
NP
454
455unsigned long arch_randomize_brk(struct mm_struct *mm)
456{
457 unsigned long range_end = mm->brk + 0x02000000;
458 return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
459}
ec706dab 460
6cde6d42 461#ifdef CONFIG_MMU
ec706dab
NP
462/*
463 * The vectors page is always readable from user space for the
f9d4861f
WD
464 * atomic helpers and the signal restart code. Insert it into the
465 * gate_vma so that it is visible through ptrace and /proc/<pid>/mem.
ec706dab 466 */
f9d4861f 467static struct vm_area_struct gate_vma;
ec706dab 468
f9d4861f 469static int __init gate_vma_init(void)
ec706dab 470{
f9d4861f
WD
471 gate_vma.vm_start = 0xffff0000;
472 gate_vma.vm_end = 0xffff0000 + PAGE_SIZE;
473 gate_vma.vm_page_prot = PAGE_READONLY_EXEC;
474 gate_vma.vm_flags = VM_READ | VM_EXEC |
12679a2d 475 VM_MAYREAD | VM_MAYEXEC;
f9d4861f
WD
476 return 0;
477}
478arch_initcall(gate_vma_init);
479
480struct vm_area_struct *get_gate_vma(struct mm_struct *mm)
481{
482 return &gate_vma;
483}
484
485int in_gate_area(struct mm_struct *mm, unsigned long addr)
486{
487 return (addr >= gate_vma.vm_start) && (addr < gate_vma.vm_end);
488}
489
490int in_gate_area_no_mm(unsigned long addr)
491{
492 return in_gate_area(NULL, addr);
ec706dab
NP
493}
494
495const char *arch_vma_name(struct vm_area_struct *vma)
496{
f9d4861f 497 return (vma == &gate_vma) ? "[vectors]" : NULL;
ec706dab 498}
6cde6d42 499#endif
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