[ARM] 4227/1: minor head.S fixups
[deliverable/linux.git] / arch / arm / kernel / ptrace.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/arm/kernel/ptrace.c
3 *
4 * By Ross Biro 1/23/92
5 * edited by Linus Torvalds
6 * ARM modifications Copyright (C) 2000 Russell King
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
1da177e4
LT
12#include <linux/kernel.h>
13#include <linux/sched.h>
14#include <linux/mm.h>
15#include <linux/smp.h>
16#include <linux/smp_lock.h>
17#include <linux/ptrace.h>
18#include <linux/user.h>
19#include <linux/security.h>
20#include <linux/init.h>
7ed20e1a 21#include <linux/signal.h>
1da177e4
LT
22
23#include <asm/uaccess.h>
24#include <asm/pgtable.h>
25#include <asm/system.h>
26#include <asm/traps.h>
27
28#include "ptrace.h"
29
30#define REG_PC 15
31#define REG_PSR 16
32/*
33 * does not yet catch signals sent when the child dies.
34 * in exit.c or in signal.c.
35 */
36
37#if 0
38/*
39 * Breakpoint SWI instruction: SWI &9F0001
40 */
41#define BREAKINST_ARM 0xef9f0001
42#define BREAKINST_THUMB 0xdf00 /* fill this in later */
43#else
44/*
45 * New breakpoints - use an undefined instruction. The ARM architecture
46 * reference manual guarantees that the following instruction space
47 * will produce an undefined instruction exception on all CPUs:
48 *
49 * ARM: xxxx 0111 1111 xxxx xxxx xxxx 1111 xxxx
50 * Thumb: 1101 1110 xxxx xxxx
51 */
52#define BREAKINST_ARM 0xe7f001f0
53#define BREAKINST_THUMB 0xde01
54#endif
55
1da177e4
LT
56/*
57 * this routine will get a word off of the processes privileged stack.
58 * the offset is how far from the base addr as stored in the THREAD.
59 * this routine assumes that all the privileged stacks are in our
60 * data space.
61 */
62static inline long get_user_reg(struct task_struct *task, int offset)
63{
815d5ec8 64 return task_pt_regs(task)->uregs[offset];
1da177e4
LT
65}
66
67/*
68 * this routine will put a word on the processes privileged stack.
69 * the offset is how far from the base addr as stored in the THREAD.
70 * this routine assumes that all the privileged stacks are in our
71 * data space.
72 */
73static inline int
74put_user_reg(struct task_struct *task, int offset, long data)
75{
815d5ec8 76 struct pt_regs newregs, *regs = task_pt_regs(task);
1da177e4
LT
77 int ret = -EINVAL;
78
79 newregs = *regs;
80 newregs.uregs[offset] = data;
81
82 if (valid_user_regs(&newregs)) {
83 regs->uregs[offset] = data;
84 ret = 0;
85 }
86
87 return ret;
88}
89
90static inline int
91read_u32(struct task_struct *task, unsigned long addr, u32 *res)
92{
93 int ret;
94
95 ret = access_process_vm(task, addr, res, sizeof(*res), 0);
96
97 return ret == sizeof(*res) ? 0 : -EIO;
98}
99
100static inline int
101read_instr(struct task_struct *task, unsigned long addr, u32 *res)
102{
103 int ret;
104
105 if (addr & 1) {
106 u16 val;
107 ret = access_process_vm(task, addr & ~1, &val, sizeof(val), 0);
108 ret = ret == sizeof(val) ? 0 : -EIO;
109 *res = val;
110 } else {
111 u32 val;
112 ret = access_process_vm(task, addr & ~3, &val, sizeof(val), 0);
113 ret = ret == sizeof(val) ? 0 : -EIO;
114 *res = val;
115 }
116 return ret;
117}
118
119/*
120 * Get value of register `rn' (in the instruction)
121 */
122static unsigned long
123ptrace_getrn(struct task_struct *child, unsigned long insn)
124{
125 unsigned int reg = (insn >> 16) & 15;
126 unsigned long val;
127
128 val = get_user_reg(child, reg);
129 if (reg == 15)
130 val = pc_pointer(val + 8);
131
132 return val;
133}
134
135/*
136 * Get value of operand 2 (in an ALU instruction)
137 */
138static unsigned long
139ptrace_getaluop2(struct task_struct *child, unsigned long insn)
140{
141 unsigned long val;
142 int shift;
143 int type;
144
145 if (insn & 1 << 25) {
146 val = insn & 255;
147 shift = (insn >> 8) & 15;
148 type = 3;
149 } else {
150 val = get_user_reg (child, insn & 15);
151
152 if (insn & (1 << 4))
153 shift = (int)get_user_reg (child, (insn >> 8) & 15);
154 else
155 shift = (insn >> 7) & 31;
156
157 type = (insn >> 5) & 3;
158 }
159
160 switch (type) {
161 case 0: val <<= shift; break;
162 case 1: val >>= shift; break;
163 case 2:
164 val = (((signed long)val) >> shift);
165 break;
166 case 3:
167 val = (val >> shift) | (val << (32 - shift));
168 break;
169 }
170 return val;
171}
172
173/*
174 * Get value of operand 2 (in a LDR instruction)
175 */
176static unsigned long
177ptrace_getldrop2(struct task_struct *child, unsigned long insn)
178{
179 unsigned long val;
180 int shift;
181 int type;
182
183 val = get_user_reg(child, insn & 15);
184 shift = (insn >> 7) & 31;
185 type = (insn >> 5) & 3;
186
187 switch (type) {
188 case 0: val <<= shift; break;
189 case 1: val >>= shift; break;
190 case 2:
191 val = (((signed long)val) >> shift);
192 break;
193 case 3:
194 val = (val >> shift) | (val << (32 - shift));
195 break;
196 }
197 return val;
198}
199
200#define OP_MASK 0x01e00000
201#define OP_AND 0x00000000
202#define OP_EOR 0x00200000
203#define OP_SUB 0x00400000
204#define OP_RSB 0x00600000
205#define OP_ADD 0x00800000
206#define OP_ADC 0x00a00000
207#define OP_SBC 0x00c00000
208#define OP_RSC 0x00e00000
209#define OP_ORR 0x01800000
210#define OP_MOV 0x01a00000
211#define OP_BIC 0x01c00000
212#define OP_MVN 0x01e00000
213
214static unsigned long
215get_branch_address(struct task_struct *child, unsigned long pc, unsigned long insn)
216{
217 u32 alt = 0;
218
219 switch (insn & 0x0e000000) {
220 case 0x00000000:
221 case 0x02000000: {
222 /*
223 * data processing
224 */
225 long aluop1, aluop2, ccbit;
226
22f975f4
NV
227 if ((insn & 0x0fffffd0) == 0x012fff10) {
228 /*
229 * bx or blx
230 */
231 alt = get_user_reg(child, insn & 15);
232 break;
233 }
234
235
1da177e4
LT
236 if ((insn & 0xf000) != 0xf000)
237 break;
238
239 aluop1 = ptrace_getrn(child, insn);
240 aluop2 = ptrace_getaluop2(child, insn);
241 ccbit = get_user_reg(child, REG_PSR) & PSR_C_BIT ? 1 : 0;
242
243 switch (insn & OP_MASK) {
244 case OP_AND: alt = aluop1 & aluop2; break;
245 case OP_EOR: alt = aluop1 ^ aluop2; break;
246 case OP_SUB: alt = aluop1 - aluop2; break;
247 case OP_RSB: alt = aluop2 - aluop1; break;
248 case OP_ADD: alt = aluop1 + aluop2; break;
249 case OP_ADC: alt = aluop1 + aluop2 + ccbit; break;
250 case OP_SBC: alt = aluop1 - aluop2 + ccbit; break;
251 case OP_RSC: alt = aluop2 - aluop1 + ccbit; break;
252 case OP_ORR: alt = aluop1 | aluop2; break;
253 case OP_MOV: alt = aluop2; break;
254 case OP_BIC: alt = aluop1 & ~aluop2; break;
255 case OP_MVN: alt = ~aluop2; break;
256 }
257 break;
258 }
259
260 case 0x04000000:
261 case 0x06000000:
262 /*
263 * ldr
264 */
265 if ((insn & 0x0010f000) == 0x0010f000) {
266 unsigned long base;
267
268 base = ptrace_getrn(child, insn);
269 if (insn & 1 << 24) {
270 long aluop2;
271
272 if (insn & 0x02000000)
273 aluop2 = ptrace_getldrop2(child, insn);
274 else
275 aluop2 = insn & 0xfff;
276
277 if (insn & 1 << 23)
278 base += aluop2;
279 else
280 base -= aluop2;
281 }
282 if (read_u32(child, base, &alt) == 0)
283 alt = pc_pointer(alt);
284 }
285 break;
286
287 case 0x08000000:
288 /*
289 * ldm
290 */
291 if ((insn & 0x00108000) == 0x00108000) {
292 unsigned long base;
293 unsigned int nr_regs;
294
295 if (insn & (1 << 23)) {
296 nr_regs = hweight16(insn & 65535) << 2;
297
298 if (!(insn & (1 << 24)))
299 nr_regs -= 4;
300 } else {
301 if (insn & (1 << 24))
302 nr_regs = -4;
303 else
304 nr_regs = 0;
305 }
306
307 base = ptrace_getrn(child, insn);
308
309 if (read_u32(child, base + nr_regs, &alt) == 0)
310 alt = pc_pointer(alt);
311 break;
312 }
313 break;
314
315 case 0x0a000000: {
316 /*
317 * bl or b
318 */
319 signed long displ;
320 /* It's a branch/branch link: instead of trying to
321 * figure out whether the branch will be taken or not,
322 * we'll put a breakpoint at both locations. This is
323 * simpler, more reliable, and probably not a whole lot
324 * slower than the alternative approach of emulating the
325 * branch.
326 */
327 displ = (insn & 0x00ffffff) << 8;
328 displ = (displ >> 6) + 8;
329 if (displ != 0 && displ != 4)
330 alt = pc + displ;
331 }
332 break;
333 }
334
335 return alt;
336}
337
338static int
339swap_insn(struct task_struct *task, unsigned long addr,
340 void *old_insn, void *new_insn, int size)
341{
342 int ret;
343
344 ret = access_process_vm(task, addr, old_insn, size, 0);
345 if (ret == size)
346 ret = access_process_vm(task, addr, new_insn, size, 1);
347 return ret;
348}
349
350static void
351add_breakpoint(struct task_struct *task, struct debug_info *dbg, unsigned long addr)
352{
353 int nr = dbg->nsaved;
354
355 if (nr < 2) {
356 u32 new_insn = BREAKINST_ARM;
357 int res;
358
359 res = swap_insn(task, addr, &dbg->bp[nr].insn, &new_insn, 4);
360
361 if (res == 4) {
362 dbg->bp[nr].address = addr;
363 dbg->nsaved += 1;
364 }
365 } else
366 printk(KERN_ERR "ptrace: too many breakpoints\n");
367}
368
369/*
370 * Clear one breakpoint in the user program. We copy what the hardware
371 * does and use bit 0 of the address to indicate whether this is a Thumb
372 * breakpoint or an ARM breakpoint.
373 */
374static void clear_breakpoint(struct task_struct *task, struct debug_entry *bp)
375{
376 unsigned long addr = bp->address;
377 union debug_insn old_insn;
378 int ret;
379
380 if (addr & 1) {
381 ret = swap_insn(task, addr & ~1, &old_insn.thumb,
382 &bp->insn.thumb, 2);
383
384 if (ret != 2 || old_insn.thumb != BREAKINST_THUMB)
385 printk(KERN_ERR "%s:%d: corrupted Thumb breakpoint at "
386 "0x%08lx (0x%04x)\n", task->comm, task->pid,
387 addr, old_insn.thumb);
388 } else {
389 ret = swap_insn(task, addr & ~3, &old_insn.arm,
390 &bp->insn.arm, 4);
391
392 if (ret != 4 || old_insn.arm != BREAKINST_ARM)
393 printk(KERN_ERR "%s:%d: corrupted ARM breakpoint at "
394 "0x%08lx (0x%08x)\n", task->comm, task->pid,
395 addr, old_insn.arm);
396 }
397}
398
399void ptrace_set_bpt(struct task_struct *child)
400{
401 struct pt_regs *regs;
402 unsigned long pc;
403 u32 insn;
404 int res;
405
815d5ec8 406 regs = task_pt_regs(child);
1da177e4
LT
407 pc = instruction_pointer(regs);
408
409 if (thumb_mode(regs)) {
410 printk(KERN_WARNING "ptrace: can't handle thumb mode\n");
411 return;
412 }
413
414 res = read_instr(child, pc, &insn);
415 if (!res) {
416 struct debug_info *dbg = &child->thread.debug;
417 unsigned long alt;
418
419 dbg->nsaved = 0;
420
421 alt = get_branch_address(child, pc, insn);
422 if (alt)
423 add_breakpoint(child, dbg, alt);
424
425 /*
426 * Note that we ignore the result of setting the above
427 * breakpoint since it may fail. When it does, this is
428 * not so much an error, but a forewarning that we may
429 * be receiving a prefetch abort shortly.
430 *
431 * If we don't set this breakpoint here, then we can
432 * lose control of the thread during single stepping.
433 */
434 if (!alt || predicate(insn) != PREDICATE_ALWAYS)
435 add_breakpoint(child, dbg, pc + 4);
436 }
437}
438
439/*
440 * Ensure no single-step breakpoint is pending. Returns non-zero
441 * value if child was being single-stepped.
442 */
443void ptrace_cancel_bpt(struct task_struct *child)
444{
445 int i, nsaved = child->thread.debug.nsaved;
446
447 child->thread.debug.nsaved = 0;
448
449 if (nsaved > 2) {
450 printk("ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved);
451 nsaved = 2;
452 }
453
454 for (i = 0; i < nsaved; i++)
455 clear_breakpoint(child, &child->thread.debug.bp[i]);
456}
457
458/*
459 * Called by kernel/ptrace.c when detaching..
1da177e4
LT
460 */
461void ptrace_disable(struct task_struct *child)
462{
b2a0d36f 463 single_step_disable(child);
1da177e4
LT
464}
465
466/*
467 * Handle hitting a breakpoint.
468 */
469void ptrace_break(struct task_struct *tsk, struct pt_regs *regs)
470{
471 siginfo_t info;
472
473 ptrace_cancel_bpt(tsk);
474
475 info.si_signo = SIGTRAP;
476 info.si_errno = 0;
477 info.si_code = TRAP_BRKPT;
478 info.si_addr = (void __user *)instruction_pointer(regs);
479
480 force_sig_info(SIGTRAP, &info, tsk);
481}
482
483static int break_trap(struct pt_regs *regs, unsigned int instr)
484{
485 ptrace_break(current, regs);
486 return 0;
487}
488
489static struct undef_hook arm_break_hook = {
490 .instr_mask = 0x0fffffff,
491 .instr_val = 0x07f001f0,
492 .cpsr_mask = PSR_T_BIT,
493 .cpsr_val = 0,
494 .fn = break_trap,
495};
496
497static struct undef_hook thumb_break_hook = {
498 .instr_mask = 0xffff,
499 .instr_val = 0xde01,
500 .cpsr_mask = PSR_T_BIT,
501 .cpsr_val = PSR_T_BIT,
502 .fn = break_trap,
503};
504
505static int __init ptrace_break_init(void)
506{
507 register_undef_hook(&arm_break_hook);
508 register_undef_hook(&thumb_break_hook);
509 return 0;
510}
511
512core_initcall(ptrace_break_init);
513
514/*
515 * Read the word at offset "off" into the "struct user". We
516 * actually access the pt_regs stored on the kernel stack.
517 */
518static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
519 unsigned long __user *ret)
520{
521 unsigned long tmp;
522
523 if (off & 3 || off >= sizeof(struct user))
524 return -EIO;
525
526 tmp = 0;
527 if (off < sizeof(struct pt_regs))
528 tmp = get_user_reg(tsk, off >> 2);
529
530 return put_user(tmp, ret);
531}
532
533/*
534 * Write the word at offset "off" into "struct user". We
535 * actually access the pt_regs stored on the kernel stack.
536 */
537static int ptrace_write_user(struct task_struct *tsk, unsigned long off,
538 unsigned long val)
539{
540 if (off & 3 || off >= sizeof(struct user))
541 return -EIO;
542
543 if (off >= sizeof(struct pt_regs))
544 return 0;
545
546 return put_user_reg(tsk, off >> 2, val);
547}
548
549/*
550 * Get all user integer registers.
551 */
552static int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
553{
815d5ec8 554 struct pt_regs *regs = task_pt_regs(tsk);
1da177e4
LT
555
556 return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
557}
558
559/*
560 * Set all user integer registers.
561 */
562static int ptrace_setregs(struct task_struct *tsk, void __user *uregs)
563{
564 struct pt_regs newregs;
565 int ret;
566
567 ret = -EFAULT;
568 if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) {
815d5ec8 569 struct pt_regs *regs = task_pt_regs(tsk);
1da177e4
LT
570
571 ret = -EINVAL;
572 if (valid_user_regs(&newregs)) {
573 *regs = newregs;
574 ret = 0;
575 }
576 }
577
578 return ret;
579}
580
581/*
582 * Get the child FPU state.
583 */
584static int ptrace_getfpregs(struct task_struct *tsk, void __user *ufp)
585{
e7c1b32f 586 return copy_to_user(ufp, &task_thread_info(tsk)->fpstate,
1da177e4
LT
587 sizeof(struct user_fp)) ? -EFAULT : 0;
588}
589
590/*
591 * Set the child FPU state.
592 */
593static int ptrace_setfpregs(struct task_struct *tsk, void __user *ufp)
594{
e7c1b32f 595 struct thread_info *thread = task_thread_info(tsk);
1da177e4
LT
596 thread->used_cp[1] = thread->used_cp[2] = 1;
597 return copy_from_user(&thread->fpstate, ufp,
598 sizeof(struct user_fp)) ? -EFAULT : 0;
599}
600
601#ifdef CONFIG_IWMMXT
602
603/*
604 * Get the child iWMMXt state.
605 */
606static int ptrace_getwmmxregs(struct task_struct *tsk, void __user *ufp)
607{
e7c1b32f 608 struct thread_info *thread = task_thread_info(tsk);
1da177e4
LT
609
610 if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
611 return -ENODATA;
612 iwmmxt_task_disable(thread); /* force it to ram */
cdaabbd7
RK
613 return copy_to_user(ufp, &thread->fpstate.iwmmxt, IWMMXT_SIZE)
614 ? -EFAULT : 0;
1da177e4
LT
615}
616
617/*
618 * Set the child iWMMXt state.
619 */
620static int ptrace_setwmmxregs(struct task_struct *tsk, void __user *ufp)
621{
e7c1b32f 622 struct thread_info *thread = task_thread_info(tsk);
1da177e4
LT
623
624 if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
625 return -EACCES;
626 iwmmxt_task_release(thread); /* force a reload */
17320a96 627 return copy_from_user(&thread->fpstate.iwmmxt, ufp, IWMMXT_SIZE)
cdaabbd7 628 ? -EFAULT : 0;
1da177e4
LT
629}
630
631#endif
632
5429b060
LB
633#ifdef CONFIG_CRUNCH
634/*
635 * Get the child Crunch state.
636 */
637static int ptrace_getcrunchregs(struct task_struct *tsk, void __user *ufp)
638{
639 struct thread_info *thread = task_thread_info(tsk);
640
641 crunch_task_disable(thread); /* force it to ram */
642 return copy_to_user(ufp, &thread->crunchstate, CRUNCH_SIZE)
643 ? -EFAULT : 0;
644}
645
646/*
647 * Set the child Crunch state.
648 */
649static int ptrace_setcrunchregs(struct task_struct *tsk, void __user *ufp)
650{
651 struct thread_info *thread = task_thread_info(tsk);
652
653 crunch_task_release(thread); /* force a reload */
654 return copy_from_user(&thread->crunchstate, ufp, CRUNCH_SIZE)
655 ? -EFAULT : 0;
656}
657#endif
658
481bed45 659long arch_ptrace(struct task_struct *child, long request, long addr, long data)
1da177e4
LT
660{
661 unsigned long tmp;
662 int ret;
663
664 switch (request) {
665 /*
666 * read word at location "addr" in the child process.
667 */
668 case PTRACE_PEEKTEXT:
669 case PTRACE_PEEKDATA:
670 ret = access_process_vm(child, addr, &tmp,
671 sizeof(unsigned long), 0);
672 if (ret == sizeof(unsigned long))
673 ret = put_user(tmp, (unsigned long __user *) data);
674 else
675 ret = -EIO;
676 break;
677
678 case PTRACE_PEEKUSR:
679 ret = ptrace_read_user(child, addr, (unsigned long __user *)data);
680 break;
681
682 /*
683 * write the word at location addr.
684 */
685 case PTRACE_POKETEXT:
686 case PTRACE_POKEDATA:
687 ret = access_process_vm(child, addr, &data,
688 sizeof(unsigned long), 1);
689 if (ret == sizeof(unsigned long))
690 ret = 0;
691 else
692 ret = -EIO;
693 break;
694
695 case PTRACE_POKEUSR:
696 ret = ptrace_write_user(child, addr, data);
697 break;
698
699 /*
700 * continue/restart and stop at next (return from) syscall
701 */
702 case PTRACE_SYSCALL:
703 case PTRACE_CONT:
704 ret = -EIO;
7ed20e1a 705 if (!valid_signal(data))
1da177e4
LT
706 break;
707 if (request == PTRACE_SYSCALL)
708 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
709 else
710 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
711 child->exit_code = data;
b2a0d36f 712 single_step_disable(child);
1da177e4
LT
713 wake_up_process(child);
714 ret = 0;
715 break;
716
717 /*
718 * make the child exit. Best I can do is send it a sigkill.
719 * perhaps it should be put in the status that it wants to
720 * exit.
721 */
722 case PTRACE_KILL:
b2a0d36f 723 single_step_disable(child);
1da177e4
LT
724 if (child->exit_state != EXIT_ZOMBIE) {
725 child->exit_code = SIGKILL;
726 wake_up_process(child);
727 }
728 ret = 0;
729 break;
730
731 /*
732 * execute single instruction.
733 */
734 case PTRACE_SINGLESTEP:
735 ret = -EIO;
7ed20e1a 736 if (!valid_signal(data))
1da177e4 737 break;
b2a0d36f 738 single_step_enable(child);
1da177e4
LT
739 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
740 child->exit_code = data;
741 /* give it a chance to run. */
742 wake_up_process(child);
743 ret = 0;
744 break;
745
746 case PTRACE_DETACH:
747 ret = ptrace_detach(child, data);
748 break;
749
750 case PTRACE_GETREGS:
751 ret = ptrace_getregs(child, (void __user *)data);
752 break;
753
754 case PTRACE_SETREGS:
755 ret = ptrace_setregs(child, (void __user *)data);
756 break;
757
758 case PTRACE_GETFPREGS:
759 ret = ptrace_getfpregs(child, (void __user *)data);
760 break;
761
762 case PTRACE_SETFPREGS:
763 ret = ptrace_setfpregs(child, (void __user *)data);
764 break;
765
766#ifdef CONFIG_IWMMXT
767 case PTRACE_GETWMMXREGS:
768 ret = ptrace_getwmmxregs(child, (void __user *)data);
769 break;
770
771 case PTRACE_SETWMMXREGS:
772 ret = ptrace_setwmmxregs(child, (void __user *)data);
773 break;
774#endif
775
776 case PTRACE_GET_THREAD_AREA:
e7c1b32f 777 ret = put_user(task_thread_info(child)->tp_value,
1da177e4
LT
778 (unsigned long __user *) data);
779 break;
780
3f471126
NP
781 case PTRACE_SET_SYSCALL:
782 ret = 0;
783 child->ptrace_message = data;
784 break;
785
5429b060
LB
786#ifdef CONFIG_CRUNCH
787 case PTRACE_GETCRUNCHREGS:
788 ret = ptrace_getcrunchregs(child, (void __user *)data);
789 break;
790
791 case PTRACE_SETCRUNCHREGS:
792 ret = ptrace_setcrunchregs(child, (void __user *)data);
793 break;
794#endif
795
1da177e4
LT
796 default:
797 ret = ptrace_request(child, request, addr, data);
798 break;
799 }
800
801 return ret;
802}
803
3f471126 804asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
1da177e4
LT
805{
806 unsigned long ip;
807
808 if (!test_thread_flag(TIF_SYSCALL_TRACE))
3f471126 809 return scno;
1da177e4 810 if (!(current->ptrace & PT_PTRACED))
3f471126 811 return scno;
1da177e4
LT
812
813 /*
814 * Save IP. IP is used to denote syscall entry/exit:
815 * IP = 0 -> entry, = 1 -> exit
816 */
817 ip = regs->ARM_ip;
818 regs->ARM_ip = why;
819
3f471126
NP
820 current->ptrace_message = scno;
821
1da177e4
LT
822 /* the 0x80 provides a way for the tracing parent to distinguish
823 between a syscall stop and SIGTRAP delivery */
824 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
825 ? 0x80 : 0));
826 /*
827 * this isn't the same as continuing with a signal, but it will do
828 * for normal use. strace only continues with a signal if the
829 * stopping signal is not SIGTRAP. -brl
830 */
831 if (current->exit_code) {
832 send_sig(current->exit_code, current, 1);
833 current->exit_code = 0;
834 }
835 regs->ARM_ip = ip;
3f471126
NP
836
837 return current->ptrace_message;
1da177e4 838}
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