Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/kernel/setup.c | |
3 | * | |
4 | * Copyright (C) 1995-2001 Russell King | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
ecea4ab6 | 10 | #include <linux/export.h> |
1da177e4 LT |
11 | #include <linux/kernel.h> |
12 | #include <linux/stddef.h> | |
13 | #include <linux/ioport.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/utsname.h> | |
16 | #include <linux/initrd.h> | |
17 | #include <linux/console.h> | |
18 | #include <linux/bootmem.h> | |
19 | #include <linux/seq_file.h> | |
894673ee | 20 | #include <linux/screen_info.h> |
1da177e4 | 21 | #include <linux/init.h> |
3c57fb43 | 22 | #include <linux/kexec.h> |
93c02ab4 | 23 | #include <linux/of_fdt.h> |
1da177e4 LT |
24 | #include <linux/root_dev.h> |
25 | #include <linux/cpu.h> | |
26 | #include <linux/interrupt.h> | |
7bbb7940 | 27 | #include <linux/smp.h> |
4e950f6f | 28 | #include <linux/fs.h> |
e119bfff | 29 | #include <linux/proc_fs.h> |
2778f620 | 30 | #include <linux/memblock.h> |
2ecccf90 DM |
31 | #include <linux/bug.h> |
32 | #include <linux/compiler.h> | |
27a3f0e9 | 33 | #include <linux/sort.h> |
1da177e4 | 34 | |
b86040a5 | 35 | #include <asm/unified.h> |
15d07dc9 | 36 | #include <asm/cp15.h> |
1da177e4 | 37 | #include <asm/cpu.h> |
0ba8b9b2 | 38 | #include <asm/cputype.h> |
1da177e4 | 39 | #include <asm/elf.h> |
1da177e4 | 40 | #include <asm/procinfo.h> |
37efe642 | 41 | #include <asm/sections.h> |
1da177e4 | 42 | #include <asm/setup.h> |
f00ec48f | 43 | #include <asm/smp_plat.h> |
1da177e4 LT |
44 | #include <asm/mach-types.h> |
45 | #include <asm/cacheflush.h> | |
46097c7d | 46 | #include <asm/cachetype.h> |
1da177e4 LT |
47 | #include <asm/tlbflush.h> |
48 | ||
93c02ab4 | 49 | #include <asm/prom.h> |
1da177e4 LT |
50 | #include <asm/mach/arch.h> |
51 | #include <asm/mach/irq.h> | |
52 | #include <asm/mach/time.h> | |
9f97da78 DH |
53 | #include <asm/system_info.h> |
54 | #include <asm/system_misc.h> | |
5cbad0eb | 55 | #include <asm/traps.h> |
bff595c1 | 56 | #include <asm/unwind.h> |
1c16d242 | 57 | #include <asm/memblock.h> |
1da177e4 | 58 | |
73a65b3f | 59 | #if defined(CONFIG_DEPRECATED_PARAM_STRUCT) |
0fc1c832 | 60 | #include "compat.h" |
73a65b3f | 61 | #endif |
4cd9d6f7 | 62 | #include "atags.h" |
bc581770 | 63 | #include "tcm.h" |
0fc1c832 | 64 | |
1da177e4 LT |
65 | #ifndef MEM_SIZE |
66 | #define MEM_SIZE (16*1024*1024) | |
67 | #endif | |
68 | ||
69 | #if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE) | |
70 | char fpe_type[8]; | |
71 | ||
72 | static int __init fpe_setup(char *line) | |
73 | { | |
74 | memcpy(fpe_type, line, 8); | |
75 | return 1; | |
76 | } | |
77 | ||
78 | __setup("fpe=", fpe_setup); | |
79 | #endif | |
80 | ||
4b5f32ce | 81 | extern void paging_init(struct machine_desc *desc); |
0371d3f7 | 82 | extern void sanity_check_meminfo(void); |
1da177e4 | 83 | extern void reboot_setup(char *str); |
c7909509 | 84 | extern void setup_dma_zone(struct machine_desc *desc); |
1da177e4 LT |
85 | |
86 | unsigned int processor_id; | |
c18f6581 | 87 | EXPORT_SYMBOL(processor_id); |
0385ebc0 | 88 | unsigned int __machine_arch_type __read_mostly; |
1da177e4 | 89 | EXPORT_SYMBOL(__machine_arch_type); |
0385ebc0 | 90 | unsigned int cacheid __read_mostly; |
c0e95878 | 91 | EXPORT_SYMBOL(cacheid); |
1da177e4 | 92 | |
9d20fdd5 BG |
93 | unsigned int __atags_pointer __initdata; |
94 | ||
1da177e4 LT |
95 | unsigned int system_rev; |
96 | EXPORT_SYMBOL(system_rev); | |
97 | ||
98 | unsigned int system_serial_low; | |
99 | EXPORT_SYMBOL(system_serial_low); | |
100 | ||
101 | unsigned int system_serial_high; | |
102 | EXPORT_SYMBOL(system_serial_high); | |
103 | ||
0385ebc0 | 104 | unsigned int elf_hwcap __read_mostly; |
1da177e4 LT |
105 | EXPORT_SYMBOL(elf_hwcap); |
106 | ||
107 | ||
108 | #ifdef MULTI_CPU | |
0385ebc0 | 109 | struct processor processor __read_mostly; |
1da177e4 LT |
110 | #endif |
111 | #ifdef MULTI_TLB | |
0385ebc0 | 112 | struct cpu_tlb_fns cpu_tlb __read_mostly; |
1da177e4 LT |
113 | #endif |
114 | #ifdef MULTI_USER | |
0385ebc0 | 115 | struct cpu_user_fns cpu_user __read_mostly; |
1da177e4 LT |
116 | #endif |
117 | #ifdef MULTI_CACHE | |
0385ebc0 | 118 | struct cpu_cache_fns cpu_cache __read_mostly; |
1da177e4 | 119 | #endif |
953233dc | 120 | #ifdef CONFIG_OUTER_CACHE |
0385ebc0 | 121 | struct outer_cache_fns outer_cache __read_mostly; |
6c09f09d | 122 | EXPORT_SYMBOL(outer_cache); |
953233dc | 123 | #endif |
1da177e4 | 124 | |
2ecccf90 DM |
125 | /* |
126 | * Cached cpu_architecture() result for use by assembler code. | |
127 | * C code should use the cpu_architecture() function instead of accessing this | |
128 | * variable directly. | |
129 | */ | |
130 | int __cpu_architecture __read_mostly = CPU_ARCH_UNKNOWN; | |
131 | ||
ccea7a19 RK |
132 | struct stack { |
133 | u32 irq[3]; | |
134 | u32 abt[3]; | |
135 | u32 und[3]; | |
136 | } ____cacheline_aligned; | |
137 | ||
138 | static struct stack stacks[NR_CPUS]; | |
139 | ||
1da177e4 LT |
140 | char elf_platform[ELF_PLATFORM_SIZE]; |
141 | EXPORT_SYMBOL(elf_platform); | |
142 | ||
1da177e4 LT |
143 | static const char *cpu_name; |
144 | static const char *machine_name; | |
48ab7e09 | 145 | static char __initdata cmd_line[COMMAND_LINE_SIZE]; |
8ff1443c | 146 | struct machine_desc *machine_desc __initdata; |
1da177e4 LT |
147 | |
148 | static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE; | |
149 | static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } }; | |
150 | #define ENDIANNESS ((char)endian_test.l) | |
151 | ||
152 | DEFINE_PER_CPU(struct cpuinfo_arm, cpu_data); | |
153 | ||
154 | /* | |
155 | * Standard memory resources | |
156 | */ | |
157 | static struct resource mem_res[] = { | |
740e518e GKH |
158 | { |
159 | .name = "Video RAM", | |
160 | .start = 0, | |
161 | .end = 0, | |
162 | .flags = IORESOURCE_MEM | |
163 | }, | |
164 | { | |
a36d8e5b | 165 | .name = "Kernel code", |
740e518e GKH |
166 | .start = 0, |
167 | .end = 0, | |
168 | .flags = IORESOURCE_MEM | |
169 | }, | |
170 | { | |
171 | .name = "Kernel data", | |
172 | .start = 0, | |
173 | .end = 0, | |
174 | .flags = IORESOURCE_MEM | |
175 | } | |
1da177e4 LT |
176 | }; |
177 | ||
178 | #define video_ram mem_res[0] | |
179 | #define kernel_code mem_res[1] | |
180 | #define kernel_data mem_res[2] | |
181 | ||
182 | static struct resource io_res[] = { | |
740e518e GKH |
183 | { |
184 | .name = "reserved", | |
185 | .start = 0x3bc, | |
186 | .end = 0x3be, | |
187 | .flags = IORESOURCE_IO | IORESOURCE_BUSY | |
188 | }, | |
189 | { | |
190 | .name = "reserved", | |
191 | .start = 0x378, | |
192 | .end = 0x37f, | |
193 | .flags = IORESOURCE_IO | IORESOURCE_BUSY | |
194 | }, | |
195 | { | |
196 | .name = "reserved", | |
197 | .start = 0x278, | |
198 | .end = 0x27f, | |
199 | .flags = IORESOURCE_IO | IORESOURCE_BUSY | |
200 | } | |
1da177e4 LT |
201 | }; |
202 | ||
203 | #define lp0 io_res[0] | |
204 | #define lp1 io_res[1] | |
205 | #define lp2 io_res[2] | |
206 | ||
1da177e4 LT |
207 | static const char *proc_arch[] = { |
208 | "undefined/unknown", | |
209 | "3", | |
210 | "4", | |
211 | "4T", | |
212 | "5", | |
213 | "5T", | |
214 | "5TE", | |
215 | "5TEJ", | |
216 | "6TEJ", | |
6b090a25 | 217 | "7", |
1da177e4 LT |
218 | "?(11)", |
219 | "?(12)", | |
220 | "?(13)", | |
221 | "?(14)", | |
222 | "?(15)", | |
223 | "?(16)", | |
224 | "?(17)", | |
225 | }; | |
226 | ||
2ecccf90 | 227 | static int __get_cpu_architecture(void) |
1da177e4 LT |
228 | { |
229 | int cpu_arch; | |
230 | ||
0ba8b9b2 | 231 | if ((read_cpuid_id() & 0x0008f000) == 0) { |
1da177e4 | 232 | cpu_arch = CPU_ARCH_UNKNOWN; |
0ba8b9b2 RK |
233 | } else if ((read_cpuid_id() & 0x0008f000) == 0x00007000) { |
234 | cpu_arch = (read_cpuid_id() & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3; | |
235 | } else if ((read_cpuid_id() & 0x00080000) == 0x00000000) { | |
236 | cpu_arch = (read_cpuid_id() >> 16) & 7; | |
1da177e4 LT |
237 | if (cpu_arch) |
238 | cpu_arch += CPU_ARCH_ARMv3; | |
0ba8b9b2 | 239 | } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) { |
180005c4 CM |
240 | unsigned int mmfr0; |
241 | ||
242 | /* Revised CPUID format. Read the Memory Model Feature | |
243 | * Register 0 and check for VMSAv7 or PMSAv7 */ | |
244 | asm("mrc p15, 0, %0, c0, c1, 4" | |
245 | : "=r" (mmfr0)); | |
315cfe78 CM |
246 | if ((mmfr0 & 0x0000000f) >= 0x00000003 || |
247 | (mmfr0 & 0x000000f0) >= 0x00000030) | |
180005c4 CM |
248 | cpu_arch = CPU_ARCH_ARMv7; |
249 | else if ((mmfr0 & 0x0000000f) == 0x00000002 || | |
250 | (mmfr0 & 0x000000f0) == 0x00000020) | |
251 | cpu_arch = CPU_ARCH_ARMv6; | |
252 | else | |
253 | cpu_arch = CPU_ARCH_UNKNOWN; | |
254 | } else | |
255 | cpu_arch = CPU_ARCH_UNKNOWN; | |
1da177e4 LT |
256 | |
257 | return cpu_arch; | |
258 | } | |
259 | ||
2ecccf90 DM |
260 | int __pure cpu_architecture(void) |
261 | { | |
262 | BUG_ON(__cpu_architecture == CPU_ARCH_UNKNOWN); | |
263 | ||
264 | return __cpu_architecture; | |
265 | } | |
266 | ||
8925ec4c WD |
267 | static int cpu_has_aliasing_icache(unsigned int arch) |
268 | { | |
269 | int aliasing_icache; | |
270 | unsigned int id_reg, num_sets, line_size; | |
271 | ||
7f94e9cc WD |
272 | /* PIPT caches never alias. */ |
273 | if (icache_is_pipt()) | |
274 | return 0; | |
275 | ||
8925ec4c WD |
276 | /* arch specifies the register format */ |
277 | switch (arch) { | |
278 | case CPU_ARCH_ARMv7: | |
5fb31a96 LW |
279 | asm("mcr p15, 2, %0, c0, c0, 0 @ set CSSELR" |
280 | : /* No output operands */ | |
8925ec4c | 281 | : "r" (1)); |
5fb31a96 LW |
282 | isb(); |
283 | asm("mrc p15, 1, %0, c0, c0, 0 @ read CCSIDR" | |
284 | : "=r" (id_reg)); | |
8925ec4c WD |
285 | line_size = 4 << ((id_reg & 0x7) + 2); |
286 | num_sets = ((id_reg >> 13) & 0x7fff) + 1; | |
287 | aliasing_icache = (line_size * num_sets) > PAGE_SIZE; | |
288 | break; | |
289 | case CPU_ARCH_ARMv6: | |
290 | aliasing_icache = read_cpuid_cachetype() & (1 << 11); | |
291 | break; | |
292 | default: | |
293 | /* I-cache aliases will be handled by D-cache aliasing code */ | |
294 | aliasing_icache = 0; | |
295 | } | |
296 | ||
297 | return aliasing_icache; | |
298 | } | |
299 | ||
c0e95878 RK |
300 | static void __init cacheid_init(void) |
301 | { | |
302 | unsigned int cachetype = read_cpuid_cachetype(); | |
303 | unsigned int arch = cpu_architecture(); | |
304 | ||
b57ee99f CM |
305 | if (arch >= CPU_ARCH_ARMv6) { |
306 | if ((cachetype & (7 << 29)) == 4 << 29) { | |
307 | /* ARMv7 register format */ | |
72dc53ac | 308 | arch = CPU_ARCH_ARMv7; |
b57ee99f | 309 | cacheid = CACHEID_VIPT_NONALIASING; |
7f94e9cc WD |
310 | switch (cachetype & (3 << 14)) { |
311 | case (1 << 14): | |
b57ee99f | 312 | cacheid |= CACHEID_ASID_TAGGED; |
7f94e9cc WD |
313 | break; |
314 | case (3 << 14): | |
315 | cacheid |= CACHEID_PIPT; | |
316 | break; | |
317 | } | |
8925ec4c | 318 | } else { |
72dc53ac WD |
319 | arch = CPU_ARCH_ARMv6; |
320 | if (cachetype & (1 << 23)) | |
321 | cacheid = CACHEID_VIPT_ALIASING; | |
322 | else | |
323 | cacheid = CACHEID_VIPT_NONALIASING; | |
8925ec4c | 324 | } |
72dc53ac WD |
325 | if (cpu_has_aliasing_icache(arch)) |
326 | cacheid |= CACHEID_VIPT_I_ALIASING; | |
c0e95878 RK |
327 | } else { |
328 | cacheid = CACHEID_VIVT; | |
329 | } | |
2b4ae1f1 RK |
330 | |
331 | printk("CPU: %s data cache, %s instruction cache\n", | |
332 | cache_is_vivt() ? "VIVT" : | |
333 | cache_is_vipt_aliasing() ? "VIPT aliasing" : | |
7f94e9cc | 334 | cache_is_vipt_nonaliasing() ? "PIPT / VIPT nonaliasing" : "unknown", |
2b4ae1f1 RK |
335 | cache_is_vivt() ? "VIVT" : |
336 | icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" : | |
8925ec4c | 337 | icache_is_vipt_aliasing() ? "VIPT aliasing" : |
7f94e9cc | 338 | icache_is_pipt() ? "PIPT" : |
2b4ae1f1 | 339 | cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown"); |
c0e95878 RK |
340 | } |
341 | ||
1da177e4 LT |
342 | /* |
343 | * These functions re-use the assembly code in head.S, which | |
344 | * already provide the required functionality. | |
345 | */ | |
0f44ba1d | 346 | extern struct proc_info_list *lookup_processor_type(unsigned int); |
6fc31d54 | 347 | |
93c02ab4 | 348 | void __init early_print(const char *str, ...) |
6fc31d54 RK |
349 | { |
350 | extern void printascii(const char *); | |
351 | char buf[256]; | |
352 | va_list ap; | |
353 | ||
354 | va_start(ap, str); | |
355 | vsnprintf(buf, sizeof(buf), str, ap); | |
356 | va_end(ap); | |
357 | ||
358 | #ifdef CONFIG_DEBUG_LL | |
359 | printascii(buf); | |
360 | #endif | |
361 | printk("%s", buf); | |
362 | } | |
363 | ||
f159f4ed TL |
364 | static void __init feat_v6_fixup(void) |
365 | { | |
366 | int id = read_cpuid_id(); | |
367 | ||
368 | if ((id & 0xff0f0000) != 0x41070000) | |
369 | return; | |
370 | ||
371 | /* | |
372 | * HWCAP_TLS is available only on 1136 r1p0 and later, | |
373 | * see also kuser_get_tls_init. | |
374 | */ | |
375 | if ((((id >> 4) & 0xfff) == 0xb36) && (((id >> 20) & 3) == 0)) | |
376 | elf_hwcap &= ~HWCAP_TLS; | |
377 | } | |
378 | ||
ccea7a19 RK |
379 | /* |
380 | * cpu_init - initialise one CPU. | |
381 | * | |
90f1e084 | 382 | * cpu_init sets up the per-CPU stacks. |
ccea7a19 | 383 | */ |
36c5ed23 | 384 | void cpu_init(void) |
ccea7a19 RK |
385 | { |
386 | unsigned int cpu = smp_processor_id(); | |
387 | struct stack *stk = &stacks[cpu]; | |
388 | ||
389 | if (cpu >= NR_CPUS) { | |
390 | printk(KERN_CRIT "CPU%u: bad primary CPU number\n", cpu); | |
391 | BUG(); | |
392 | } | |
393 | ||
b69874e4 RK |
394 | cpu_proc_init(); |
395 | ||
b86040a5 CM |
396 | /* |
397 | * Define the placement constraint for the inline asm directive below. | |
398 | * In Thumb-2, msr with an immediate value is not allowed. | |
399 | */ | |
400 | #ifdef CONFIG_THUMB2_KERNEL | |
401 | #define PLC "r" | |
402 | #else | |
403 | #define PLC "I" | |
404 | #endif | |
405 | ||
ccea7a19 RK |
406 | /* |
407 | * setup stacks for re-entrant exception handlers | |
408 | */ | |
409 | __asm__ ( | |
410 | "msr cpsr_c, %1\n\t" | |
b86040a5 CM |
411 | "add r14, %0, %2\n\t" |
412 | "mov sp, r14\n\t" | |
ccea7a19 | 413 | "msr cpsr_c, %3\n\t" |
b86040a5 CM |
414 | "add r14, %0, %4\n\t" |
415 | "mov sp, r14\n\t" | |
ccea7a19 | 416 | "msr cpsr_c, %5\n\t" |
b86040a5 CM |
417 | "add r14, %0, %6\n\t" |
418 | "mov sp, r14\n\t" | |
ccea7a19 RK |
419 | "msr cpsr_c, %7" |
420 | : | |
421 | : "r" (stk), | |
b86040a5 | 422 | PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE), |
ccea7a19 | 423 | "I" (offsetof(struct stack, irq[0])), |
b86040a5 | 424 | PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE), |
ccea7a19 | 425 | "I" (offsetof(struct stack, abt[0])), |
b86040a5 | 426 | PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE), |
ccea7a19 | 427 | "I" (offsetof(struct stack, und[0])), |
b86040a5 | 428 | PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE) |
aaaa3f9e | 429 | : "r14"); |
ccea7a19 RK |
430 | } |
431 | ||
eb50439b WD |
432 | int __cpu_logical_map[NR_CPUS]; |
433 | ||
434 | void __init smp_setup_processor_id(void) | |
435 | { | |
436 | int i; | |
437 | u32 cpu = is_smp() ? read_cpuid_mpidr() & 0xff : 0; | |
438 | ||
439 | cpu_logical_map(0) = cpu; | |
440 | for (i = 1; i < NR_CPUS; ++i) | |
441 | cpu_logical_map(i) = i == cpu ? 0 : i; | |
442 | ||
443 | printk(KERN_INFO "Booting Linux on physical CPU %d\n", cpu); | |
444 | } | |
445 | ||
b69874e4 RK |
446 | static void __init setup_processor(void) |
447 | { | |
448 | struct proc_info_list *list; | |
449 | ||
450 | /* | |
451 | * locate processor in the list of supported processor | |
452 | * types. The linker builds this table for us from the | |
453 | * entries in arch/arm/mm/proc-*.S | |
454 | */ | |
455 | list = lookup_processor_type(read_cpuid_id()); | |
456 | if (!list) { | |
457 | printk("CPU configuration botched (ID %08x), unable " | |
458 | "to continue.\n", read_cpuid_id()); | |
459 | while (1); | |
460 | } | |
461 | ||
462 | cpu_name = list->cpu_name; | |
2ecccf90 | 463 | __cpu_architecture = __get_cpu_architecture(); |
b69874e4 RK |
464 | |
465 | #ifdef MULTI_CPU | |
466 | processor = *list->proc; | |
467 | #endif | |
468 | #ifdef MULTI_TLB | |
469 | cpu_tlb = *list->tlb; | |
470 | #endif | |
471 | #ifdef MULTI_USER | |
472 | cpu_user = *list->user; | |
473 | #endif | |
474 | #ifdef MULTI_CACHE | |
475 | cpu_cache = *list->cache; | |
476 | #endif | |
477 | ||
478 | printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n", | |
479 | cpu_name, read_cpuid_id(), read_cpuid_id() & 15, | |
480 | proc_arch[cpu_architecture()], cr_alignment); | |
481 | ||
a34dbfb0 WD |
482 | snprintf(init_utsname()->machine, __NEW_UTS_LEN + 1, "%s%c", |
483 | list->arch_name, ENDIANNESS); | |
484 | snprintf(elf_platform, ELF_PLATFORM_SIZE, "%s%c", | |
485 | list->elf_name, ENDIANNESS); | |
b69874e4 RK |
486 | elf_hwcap = list->elf_hwcap; |
487 | #ifndef CONFIG_ARM_THUMB | |
488 | elf_hwcap &= ~HWCAP_THUMB; | |
489 | #endif | |
490 | ||
491 | feat_v6_fixup(); | |
492 | ||
493 | cacheid_init(); | |
494 | cpu_init(); | |
495 | } | |
496 | ||
93c02ab4 | 497 | void __init dump_machine_table(void) |
1da177e4 | 498 | { |
dce72dd0 | 499 | struct machine_desc *p; |
1da177e4 | 500 | |
6291319d GL |
501 | early_print("Available machine support:\n\nID (hex)\tNAME\n"); |
502 | for_each_machine_desc(p) | |
dce72dd0 | 503 | early_print("%08x\t%s\n", p->nr, p->name); |
1da177e4 | 504 | |
dce72dd0 | 505 | early_print("\nPlease check your kernel config and/or bootloader.\n"); |
1da177e4 | 506 | |
dce72dd0 NP |
507 | while (true) |
508 | /* can't use cpu_relax() here as it may require MMU setup */; | |
1da177e4 LT |
509 | } |
510 | ||
a5d5f7da | 511 | int __init arm_add_memory(phys_addr_t start, phys_addr_t size) |
3a669411 | 512 | { |
4b5f32ce NP |
513 | struct membank *bank = &meminfo.bank[meminfo.nr_banks]; |
514 | ||
515 | if (meminfo.nr_banks >= NR_BANKS) { | |
516 | printk(KERN_CRIT "NR_BANKS too low, " | |
29a38193 | 517 | "ignoring memory at 0x%08llx\n", (long long)start); |
4b5f32ce NP |
518 | return -EINVAL; |
519 | } | |
05f96ef1 | 520 | |
3a669411 RK |
521 | /* |
522 | * Ensure that start/size are aligned to a page boundary. | |
523 | * Size is appropriately rounded down, start is rounded up. | |
524 | */ | |
525 | size -= start & ~PAGE_MASK; | |
05f96ef1 | 526 | bank->start = PAGE_ALIGN(start); |
e5ab8580 WD |
527 | |
528 | #ifndef CONFIG_LPAE | |
529 | if (bank->start + size < bank->start) { | |
530 | printk(KERN_CRIT "Truncating memory at 0x%08llx to fit in " | |
531 | "32-bit physical address space\n", (long long)start); | |
532 | /* | |
533 | * To ensure bank->start + bank->size is representable in | |
534 | * 32 bits, we use ULONG_MAX as the upper limit rather than 4GB. | |
535 | * This means we lose a page after masking. | |
536 | */ | |
537 | size = ULONG_MAX - bank->start; | |
538 | } | |
539 | #endif | |
540 | ||
a5d5f7da | 541 | bank->size = size & ~(phys_addr_t)(PAGE_SIZE - 1); |
4b5f32ce NP |
542 | |
543 | /* | |
544 | * Check whether this memory region has non-zero size or | |
545 | * invalid node number. | |
546 | */ | |
be370302 | 547 | if (bank->size == 0) |
4b5f32ce NP |
548 | return -EINVAL; |
549 | ||
550 | meminfo.nr_banks++; | |
551 | return 0; | |
3a669411 RK |
552 | } |
553 | ||
1da177e4 LT |
554 | /* |
555 | * Pick out the memory size. We look for mem=size@start, | |
556 | * where start and size are "size[KkMm]" | |
557 | */ | |
2b0d8c25 | 558 | static int __init early_mem(char *p) |
1da177e4 LT |
559 | { |
560 | static int usermem __initdata = 0; | |
a5d5f7da | 561 | phys_addr_t size; |
f60892d3 | 562 | phys_addr_t start; |
2b0d8c25 | 563 | char *endp; |
1da177e4 LT |
564 | |
565 | /* | |
566 | * If the user specifies memory size, we | |
567 | * blow away any automatically generated | |
568 | * size. | |
569 | */ | |
570 | if (usermem == 0) { | |
571 | usermem = 1; | |
572 | meminfo.nr_banks = 0; | |
573 | } | |
574 | ||
575 | start = PHYS_OFFSET; | |
2b0d8c25 JK |
576 | size = memparse(p, &endp); |
577 | if (*endp == '@') | |
578 | start = memparse(endp + 1, NULL); | |
1da177e4 | 579 | |
1c97b73e | 580 | arm_add_memory(start, size); |
1da177e4 | 581 | |
2b0d8c25 | 582 | return 0; |
1da177e4 | 583 | } |
2b0d8c25 | 584 | early_param("mem", early_mem); |
1da177e4 LT |
585 | |
586 | static void __init | |
587 | setup_ramdisk(int doload, int prompt, int image_start, unsigned int rd_sz) | |
588 | { | |
589 | #ifdef CONFIG_BLK_DEV_RAM | |
590 | extern int rd_size, rd_image_start, rd_prompt, rd_doload; | |
591 | ||
592 | rd_image_start = image_start; | |
593 | rd_prompt = prompt; | |
594 | rd_doload = doload; | |
595 | ||
596 | if (rd_sz) | |
597 | rd_size = rd_sz; | |
598 | #endif | |
599 | } | |
600 | ||
11b9369c | 601 | static void __init request_standard_resources(struct machine_desc *mdesc) |
1da177e4 | 602 | { |
11b9369c | 603 | struct memblock_region *region; |
1da177e4 | 604 | struct resource *res; |
1da177e4 | 605 | |
37efe642 RK |
606 | kernel_code.start = virt_to_phys(_text); |
607 | kernel_code.end = virt_to_phys(_etext - 1); | |
842eab40 | 608 | kernel_data.start = virt_to_phys(_sdata); |
37efe642 | 609 | kernel_data.end = virt_to_phys(_end - 1); |
1da177e4 | 610 | |
11b9369c | 611 | for_each_memblock(memory, region) { |
1da177e4 LT |
612 | res = alloc_bootmem_low(sizeof(*res)); |
613 | res->name = "System RAM"; | |
11b9369c DZ |
614 | res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region)); |
615 | res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1; | |
1da177e4 LT |
616 | res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; |
617 | ||
618 | request_resource(&iomem_resource, res); | |
619 | ||
620 | if (kernel_code.start >= res->start && | |
621 | kernel_code.end <= res->end) | |
622 | request_resource(res, &kernel_code); | |
623 | if (kernel_data.start >= res->start && | |
624 | kernel_data.end <= res->end) | |
625 | request_resource(res, &kernel_data); | |
626 | } | |
627 | ||
628 | if (mdesc->video_start) { | |
629 | video_ram.start = mdesc->video_start; | |
630 | video_ram.end = mdesc->video_end; | |
631 | request_resource(&iomem_resource, &video_ram); | |
632 | } | |
633 | ||
634 | /* | |
635 | * Some machines don't have the possibility of ever | |
636 | * possessing lp0, lp1 or lp2 | |
637 | */ | |
638 | if (mdesc->reserve_lp0) | |
639 | request_resource(&ioport_resource, &lp0); | |
640 | if (mdesc->reserve_lp1) | |
641 | request_resource(&ioport_resource, &lp1); | |
642 | if (mdesc->reserve_lp2) | |
643 | request_resource(&ioport_resource, &lp2); | |
644 | } | |
645 | ||
646 | /* | |
647 | * Tag parsing. | |
648 | * | |
649 | * This is the new way of passing data to the kernel at boot time. Rather | |
650 | * than passing a fixed inflexible structure to the kernel, we pass a list | |
651 | * of variable-sized tags to the kernel. The first tag must be a ATAG_CORE | |
652 | * tag for the list to be recognised (to distinguish the tagged list from | |
653 | * a param_struct). The list is terminated with a zero-length tag (this tag | |
654 | * is not parsed in any way). | |
655 | */ | |
656 | static int __init parse_tag_core(const struct tag *tag) | |
657 | { | |
658 | if (tag->hdr.size > 2) { | |
659 | if ((tag->u.core.flags & 1) == 0) | |
660 | root_mountflags &= ~MS_RDONLY; | |
661 | ROOT_DEV = old_decode_dev(tag->u.core.rootdev); | |
662 | } | |
663 | return 0; | |
664 | } | |
665 | ||
666 | __tagtable(ATAG_CORE, parse_tag_core); | |
667 | ||
668 | static int __init parse_tag_mem32(const struct tag *tag) | |
669 | { | |
4b5f32ce | 670 | return arm_add_memory(tag->u.mem.start, tag->u.mem.size); |
1da177e4 LT |
671 | } |
672 | ||
673 | __tagtable(ATAG_MEM, parse_tag_mem32); | |
674 | ||
675 | #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE) | |
676 | struct screen_info screen_info = { | |
677 | .orig_video_lines = 30, | |
678 | .orig_video_cols = 80, | |
679 | .orig_video_mode = 0, | |
680 | .orig_video_ega_bx = 0, | |
681 | .orig_video_isVGA = 1, | |
682 | .orig_video_points = 8 | |
683 | }; | |
684 | ||
685 | static int __init parse_tag_videotext(const struct tag *tag) | |
686 | { | |
687 | screen_info.orig_x = tag->u.videotext.x; | |
688 | screen_info.orig_y = tag->u.videotext.y; | |
689 | screen_info.orig_video_page = tag->u.videotext.video_page; | |
690 | screen_info.orig_video_mode = tag->u.videotext.video_mode; | |
691 | screen_info.orig_video_cols = tag->u.videotext.video_cols; | |
692 | screen_info.orig_video_ega_bx = tag->u.videotext.video_ega_bx; | |
693 | screen_info.orig_video_lines = tag->u.videotext.video_lines; | |
694 | screen_info.orig_video_isVGA = tag->u.videotext.video_isvga; | |
695 | screen_info.orig_video_points = tag->u.videotext.video_points; | |
696 | return 0; | |
697 | } | |
698 | ||
699 | __tagtable(ATAG_VIDEOTEXT, parse_tag_videotext); | |
700 | #endif | |
701 | ||
702 | static int __init parse_tag_ramdisk(const struct tag *tag) | |
703 | { | |
704 | setup_ramdisk((tag->u.ramdisk.flags & 1) == 0, | |
705 | (tag->u.ramdisk.flags & 2) == 0, | |
706 | tag->u.ramdisk.start, tag->u.ramdisk.size); | |
707 | return 0; | |
708 | } | |
709 | ||
710 | __tagtable(ATAG_RAMDISK, parse_tag_ramdisk); | |
711 | ||
1da177e4 LT |
712 | static int __init parse_tag_serialnr(const struct tag *tag) |
713 | { | |
714 | system_serial_low = tag->u.serialnr.low; | |
715 | system_serial_high = tag->u.serialnr.high; | |
716 | return 0; | |
717 | } | |
718 | ||
719 | __tagtable(ATAG_SERIAL, parse_tag_serialnr); | |
720 | ||
721 | static int __init parse_tag_revision(const struct tag *tag) | |
722 | { | |
723 | system_rev = tag->u.revision.rev; | |
724 | return 0; | |
725 | } | |
726 | ||
727 | __tagtable(ATAG_REVISION, parse_tag_revision); | |
728 | ||
729 | static int __init parse_tag_cmdline(const struct tag *tag) | |
730 | { | |
4394c124 VB |
731 | #if defined(CONFIG_CMDLINE_EXTEND) |
732 | strlcat(default_command_line, " ", COMMAND_LINE_SIZE); | |
733 | strlcat(default_command_line, tag->u.cmdline.cmdline, | |
734 | COMMAND_LINE_SIZE); | |
735 | #elif defined(CONFIG_CMDLINE_FORCE) | |
22eeb8f6 | 736 | pr_warning("Ignoring tag cmdline (using the default kernel command line)\n"); |
4394c124 VB |
737 | #else |
738 | strlcpy(default_command_line, tag->u.cmdline.cmdline, | |
739 | COMMAND_LINE_SIZE); | |
740 | #endif | |
1da177e4 LT |
741 | return 0; |
742 | } | |
743 | ||
744 | __tagtable(ATAG_CMDLINE, parse_tag_cmdline); | |
745 | ||
746 | /* | |
747 | * Scan the tag table for this tag, and call its parse function. | |
748 | * The tag table is built by the linker from all the __tagtable | |
749 | * declarations. | |
750 | */ | |
751 | static int __init parse_tag(const struct tag *tag) | |
752 | { | |
753 | extern struct tagtable __tagtable_begin, __tagtable_end; | |
754 | struct tagtable *t; | |
755 | ||
756 | for (t = &__tagtable_begin; t < &__tagtable_end; t++) | |
757 | if (tag->hdr.tag == t->tag) { | |
758 | t->parse(tag); | |
759 | break; | |
760 | } | |
761 | ||
762 | return t < &__tagtable_end; | |
763 | } | |
764 | ||
765 | /* | |
766 | * Parse all tags in the list, checking both the global and architecture | |
767 | * specific tag tables. | |
768 | */ | |
769 | static void __init parse_tags(const struct tag *t) | |
770 | { | |
771 | for (; t->hdr.size; t = tag_next(t)) | |
772 | if (!parse_tag(t)) | |
773 | printk(KERN_WARNING | |
774 | "Ignoring unrecognised tag 0x%08x\n", | |
775 | t->hdr.tag); | |
776 | } | |
777 | ||
778 | /* | |
779 | * This holds our defaults. | |
780 | */ | |
781 | static struct init_tags { | |
782 | struct tag_header hdr1; | |
783 | struct tag_core core; | |
784 | struct tag_header hdr2; | |
785 | struct tag_mem32 mem; | |
786 | struct tag_header hdr3; | |
787 | } init_tags __initdata = { | |
788 | { tag_size(tag_core), ATAG_CORE }, | |
789 | { 1, PAGE_SIZE, 0xff }, | |
790 | { tag_size(tag_mem32), ATAG_MEM }, | |
b75c178a | 791 | { MEM_SIZE }, |
1da177e4 LT |
792 | { 0, ATAG_NONE } |
793 | }; | |
794 | ||
1da177e4 LT |
795 | static int __init customize_machine(void) |
796 | { | |
797 | /* customizes platform devices, or adds new ones */ | |
8ff1443c RK |
798 | if (machine_desc->init_machine) |
799 | machine_desc->init_machine(); | |
1da177e4 LT |
800 | return 0; |
801 | } | |
802 | arch_initcall(customize_machine); | |
803 | ||
90de4137 SG |
804 | static int __init init_machine_late(void) |
805 | { | |
806 | if (machine_desc->init_late) | |
807 | machine_desc->init_late(); | |
808 | return 0; | |
809 | } | |
810 | late_initcall(init_machine_late); | |
811 | ||
3c57fb43 MW |
812 | #ifdef CONFIG_KEXEC |
813 | static inline unsigned long long get_total_mem(void) | |
814 | { | |
815 | unsigned long total; | |
816 | ||
817 | total = max_low_pfn - min_low_pfn; | |
818 | return total << PAGE_SHIFT; | |
819 | } | |
820 | ||
821 | /** | |
822 | * reserve_crashkernel() - reserves memory are for crash kernel | |
823 | * | |
824 | * This function reserves memory area given in "crashkernel=" kernel command | |
825 | * line parameter. The memory reserved is used by a dump capture kernel when | |
826 | * primary kernel is crashing. | |
827 | */ | |
828 | static void __init reserve_crashkernel(void) | |
829 | { | |
830 | unsigned long long crash_size, crash_base; | |
831 | unsigned long long total_mem; | |
832 | int ret; | |
833 | ||
834 | total_mem = get_total_mem(); | |
835 | ret = parse_crashkernel(boot_command_line, total_mem, | |
836 | &crash_size, &crash_base); | |
837 | if (ret) | |
838 | return; | |
839 | ||
840 | ret = reserve_bootmem(crash_base, crash_size, BOOTMEM_EXCLUSIVE); | |
841 | if (ret < 0) { | |
842 | printk(KERN_WARNING "crashkernel reservation failed - " | |
843 | "memory is in use (0x%lx)\n", (unsigned long)crash_base); | |
844 | return; | |
845 | } | |
846 | ||
847 | printk(KERN_INFO "Reserving %ldMB of memory at %ldMB " | |
848 | "for crashkernel (System RAM: %ldMB)\n", | |
849 | (unsigned long)(crash_size >> 20), | |
850 | (unsigned long)(crash_base >> 20), | |
851 | (unsigned long)(total_mem >> 20)); | |
852 | ||
853 | crashk_res.start = crash_base; | |
854 | crashk_res.end = crash_base + crash_size - 1; | |
855 | insert_resource(&iomem_resource, &crashk_res); | |
856 | } | |
857 | #else | |
858 | static inline void reserve_crashkernel(void) {} | |
859 | #endif /* CONFIG_KEXEC */ | |
860 | ||
73a65b3f UKK |
861 | static void __init squash_mem_tags(struct tag *tag) |
862 | { | |
863 | for (; tag->hdr.size; tag = tag_next(tag)) | |
864 | if (tag->hdr.tag == ATAG_MEM) | |
865 | tag->hdr.tag = ATAG_NONE; | |
866 | } | |
867 | ||
6291319d | 868 | static struct machine_desc * __init setup_machine_tags(unsigned int nr) |
1da177e4 LT |
869 | { |
870 | struct tag *tags = (struct tag *)&init_tags; | |
6291319d | 871 | struct machine_desc *mdesc = NULL, *p; |
1da177e4 LT |
872 | char *from = default_command_line; |
873 | ||
b75c178a RK |
874 | init_tags.mem.start = PHYS_OFFSET; |
875 | ||
6291319d GL |
876 | /* |
877 | * locate machine in the list of supported machines. | |
878 | */ | |
879 | for_each_machine_desc(p) | |
880 | if (nr == p->nr) { | |
881 | printk("Machine: %s\n", p->name); | |
882 | mdesc = p; | |
883 | break; | |
884 | } | |
1da177e4 | 885 | |
6291319d GL |
886 | if (!mdesc) { |
887 | early_print("\nError: unrecognized/unsupported machine ID" | |
888 | " (r1 = 0x%08x).\n\n", nr); | |
889 | dump_machine_table(); /* does not return */ | |
890 | } | |
1da177e4 | 891 | |
9d20fdd5 BG |
892 | if (__atags_pointer) |
893 | tags = phys_to_virt(__atags_pointer); | |
2bb9839e NP |
894 | else if (mdesc->atag_offset) |
895 | tags = (void *)(PAGE_OFFSET + mdesc->atag_offset); | |
1da177e4 | 896 | |
73a65b3f | 897 | #if defined(CONFIG_DEPRECATED_PARAM_STRUCT) |
1da177e4 LT |
898 | /* |
899 | * If we have the old style parameters, convert them to | |
900 | * a tag list. | |
901 | */ | |
902 | if (tags->hdr.tag != ATAG_CORE) | |
903 | convert_to_tag_list(tags); | |
73a65b3f | 904 | #endif |
93c02ab4 GL |
905 | |
906 | if (tags->hdr.tag != ATAG_CORE) { | |
907 | #if defined(CONFIG_OF) | |
908 | /* | |
909 | * If CONFIG_OF is set, then assume this is a reasonably | |
910 | * modern system that should pass boot parameters | |
911 | */ | |
912 | early_print("Warning: Neither atags nor dtb found\n"); | |
913 | #endif | |
1da177e4 | 914 | tags = (struct tag *)&init_tags; |
93c02ab4 | 915 | } |
1da177e4 LT |
916 | |
917 | if (mdesc->fixup) | |
0744a3ee | 918 | mdesc->fixup(tags, &from, &meminfo); |
1da177e4 LT |
919 | |
920 | if (tags->hdr.tag == ATAG_CORE) { | |
921 | if (meminfo.nr_banks != 0) | |
922 | squash_mem_tags(tags); | |
4cd9d6f7 | 923 | save_atags(tags); |
1da177e4 LT |
924 | parse_tags(tags); |
925 | } | |
926 | ||
6291319d GL |
927 | /* parse_early_param needs a boot_command_line */ |
928 | strlcpy(boot_command_line, from, COMMAND_LINE_SIZE); | |
929 | ||
930 | return mdesc; | |
931 | } | |
932 | ||
27a3f0e9 NP |
933 | static int __init meminfo_cmp(const void *_a, const void *_b) |
934 | { | |
935 | const struct membank *a = _a, *b = _b; | |
936 | long cmp = bank_pfn_start(a) - bank_pfn_start(b); | |
937 | return cmp < 0 ? -1 : cmp > 0 ? 1 : 0; | |
938 | } | |
6291319d GL |
939 | |
940 | void __init setup_arch(char **cmdline_p) | |
941 | { | |
942 | struct machine_desc *mdesc; | |
943 | ||
6291319d | 944 | setup_processor(); |
93c02ab4 GL |
945 | mdesc = setup_machine_fdt(__atags_pointer); |
946 | if (!mdesc) | |
947 | mdesc = setup_machine_tags(machine_arch_type); | |
6291319d GL |
948 | machine_desc = mdesc; |
949 | machine_name = mdesc->name; | |
950 | ||
c7909509 MS |
951 | setup_dma_zone(mdesc); |
952 | ||
b44c350d RK |
953 | if (mdesc->restart_mode) |
954 | reboot_setup(&mdesc->restart_mode); | |
6291319d | 955 | |
37efe642 RK |
956 | init_mm.start_code = (unsigned long) _text; |
957 | init_mm.end_code = (unsigned long) _etext; | |
958 | init_mm.end_data = (unsigned long) _edata; | |
959 | init_mm.brk = (unsigned long) _end; | |
1da177e4 | 960 | |
48ab7e09 JK |
961 | /* populate cmd_line too for later use, preserving boot_command_line */ |
962 | strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE); | |
963 | *cmdline_p = cmd_line; | |
2b0d8c25 JK |
964 | |
965 | parse_early_param(); | |
966 | ||
27a3f0e9 | 967 | sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL); |
0371d3f7 | 968 | sanity_check_meminfo(); |
8d717a52 | 969 | arm_memblock_init(&meminfo, mdesc); |
2778f620 | 970 | |
4b5f32ce | 971 | paging_init(mdesc); |
11b9369c | 972 | request_standard_resources(mdesc); |
1da177e4 | 973 | |
a528721d RK |
974 | if (mdesc->restart) |
975 | arm_pm_restart = mdesc->restart; | |
976 | ||
93c02ab4 GL |
977 | unflatten_device_tree(); |
978 | ||
7bbb7940 | 979 | #ifdef CONFIG_SMP |
f00ec48f RK |
980 | if (is_smp()) |
981 | smp_init_cpus(); | |
7bbb7940 | 982 | #endif |
3c57fb43 | 983 | reserve_crashkernel(); |
7bbb7940 | 984 | |
bc581770 | 985 | tcm_init(); |
ccea7a19 | 986 | |
52108641 | 987 | #ifdef CONFIG_MULTI_IRQ_HANDLER |
988 | handle_arch_irq = mdesc->handle_irq; | |
989 | #endif | |
1da177e4 LT |
990 | |
991 | #ifdef CONFIG_VT | |
992 | #if defined(CONFIG_VGA_CONSOLE) | |
993 | conswitchp = &vga_con; | |
994 | #elif defined(CONFIG_DUMMY_CONSOLE) | |
995 | conswitchp = &dummy_con; | |
996 | #endif | |
997 | #endif | |
dec12e62 RK |
998 | |
999 | if (mdesc->init_early) | |
1000 | mdesc->init_early(); | |
1da177e4 LT |
1001 | } |
1002 | ||
1003 | ||
1004 | static int __init topology_init(void) | |
1005 | { | |
1006 | int cpu; | |
1007 | ||
66fb8bd2 RK |
1008 | for_each_possible_cpu(cpu) { |
1009 | struct cpuinfo_arm *cpuinfo = &per_cpu(cpu_data, cpu); | |
1010 | cpuinfo->cpu.hotpluggable = 1; | |
1011 | register_cpu(&cpuinfo->cpu, cpu); | |
1012 | } | |
1da177e4 LT |
1013 | |
1014 | return 0; | |
1015 | } | |
1da177e4 LT |
1016 | subsys_initcall(topology_init); |
1017 | ||
e119bfff RK |
1018 | #ifdef CONFIG_HAVE_PROC_CPU |
1019 | static int __init proc_cpu_init(void) | |
1020 | { | |
1021 | struct proc_dir_entry *res; | |
1022 | ||
1023 | res = proc_mkdir("cpu", NULL); | |
1024 | if (!res) | |
1025 | return -ENOMEM; | |
1026 | return 0; | |
1027 | } | |
1028 | fs_initcall(proc_cpu_init); | |
1029 | #endif | |
1030 | ||
1da177e4 LT |
1031 | static const char *hwcap_str[] = { |
1032 | "swp", | |
1033 | "half", | |
1034 | "thumb", | |
1035 | "26bit", | |
1036 | "fastmult", | |
1037 | "fpa", | |
1038 | "vfp", | |
1039 | "edsp", | |
1040 | "java", | |
8f7f9435 | 1041 | "iwmmxt", |
99e4a6dd | 1042 | "crunch", |
4369ae16 | 1043 | "thumbee", |
2bedbdf4 | 1044 | "neon", |
7279dc3e CM |
1045 | "vfpv3", |
1046 | "vfpv3d16", | |
254cdf8e WD |
1047 | "tls", |
1048 | "vfpv4", | |
1049 | "idiva", | |
1050 | "idivt", | |
1da177e4 LT |
1051 | NULL |
1052 | }; | |
1053 | ||
1da177e4 LT |
1054 | static int c_show(struct seq_file *m, void *v) |
1055 | { | |
1056 | int i; | |
1057 | ||
1058 | seq_printf(m, "Processor\t: %s rev %d (%s)\n", | |
0ba8b9b2 | 1059 | cpu_name, read_cpuid_id() & 15, elf_platform); |
1da177e4 LT |
1060 | |
1061 | #if defined(CONFIG_SMP) | |
1062 | for_each_online_cpu(i) { | |
15559722 RK |
1063 | /* |
1064 | * glibc reads /proc/cpuinfo to determine the number of | |
1065 | * online processors, looking for lines beginning with | |
1066 | * "processor". Give glibc what it expects. | |
1067 | */ | |
1068 | seq_printf(m, "processor\t: %d\n", i); | |
1da177e4 LT |
1069 | seq_printf(m, "BogoMIPS\t: %lu.%02lu\n\n", |
1070 | per_cpu(cpu_data, i).loops_per_jiffy / (500000UL/HZ), | |
1071 | (per_cpu(cpu_data, i).loops_per_jiffy / (5000UL/HZ)) % 100); | |
1072 | } | |
1073 | #else /* CONFIG_SMP */ | |
1074 | seq_printf(m, "BogoMIPS\t: %lu.%02lu\n", | |
1075 | loops_per_jiffy / (500000/HZ), | |
1076 | (loops_per_jiffy / (5000/HZ)) % 100); | |
1077 | #endif | |
1078 | ||
1079 | /* dump out the processor features */ | |
1080 | seq_puts(m, "Features\t: "); | |
1081 | ||
1082 | for (i = 0; hwcap_str[i]; i++) | |
1083 | if (elf_hwcap & (1 << i)) | |
1084 | seq_printf(m, "%s ", hwcap_str[i]); | |
1085 | ||
0ba8b9b2 | 1086 | seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24); |
1da177e4 LT |
1087 | seq_printf(m, "CPU architecture: %s\n", proc_arch[cpu_architecture()]); |
1088 | ||
0ba8b9b2 | 1089 | if ((read_cpuid_id() & 0x0008f000) == 0x00000000) { |
1da177e4 | 1090 | /* pre-ARM7 */ |
0ba8b9b2 | 1091 | seq_printf(m, "CPU part\t: %07x\n", read_cpuid_id() >> 4); |
1da177e4 | 1092 | } else { |
0ba8b9b2 | 1093 | if ((read_cpuid_id() & 0x0008f000) == 0x00007000) { |
1da177e4 LT |
1094 | /* ARM7 */ |
1095 | seq_printf(m, "CPU variant\t: 0x%02x\n", | |
0ba8b9b2 | 1096 | (read_cpuid_id() >> 16) & 127); |
1da177e4 LT |
1097 | } else { |
1098 | /* post-ARM7 */ | |
1099 | seq_printf(m, "CPU variant\t: 0x%x\n", | |
0ba8b9b2 | 1100 | (read_cpuid_id() >> 20) & 15); |
1da177e4 LT |
1101 | } |
1102 | seq_printf(m, "CPU part\t: 0x%03x\n", | |
0ba8b9b2 | 1103 | (read_cpuid_id() >> 4) & 0xfff); |
1da177e4 | 1104 | } |
0ba8b9b2 | 1105 | seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15); |
1da177e4 | 1106 | |
1da177e4 LT |
1107 | seq_puts(m, "\n"); |
1108 | ||
1109 | seq_printf(m, "Hardware\t: %s\n", machine_name); | |
1110 | seq_printf(m, "Revision\t: %04x\n", system_rev); | |
1111 | seq_printf(m, "Serial\t\t: %08x%08x\n", | |
1112 | system_serial_high, system_serial_low); | |
1113 | ||
1114 | return 0; | |
1115 | } | |
1116 | ||
1117 | static void *c_start(struct seq_file *m, loff_t *pos) | |
1118 | { | |
1119 | return *pos < 1 ? (void *)1 : NULL; | |
1120 | } | |
1121 | ||
1122 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | |
1123 | { | |
1124 | ++*pos; | |
1125 | return NULL; | |
1126 | } | |
1127 | ||
1128 | static void c_stop(struct seq_file *m, void *v) | |
1129 | { | |
1130 | } | |
1131 | ||
2ffd6e18 | 1132 | const struct seq_operations cpuinfo_op = { |
1da177e4 LT |
1133 | .start = c_start, |
1134 | .next = c_next, | |
1135 | .stop = c_stop, | |
1136 | .show = c_show | |
1137 | }; |